1//===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Subclass of MipsTargetLowering specialized for mips16.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
14#define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
15
16#include "MipsISelLowering.h"
17
18namespace llvm {
19 class Mips16TargetLowering : public MipsTargetLowering {
20 public:
21 explicit Mips16TargetLowering(const MipsTargetMachine &TM,
22 const MipsSubtarget &STI);
23
24 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
25 Align Alignment,
26 MachineMemOperand::Flags Flags,
27 unsigned *Fast) const override;
28
29 MachineBasicBlock *
30 EmitInstrWithCustomInserter(MachineInstr &MI,
31 MachineBasicBlock *MBB) const override;
32
33 private:
34 bool isEligibleForTailCallOptimization(
35 const CCState &CCInfo, unsigned NextStackOffset,
36 const MipsFunctionInfo &FI) const override;
37
38 unsigned int
39 getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
40
41 const char *getMips16HelperFunction
42 (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
43
44 void getOpndList(SmallVectorImpl<SDValue> &Ops,
45 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
46 bool IsPICCall, bool GlobalOrExternal, bool LocalLinkage,
47 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
48 SDValue Chain) const override;
49
50 MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr &MI,
51 MachineBasicBlock *BB) const;
52
53 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
54 MachineInstr &MI,
55 MachineBasicBlock *BB) const;
56
57 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
58 MachineInstr &MI,
59 MachineBasicBlock *BB) const;
60
61 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
62 MachineInstr &MI,
63 MachineBasicBlock *BB) const;
64
65 MachineBasicBlock *emitFEXT_T8I8I16_ins(unsigned BtOpc, unsigned CmpiOpc,
66 unsigned CmpiXOpc, bool ImmSigned,
67 MachineInstr &MI,
68 MachineBasicBlock *BB) const;
69
70 MachineBasicBlock *emitFEXT_CCRX16_ins(unsigned SltOpc, MachineInstr &MI,
71 MachineBasicBlock *BB) const;
72
73 MachineBasicBlock *emitFEXT_CCRXI16_ins(unsigned SltiOpc, unsigned SltiXOpc,
74 MachineInstr &MI,
75 MachineBasicBlock *BB) const;
76 };
77}
78
79#endif
80