| 1 | //===- MipsTargetMachine.h - Define TargetMachine for Mips ------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file declares the Mips specific subclass of TargetMachine. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H |
| 14 | #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H |
| 15 | |
| 16 | #include "MCTargetDesc/MipsABIInfo.h" |
| 17 | #include "MipsSubtarget.h" |
| 18 | #include "llvm/ADT/StringMap.h" |
| 19 | #include "llvm/ADT/StringRef.h" |
| 20 | #include "llvm/CodeGen/CodeGenTargetMachineImpl.h" |
| 21 | #include "llvm/Support/CodeGen.h" |
| 22 | #include <memory> |
| 23 | #include <optional> |
| 24 | |
| 25 | namespace llvm { |
| 26 | |
| 27 | class MipsTargetMachine : public CodeGenTargetMachineImpl { |
| 28 | bool isLittle; |
| 29 | bool IsJIT; |
| 30 | // Used to initialize module-wide object-file policy. |
| 31 | MipsSubtarget DefaultSubtarget; |
| 32 | std::unique_ptr<TargetLoweringObjectFile> TLOF; |
| 33 | |
| 34 | mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap; |
| 35 | |
| 36 | public: |
| 37 | MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 38 | StringRef FS, const TargetOptions &Options, |
| 39 | std::optional<Reloc::Model> RM, |
| 40 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 41 | bool JIT, bool isLittle); |
| 42 | ~MipsTargetMachine() override; |
| 43 | |
| 44 | TargetTransformInfo getTargetTransformInfo(const Function &F) const override; |
| 45 | |
| 46 | const MipsSubtarget *getSubtargetImpl(const Function &F) const override; |
| 47 | |
| 48 | // Pass Pipeline Configuration |
| 49 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
| 50 | |
| 51 | TargetLoweringObjectFile *getObjFileLowering() const override { |
| 52 | return TLOF.get(); |
| 53 | } |
| 54 | |
| 55 | MachineFunctionInfo * |
| 56 | createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, |
| 57 | const TargetSubtargetInfo *STI) const override; |
| 58 | |
| 59 | /// Returns true if a cast between SrcAS and DestAS is a noop. |
| 60 | bool isNoopAddrSpaceCast(const DataLayout &, unsigned SrcAS, |
| 61 | unsigned DestAS) const override { |
| 62 | // Mips doesn't have any special address spaces so we just reserve |
| 63 | // the first 256 for software use (e.g. OpenCL) and treat casts |
| 64 | // between them as noops. |
| 65 | return SrcAS < 256 && DestAS < 256; |
| 66 | } |
| 67 | |
| 68 | bool isLittleEndian() const { return isLittle; } |
| 69 | bool isJIT() const { return IsJIT; } |
| 70 | }; |
| 71 | |
| 72 | /// Mips32/64 big endian target machine. |
| 73 | /// |
| 74 | class MipsebTargetMachine : public MipsTargetMachine { |
| 75 | virtual void anchor(); |
| 76 | |
| 77 | public: |
| 78 | MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 79 | StringRef FS, const TargetOptions &Options, |
| 80 | std::optional<Reloc::Model> RM, |
| 81 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 82 | bool JIT); |
| 83 | }; |
| 84 | |
| 85 | /// Mips32/64 little endian target machine. |
| 86 | /// |
| 87 | class MipselTargetMachine : public MipsTargetMachine { |
| 88 | virtual void anchor(); |
| 89 | |
| 90 | public: |
| 91 | MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 92 | StringRef FS, const TargetOptions &Options, |
| 93 | std::optional<Reloc::Model> RM, |
| 94 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 95 | bool JIT); |
| 96 | }; |
| 97 | |
| 98 | } // end namespace llvm |
| 99 | |
| 100 | #endif // LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H |
| 101 | |