1//=== RISCVPostLegalizerCombiner.cpp --------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// Post-legalization combines on generic MachineInstrs.
11///
12/// The combines here must preserve instruction legality.
13///
14/// Combines which don't rely on instruction legality should go in the
15/// RISCVPreLegalizerCombiner.
16///
17//===----------------------------------------------------------------------===//
18
19#include "RISCVTargetMachine.h"
20#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
21#include "llvm/CodeGen/GlobalISel/Combiner.h"
22#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
23#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
24#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
25#include "llvm/CodeGen/GlobalISel/GISelValueTracking.h"
26#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
27#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
28#include "llvm/CodeGen/MachineDominators.h"
29#include "llvm/CodeGen/MachineFunctionPass.h"
30#include "llvm/CodeGen/TargetPassConfig.h"
31#include "llvm/Support/FormatVariadic.h"
32
33#define GET_GICOMBINER_DEPS
34#include "RISCVGenPostLegalizeGICombiner.inc"
35#undef GET_GICOMBINER_DEPS
36
37#define DEBUG_TYPE "riscv-postlegalizer-combiner"
38
39using namespace llvm;
40using namespace MIPatternMatch;
41
42namespace {
43
44#define GET_GICOMBINER_TYPES
45#include "RISCVGenPostLegalizeGICombiner.inc"
46#undef GET_GICOMBINER_TYPES
47
48/// Match: G_STORE (G_FCONSTANT +0.0), addr
49/// Return the source vreg in MatchInfo if matched.
50bool matchFoldFPZeroStore(MachineInstr &MI, MachineRegisterInfo &MRI,
51 const RISCVSubtarget &STI, Register &MatchInfo) {
52 if (MI.getOpcode() != TargetOpcode::G_STORE)
53 return false;
54
55 Register SrcReg = MI.getOperand(i: 0).getReg();
56 if (!SrcReg.isVirtual())
57 return false;
58
59 if (!mi_match(R: SrcReg, MRI, P: m_PosZeroFP()))
60 return false;
61
62 unsigned ValBits = MRI.getType(Reg: SrcReg).getSizeInBits();
63 if ((ValBits == 16 && !STI.hasStdExtZfh()) ||
64 (ValBits == 32 && !STI.hasStdExtF()) ||
65 (ValBits == 64 && (!STI.hasStdExtD() || !STI.is64Bit())))
66 return false;
67
68 MatchInfo = SrcReg;
69 return true;
70}
71
72/// Apply: rewrite to G_STORE (G_CONSTANT 0 [XLEN]), addr
73void applyFoldFPZeroStore(MachineInstr &MI, MachineRegisterInfo &MRI,
74 MachineIRBuilder &B, const RISCVSubtarget &STI,
75 Register &MatchInfo) {
76 const unsigned XLen = STI.getXLen();
77
78 auto Zero = B.buildConstant(Res: LLT::scalar(SizeInBits: XLen), Val: 0);
79 MI.getOperand(i: 0).setReg(Zero.getReg(Idx: 0));
80
81 MachineInstr *Def = MRI.getVRegDef(Reg: MatchInfo);
82 if (Def && MRI.use_nodbg_empty(RegNo: MatchInfo))
83 Def->eraseFromParent();
84
85#ifndef NDEBUG
86 unsigned ValBits = MRI.getType(MatchInfo).getSizeInBits();
87 LLVM_DEBUG(dbgs() << formatv("[{0}] Fold FP zero store -> int zero "
88 "(XLEN={1}, ValBits={2}):\n {3}\n",
89 DEBUG_TYPE, XLen, ValBits, MI));
90#endif
91}
92
93class RISCVPostLegalizerCombinerImpl : public Combiner {
94protected:
95 const CombinerHelper Helper;
96 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig;
97 const RISCVSubtarget &STI;
98
99public:
100 RISCVPostLegalizerCombinerImpl(
101 MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
102 GISelCSEInfo *CSEInfo,
103 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig,
104 const RISCVSubtarget &STI, MachineDominatorTree *MDT,
105 const LegalizerInfo *LI);
106
107 static const char *getName() { return "RISCVPostLegalizerCombiner"; }
108
109 bool tryCombineAll(MachineInstr &I) const override;
110
111private:
112#define GET_GICOMBINER_CLASS_MEMBERS
113#include "RISCVGenPostLegalizeGICombiner.inc"
114#undef GET_GICOMBINER_CLASS_MEMBERS
115};
116
117#define GET_GICOMBINER_IMPL
118#include "RISCVGenPostLegalizeGICombiner.inc"
119#undef GET_GICOMBINER_IMPL
120
121RISCVPostLegalizerCombinerImpl::RISCVPostLegalizerCombinerImpl(
122 MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
123 GISelCSEInfo *CSEInfo,
124 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig,
125 const RISCVSubtarget &STI, MachineDominatorTree *MDT,
126 const LegalizerInfo *LI)
127 : Combiner(MF, CInfo, &VT, CSEInfo),
128 Helper(Observer, B, /*IsPreLegalize*/ false, &VT, MDT, LI),
129 RuleConfig(RuleConfig), STI(STI),
130#define GET_GICOMBINER_CONSTRUCTOR_INITS
131#include "RISCVGenPostLegalizeGICombiner.inc"
132#undef GET_GICOMBINER_CONSTRUCTOR_INITS
133{
134}
135
136class RISCVPostLegalizerCombiner : public MachineFunctionPass {
137public:
138 static char ID;
139
140 RISCVPostLegalizerCombiner();
141
142 StringRef getPassName() const override {
143 return "RISCVPostLegalizerCombiner";
144 }
145
146 bool runOnMachineFunction(MachineFunction &MF) override;
147 void getAnalysisUsage(AnalysisUsage &AU) const override;
148
149private:
150 RISCVPostLegalizerCombinerImplRuleConfig RuleConfig;
151};
152} // end anonymous namespace
153
154void RISCVPostLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
155 AU.addRequired<TargetPassConfig>();
156 AU.setPreservesCFG();
157 getSelectionDAGFallbackAnalysisUsage(AU);
158 AU.addRequired<GISelValueTrackingAnalysisLegacy>();
159 AU.addPreserved<GISelValueTrackingAnalysisLegacy>();
160 AU.addRequired<MachineDominatorTreeWrapperPass>();
161 AU.addRequired<GISelCSEAnalysisWrapperPass>();
162 AU.addPreserved<GISelCSEAnalysisWrapperPass>();
163 MachineFunctionPass::getAnalysisUsage(AU);
164}
165
166RISCVPostLegalizerCombiner::RISCVPostLegalizerCombiner()
167 : MachineFunctionPass(ID) {
168 if (!RuleConfig.parseCommandLineOption())
169 report_fatal_error(reason: "Invalid rule identifier");
170}
171
172bool RISCVPostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
173 if (MF.getProperties().hasFailedISel())
174 return false;
175 assert(MF.getProperties().hasLegalized() && "Expected a legalized function?");
176 auto *TPC = &getAnalysis<TargetPassConfig>();
177 const Function &F = MF.getFunction();
178 bool EnableOpt =
179 MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F);
180
181 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
182 const auto *LI = ST.getLegalizerInfo();
183
184 GISelValueTracking *VT =
185 &getAnalysis<GISelValueTrackingAnalysisLegacy>().get(MF);
186 MachineDominatorTree *MDT =
187 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
188 GISelCSEAnalysisWrapper &Wrapper =
189 getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper();
190 auto *CSEInfo = &Wrapper.get(CSEOpt: TPC->getCSEConfig());
191
192 CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
193 /*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(),
194 F.hasMinSize());
195 RISCVPostLegalizerCombinerImpl Impl(MF, CInfo, *VT, CSEInfo, RuleConfig, ST,
196 MDT, LI);
197 return Impl.combineMachineInstrs();
198}
199
200char RISCVPostLegalizerCombiner::ID = 0;
201INITIALIZE_PASS_BEGIN(RISCVPostLegalizerCombiner, DEBUG_TYPE,
202 "Combine RISC-V MachineInstrs after legalization", false,
203 false)
204INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
205INITIALIZE_PASS_DEPENDENCY(GISelValueTrackingAnalysisLegacy)
206INITIALIZE_PASS_END(RISCVPostLegalizerCombiner, DEBUG_TYPE,
207 "Combine RISC-V MachineInstrs after legalization", false,
208 false)
209
210FunctionPass *llvm::createRISCVPostLegalizerCombiner() {
211 return new RISCVPostLegalizerCombiner();
212}
213