1//===--- SPIRVCallLowering.cpp - Call lowering ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the lowering of LLVM calls to machine code calls for
10// GlobalISel.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SPIRVCallLowering.h"
15#include "MCTargetDesc/SPIRVBaseInfo.h"
16#include "SPIRV.h"
17#include "SPIRVBuiltins.h"
18#include "SPIRVGlobalRegistry.h"
19#include "SPIRVISelLowering.h"
20#include "SPIRVMetadata.h"
21#include "SPIRVRegisterInfo.h"
22#include "SPIRVSubtarget.h"
23#include "SPIRVUtils.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/CodeGen/FunctionLoweringInfo.h"
26#include "llvm/IR/IntrinsicInst.h"
27#include "llvm/IR/IntrinsicsSPIRV.h"
28#include "llvm/Support/ModRef.h"
29
30using namespace llvm;
31
32SPIRVCallLowering::SPIRVCallLowering(const SPIRVTargetLowering &TLI,
33 SPIRVGlobalRegistry *GR)
34 : CallLowering(&TLI), GR(GR) {}
35
36bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
37 const Value *Val, ArrayRef<Register> VRegs,
38 FunctionLoweringInfo &FLI,
39 Register SwiftErrorVReg) const {
40 // Ignore if called from the internal service function
41 if (MIRBuilder.getMF()
42 .getFunction()
43 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
44 .isValid())
45 return true;
46
47 // Currently all return types should use a single register.
48 // TODO: handle the case of multiple registers.
49 if (VRegs.size() > 1)
50 return false;
51
52 if (Val) {
53 const auto &STI = MIRBuilder.getMF().getSubtarget();
54 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturnValue)
55 .addUse(RegNo: VRegs[0])
56 .constrainAllUses(TII: MIRBuilder.getTII(), TRI: *STI.getRegisterInfo(),
57 RBI: *STI.getRegBankInfo());
58 return true;
59 }
60 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturn);
61 return true;
62}
63
64// Based on the LLVM function attributes, get a SPIR-V FunctionControl.
65static uint32_t getFunctionControl(const Function &F,
66 const SPIRVSubtarget *ST) {
67 MemoryEffects MemEffects = F.getMemoryEffects();
68
69 uint32_t FuncControl = static_cast<uint32_t>(SPIRV::FunctionControl::None);
70
71 if (F.hasFnAttribute(Kind: Attribute::AttrKind::NoInline))
72 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::DontInline);
73 else if (F.hasFnAttribute(Kind: Attribute::AttrKind::AlwaysInline))
74 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Inline);
75
76 if (MemEffects.doesNotAccessMemory())
77 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Pure);
78 else if (MemEffects.onlyReadsMemory())
79 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Const);
80
81 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_optnone) ||
82 ST->canUseExtension(E: SPIRV::Extension::SPV_EXT_optnone))
83 if (F.hasFnAttribute(Kind: Attribute::OptimizeNone))
84 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::OptNoneEXT);
85
86 return FuncControl;
87}
88
89// If the function has pointer arguments, we are forced to re-create this
90// function type from the very beginning, changing PointerType by
91// TypedPointerType for each pointer argument. Otherwise, the same `Type*`
92// potentially corresponds to different SPIR-V function type, effectively
93// invalidating logic behind global registry and duplicates tracker.
94static FunctionType *
95fixFunctionTypeIfPtrArgs(SPIRVGlobalRegistry *GR, const Function &F,
96 FunctionType *FTy, SPIRVTypeInst SRetTy,
97 const SmallVector<SPIRVTypeInst, 4> &SArgTys) {
98 bool hasArgPtrs = any_of(Range: F.args(), P: [](const Argument &Arg) {
99 // check if it's an instance of a non-typed PointerType
100 return Arg.getType()->isPointerTy();
101 });
102 if (!hasArgPtrs) {
103 Type *RetTy = FTy->getReturnType();
104 // check if it's an instance of a non-typed PointerType
105 if (!RetTy->isPointerTy())
106 return FTy;
107 }
108
109 // re-create function type, using TypedPointerType instead of PointerType to
110 // properly trace argument types
111 const Type *RetTy = GR->getTypeForSPIRVType(Ty: SRetTy);
112 SmallVector<Type *, 4> ArgTys;
113 for (auto SArgTy : SArgTys)
114 ArgTys.push_back(Elt: const_cast<Type *>(GR->getTypeForSPIRVType(Ty: SArgTy)));
115 return FunctionType::get(Result: const_cast<Type *>(RetTy), Params: ArgTys, isVarArg: false);
116}
117
118static SPIRV::AccessQualifier::AccessQualifier
119getArgAccessQual(const Function &F, unsigned ArgIdx) {
120 if (F.getCallingConv() != CallingConv::SPIR_KERNEL)
121 return SPIRV::AccessQualifier::ReadWrite;
122
123 MDString *ArgAttribute = getOCLKernelArgAccessQual(F, ArgIdx);
124 if (!ArgAttribute)
125 return SPIRV::AccessQualifier::ReadWrite;
126
127 if (ArgAttribute->getString() == "read_only")
128 return SPIRV::AccessQualifier::ReadOnly;
129 if (ArgAttribute->getString() == "write_only")
130 return SPIRV::AccessQualifier::WriteOnly;
131 return SPIRV::AccessQualifier::ReadWrite;
132}
133
134static SPIRVTypeInst getArgSPIRVType(const Function &F, unsigned ArgIdx,
135 SPIRVGlobalRegistry *GR,
136 MachineIRBuilder &MIRBuilder,
137 const SPIRVSubtarget &ST) {
138 // Read argument's access qualifier from metadata or default.
139 SPIRV::AccessQualifier::AccessQualifier ArgAccessQual =
140 getArgAccessQual(F, ArgIdx);
141
142 Type *OriginalArgType =
143 SPIRV::getOriginalFunctionType(F)->getParamType(i: ArgIdx);
144
145 // Vector of untyped pointers: build with the deduced pointee instead of
146 // the default i8 (mismatches typed uses downstream).
147 Argument *Arg = F.getArg(i: ArgIdx);
148 if (auto *VTy = dyn_cast<FixedVectorType>(Val: OriginalArgType);
149 VTy && isUntypedPointerTy(T: VTy->getElementType()))
150 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg))
151 return GR->getOrCreateSPIRVVectorType(
152 BaseType: GR->getOrCreateSPIRVPointerType(
153 BaseType: ElemTy, MIRBuilder,
154 SC: addressSpaceToStorageClass(
155 AddrSpace: getPointerAddressSpace(T: OriginalArgType), STI: ST)),
156 NumElements: VTy->getNumElements(), MIRBuilder, EmitIR: true);
157
158 // If OriginalArgType is non-pointer, use the OriginalArgType (the type cannot
159 // be legally reassigned later).
160 if (!isPointerTy(T: OriginalArgType))
161 return GR->getOrCreateSPIRVType(Type: OriginalArgType, MIRBuilder, AQ: ArgAccessQual,
162 EmitIR: true);
163
164 Type *ArgType = Arg->getType();
165
166 // In case OriginalArgType is of untyped pointer type, there are three
167 // possibilities:
168 // 1) This is a pointer of an LLVM IR element type, passed byval/byref.
169 // 2) This is an OpenCL/SPIR-V builtin type if there is spv_assign_type
170 // intrinsic assigning a TargetExtType.
171 // 3) This is a pointer, try to retrieve pointer element type from a
172 // spv_assign_ptr_type intrinsic or otherwise use default pointer element
173 // type.
174 if (hasPointeeTypeAttr(Arg)) {
175 // byval/byref/sret carry the aggregate layout in the pointee type, so keep
176 // a typed pointer here. An untyped one drops the type and breaks the
177 // argument ABI on the way back from SPIR-V.
178 return GR->getOrCreateSPIRVTypedPointerType(
179 BaseType: getPointeeTypeByAttr(Arg), MIRBuilder,
180 SC: addressSpaceToStorageClass(AddrSpace: getPointerAddressSpace(T: ArgType), STI: ST));
181 }
182
183 for (auto User : Arg->users()) {
184 auto *II = dyn_cast<IntrinsicInst>(Val: User);
185 // Check if this is spv_assign_type assigning OpenCL/SPIR-V builtin type.
186 if (II && II->getIntrinsicID() == Intrinsic::spv_assign_type) {
187 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
188 Type *BuiltinType =
189 cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType();
190 assert(BuiltinType->isTargetExtTy() && "Expected TargetExtType");
191 return GR->getOrCreateSPIRVType(Type: BuiltinType, MIRBuilder, AQ: ArgAccessQual,
192 EmitIR: true);
193 }
194
195 // Check if this is spv_assign_ptr_type assigning pointer element type.
196 if (!II || II->getIntrinsicID() != Intrinsic::spv_assign_ptr_type)
197 continue;
198
199 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
200 Type *ElementTy =
201 toTypedPointer(Ty: cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType());
202 return GR->getOrCreateSPIRVPointerType(
203 BaseType: ElementTy, MIRBuilder,
204 SC: addressSpaceToStorageClass(
205 AddrSpace: cast<ConstantInt>(Val: II->getOperand(i_nocapture: 2))->getZExtValue(), STI: ST));
206 }
207
208 // Replace PointerType with TypedPointerType to be able to map SPIR-V types to
209 // LLVM types in a consistent manner
210 return GR->getOrCreateSPIRVType(Type: toTypedPointer(Ty: OriginalArgType), MIRBuilder,
211 AQ: ArgAccessQual, EmitIR: true);
212}
213
214static SPIRV::ExecutionModel::ExecutionModel
215getExecutionModel(const SPIRVSubtarget &STI, const Function &F) {
216 assert(STI.getEnv() != SPIRVSubtarget::Unknown &&
217 "Environment must be resolved before lowering entry points.");
218
219 if (STI.isKernel())
220 return SPIRV::ExecutionModel::Kernel;
221
222 auto attribute = F.getFnAttribute(Kind: "hlsl.shader");
223 if (!attribute.isValid()) {
224 report_fatal_error(
225 reason: "This entry point lacks mandatory hlsl.shader attribute.");
226 }
227
228 const auto value = attribute.getValueAsString();
229 if (value == "compute")
230 return SPIRV::ExecutionModel::GLCompute;
231 if (value == "vertex")
232 return SPIRV::ExecutionModel::Vertex;
233 if (value == "pixel")
234 return SPIRV::ExecutionModel::Fragment;
235
236 report_fatal_error(reason: "This HLSL entry point is not supported by this backend.");
237}
238
239bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
240 const Function &F,
241 ArrayRef<ArrayRef<Register>> VRegs,
242 FunctionLoweringInfo &FLI) const {
243 // Discard the internal service function
244 if (F.getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME).isValid())
245 return true;
246
247 assert(GR && "Must initialize the SPIRV type registry before lowering args.");
248 GR->setCurrentFunc(MIRBuilder.getMF());
249
250 // Get access to information about available extensions
251 const SPIRVSubtarget *ST =
252 static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
253
254 // Assign types and names to all args, and store their types for later.
255 SmallVector<SPIRVTypeInst, 4> ArgTypeVRegs;
256 if (VRegs.size() > 0) {
257 unsigned i = 0;
258 for (const auto &Arg : F.args()) {
259 // Currently formal args should use single registers.
260 // TODO: handle the case of multiple registers.
261 if (VRegs[i].size() > 1)
262 return false;
263 SPIRVTypeInst SpirvTy = getArgSPIRVType(F, ArgIdx: i, GR, MIRBuilder, ST: *ST);
264 GR->assignSPIRVTypeToVReg(Type: SpirvTy, VReg: VRegs[i][0], MF: MIRBuilder.getMF());
265 ArgTypeVRegs.push_back(Elt: SpirvTy);
266
267 if (Arg.hasName())
268 buildOpName(Target: VRegs[i][0], Name: Arg.getName(), MIRBuilder);
269 if (isPointerTyOrWrapper(Ty: Arg.getType())) {
270 auto DerefBytes = static_cast<unsigned>(Arg.getDereferenceableBytes());
271 if (DerefBytes != 0)
272 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
273 Dec: SPIRV::Decoration::MaxByteOffset, DecArgs: {DerefBytes});
274 }
275 if (Arg.hasAttribute(Kind: Attribute::Alignment) && !ST->isShader()) {
276 auto Alignment = static_cast<unsigned>(
277 Arg.getAttribute(Kind: Attribute::Alignment).getValueAsInt());
278 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec: SPIRV::Decoration::Alignment,
279 DecArgs: {Alignment});
280 }
281 if (ST->isKernel()) {
282 if (Arg.hasAttribute(Kind: Attribute::ReadOnly)) {
283 auto Attr =
284 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoWrite);
285 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
286 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
287 }
288 if (Arg.hasAttribute(Kind: Attribute::ReadNone)) {
289 auto Attr = static_cast<unsigned>(
290 SPIRV::FunctionParameterAttribute::NoReadWrite);
291 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
292 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
293 }
294 if (Arg.hasAttribute(Kind: Attribute::ZExt)) {
295 auto Attr =
296 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Zext);
297 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
298 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
299 }
300 if (Arg.hasAttribute(Kind: Attribute::SExt)) {
301 auto Attr =
302 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sext);
303 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
304 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
305 }
306 if (Arg.hasAttribute(Kind: Attribute::NoAlias)) {
307 auto Attr =
308 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoAlias);
309 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
310 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
311 }
312 if (Arg.hasNoCaptureAttr()) {
313 auto Attr = static_cast<unsigned>(
314 SPIRV::FunctionParameterAttribute::NoCapture);
315 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
316 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
317 }
318 // TODO: the AMDGPU BE only supports ByRef argument passing, thus for
319 // AMDGCN flavoured SPIRV we CodeGen for ByRef, but lower it to
320 // ByVal, handling the impedance mismatch during reverse
321 // translation from SPIRV to LLVM IR; the vendor check should be
322 // removed once / if SPIRV adds ByRef support.
323 if (Arg.hasAttribute(Kind: Attribute::ByVal) ||
324 (Arg.hasAttribute(Kind: Attribute::ByRef) &&
325 F.getParent()->getTargetTriple().getVendor() ==
326 Triple::VendorType::AMD)) {
327 auto Attr =
328 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::ByVal);
329 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
330 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
331 }
332 if (Arg.hasAttribute(Kind: Attribute::StructRet)) {
333 auto Attr =
334 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sret);
335 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
336 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
337 }
338 }
339
340 MDNode *Node = F.getMetadata(Kind: "spirv.ParameterDecorations");
341 if (Node && i < Node->getNumOperands() &&
342 isa<MDNode>(Val: Node->getOperand(I: i))) {
343 MDNode *MD = cast<MDNode>(Val: Node->getOperand(I: i));
344 for (const MDOperand &MDOp : MD->operands()) {
345 MDNode *MD2 = dyn_cast<MDNode>(Val: MDOp);
346 assert(MD2 && "Metadata operand is expected");
347 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: 0);
348 assert(Const && "MDOperand should be ConstantInt");
349 auto Dec =
350 static_cast<SPIRV::Decoration::Decoration>(Const->getZExtValue());
351 std::vector<uint32_t> DecVec;
352 for (unsigned j = 1; j < MD2->getNumOperands(); j++) {
353 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: j);
354 assert(Const && "MDOperand should be ConstantInt");
355 DecVec.push_back(x: static_cast<uint32_t>(Const->getZExtValue()));
356 }
357 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec, DecArgs: DecVec);
358 }
359 }
360 ++i;
361 }
362 }
363
364 auto MRI = MIRBuilder.getMRI();
365 Register FuncVReg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
366 MRI->setRegClass(Reg: FuncVReg, RC: &SPIRV::iIDRegClass);
367 FunctionType *FTy = SPIRV::getOriginalFunctionType(F);
368 Type *FRetTy = FTy->getReturnType();
369 if (isUntypedPointerTy(T: FRetTy)) {
370 if (Type *FRetElemTy = GR->findDeducedElementType(Val: &F)) {
371 TypedPointerType *DerivedTy = TypedPointerType::get(
372 ElementType: toTypedPointer(Ty: FRetElemTy), AddressSpace: getPointerAddressSpace(T: FRetTy));
373 GR->addReturnType(ArgF: &F, DerivedTy);
374 FRetTy = DerivedTy;
375 }
376 }
377 SPIRVTypeInst RetTy = GR->getOrCreateSPIRVType(
378 Type: FRetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
379 FTy = fixFunctionTypeIfPtrArgs(GR, F, FTy, SRetTy: RetTy, SArgTys: ArgTypeVRegs);
380 SPIRVTypeInst FuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
381 Ty: FTy, RetType: RetTy, ArgTypes: ArgTypeVRegs, MIRBuilder);
382 uint32_t FuncControl = getFunctionControl(F, ST);
383
384 // Add OpFunction instruction
385 MachineInstrBuilder MB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunction)
386 .addDef(RegNo: FuncVReg)
387 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetTy))
388 .addImm(Val: FuncControl)
389 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: FuncTy));
390 GR->recordFunctionDefinition(F: &F, MO: &MB.getInstr()->getOperand(i: 0));
391 GR->addGlobalObject(V: &F, MF: &MIRBuilder.getMF(), R: FuncVReg);
392 if (F.isDeclaration())
393 GR->add(V: &F, MI: MB);
394
395 // Add OpFunctionParameter instructions
396 int i = 0;
397 for (const auto &Arg : F.args()) {
398 assert(VRegs[i].size() == 1 && "Formal arg has multiple vregs");
399 Register ArgReg = VRegs[i][0];
400 MRI->setRegClass(Reg: ArgReg, RC: GR->getRegClass(SpvType: ArgTypeVRegs[i]));
401 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunctionParameter)
402 .addDef(RegNo: ArgReg)
403 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: ArgTypeVRegs[i]));
404 if (F.isDeclaration())
405 GR->add(V: &Arg, MI: MIB);
406 GR->addGlobalObject(V: &Arg, MF: &MIRBuilder.getMF(), R: ArgReg);
407 i++;
408 }
409 if (!ST->isShader()) {
410 if (F.hasRetAttribute(Kind: Attribute::ZExt)) {
411 auto Attr =
412 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Zext);
413 buildOpDecorate(Reg: FuncVReg, MIRBuilder, Dec: SPIRV::Decoration::FuncParamAttr,
414 DecArgs: {Attr});
415 }
416 if (F.hasRetAttribute(Kind: Attribute::SExt)) {
417 auto Attr =
418 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sext);
419 buildOpDecorate(Reg: FuncVReg, MIRBuilder, Dec: SPIRV::Decoration::FuncParamAttr,
420 DecArgs: {Attr});
421 }
422 }
423
424 // Name the function.
425 if (F.hasName())
426 buildOpName(Target: FuncVReg, Name: F.getName(), MIRBuilder);
427
428 // Handle entry points and function linkage.
429 if (isEntryPoint(F)) {
430 if (F.getName().empty())
431 report_fatal_error(reason: "SPIR-V entry point function must have a name");
432 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpEntryPoint)
433 .addImm(Val: static_cast<uint32_t>(getExecutionModel(STI: *ST, F)))
434 .addUse(RegNo: FuncVReg);
435 addStringImm(Str: F.getName(), MIB);
436 } else if (const auto LnkTy = getSpirvLinkageTypeFor(ST: *ST, GV: F);
437 LnkTy && !F.getName().empty()) {
438 buildOpDecorate(Reg: FuncVReg, MIRBuilder, Dec: SPIRV::Decoration::LinkageAttributes,
439 DecArgs: {static_cast<uint32_t>(*LnkTy)}, StrImm: F.getName());
440 }
441
442 // Handle function pointers decoration
443 bool hasFunctionPointers =
444 ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers);
445 if (hasFunctionPointers) {
446 if (F.hasFnAttribute(Kind: "referenced-indirectly")) {
447 assert((F.getCallingConv() != CallingConv::SPIR_KERNEL) &&
448 "Unexpected 'referenced-indirectly' attribute of the kernel "
449 "function");
450 buildOpDecorate(Reg: FuncVReg, MIRBuilder,
451 Dec: SPIRV::Decoration::ReferencedIndirectlyINTEL, DecArgs: {});
452 }
453 }
454
455 return true;
456}
457
458// TODO:
459// - add a topological sort of IndirectCalls to ensure the best types knowledge
460// - we may need to fix function formal parameter types if they are opaque
461// pointers used as function pointers in these indirect calls
462// - defaulting to StorageClass::Function in the absence of the
463// SPV_INTEL_function_pointers extension seems wrong, as that might not be
464// able to hold a full width pointer to function, and it also does not model
465// the semantics of a pointer to function in a generic fashion.
466void SPIRVCallLowering::produceIndirectPtrType(
467 MachineIRBuilder &MIRBuilder,
468 const SPIRVCallLowering::SPIRVIndirectCall &IC) const {
469 // Create indirect call data type if any
470 MachineFunction &MF = MIRBuilder.getMF();
471 const SPIRVSubtarget &ST = MF.getSubtarget<SPIRVSubtarget>();
472 SPIRVTypeInst SpirvRetTy = GR->getOrCreateSPIRVType(
473 Type: IC.RetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
474 SmallVector<SPIRVTypeInst, 4> SpirvArgTypes;
475 for (size_t i = 0; i < IC.ArgTys.size(); ++i) {
476 SPIRVTypeInst SPIRVTy = GR->getOrCreateSPIRVType(
477 Type: IC.ArgTys[i], MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
478 SpirvArgTypes.push_back(Elt: SPIRVTy);
479 if (!GR->getSPIRVTypeForVReg(VReg: IC.ArgRegs[i]))
480 GR->assignSPIRVTypeToVReg(Type: SPIRVTy, VReg: IC.ArgRegs[i], MF);
481 }
482 // SPIR-V function type:
483 FunctionType *FTy =
484 FunctionType::get(Result: const_cast<Type *>(IC.RetTy), Params: IC.ArgTys, isVarArg: false);
485 SPIRVTypeInst SpirvFuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
486 Ty: FTy, RetType: SpirvRetTy, ArgTypes: SpirvArgTypes, MIRBuilder);
487 // SPIR-V pointer to function type:
488 auto SC = ST.canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers)
489 ? SPIRV::StorageClass::CodeSectionINTEL
490 : SPIRV::StorageClass::Function;
491 SPIRVTypeInst IndirectFuncPtrTy =
492 GR->getOrCreateSPIRVPointerType(BaseType: SpirvFuncTy, MIRBuilder, SC);
493 // Correct the Callee type
494 GR->assignSPIRVTypeToVReg(Type: IndirectFuncPtrTy, VReg: IC.Callee, MF);
495}
496
497bool SPIRVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
498 CallLoweringInfo &Info) const {
499 // Currently call returns should have single vregs.
500 // TODO: handle the case of multiple registers.
501 if (Info.OrigRet.Regs.size() > 1)
502 return false;
503 MachineFunction &MF = MIRBuilder.getMF();
504 GR->setCurrentFunc(MF);
505 const Function *CF = nullptr;
506 std::string DemangledName;
507 const Type *OrigRetTy = Info.OrigRet.Ty;
508
509 // Emit a regular OpFunctionCall. If it's an externally declared function,
510 // be sure to emit its type and function declaration here. It will be hoisted
511 // globally later.
512 if (Info.Callee.isGlobal()) {
513 std::string FuncName = Info.Callee.getGlobal()->getName().str();
514 DemangledName = getOclOrSpirvBuiltinDemangledName(Name: FuncName);
515 CF = dyn_cast_or_null<const Function>(Val: Info.Callee.getGlobal());
516 // TODO: support constexpr casts and indirect calls.
517 if (CF == nullptr)
518 return false;
519
520 FunctionType *FTy = SPIRV::getOriginalFunctionType(F: *CF);
521 OrigRetTy = FTy->getReturnType();
522 if (isUntypedPointerTy(T: OrigRetTy)) {
523 if (auto *DerivedRetTy = GR->findReturnType(ArgF: CF))
524 OrigRetTy = DerivedRetTy;
525 }
526 }
527
528 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
529 Register ResVReg =
530 Info.OrigRet.Regs.empty() ? Register(0) : Info.OrigRet.Regs[0];
531 const auto *ST = static_cast<const SPIRVSubtarget *>(&MF.getSubtarget());
532
533 bool isFunctionDecl = CF && CF->isDeclaration();
534 if (isFunctionDecl && !DemangledName.empty()) {
535 if (ResVReg.isValid()) {
536 if (!GR->getSPIRVTypeForVReg(VReg: ResVReg)) {
537 const Type *RetTy = OrigRetTy;
538 if (auto *PtrRetTy = dyn_cast<PointerType>(Val: OrigRetTy)) {
539 const Value *OrigValue = Info.OrigRet.OrigValue;
540 if (!OrigValue)
541 OrigValue = Info.CB;
542 if (OrigValue)
543 if (Type *ElemTy = GR->findDeducedElementType(Val: OrigValue))
544 RetTy =
545 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrRetTy->getAddressSpace());
546 }
547 setRegClassType(Reg: ResVReg, Ty: RetTy, GR, MIRBuilder,
548 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
549 }
550 } else {
551 ResVReg = createVirtualRegister(Ty: OrigRetTy, GR, MIRBuilder,
552 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
553 }
554 SmallVector<Register, 8> ArgVRegs;
555 for (auto Arg : Info.OrigArgs) {
556 assert(Arg.Regs.size() == 1 && "Call arg has multiple VRegs");
557 Register ArgReg = Arg.Regs[0];
558 ArgVRegs.push_back(Elt: ArgReg);
559 SPIRVTypeInst SpvType = GR->getSPIRVTypeForVReg(VReg: ArgReg);
560 if (!SpvType) {
561 Type *ArgTy = nullptr;
562 if (auto *PtrArgTy = dyn_cast<PointerType>(Val: Arg.Ty)) {
563 // If Arg.Ty is an untyped pointer (i.e., ptr [addrspace(...)]) and we
564 // don't have access to original value in LLVM IR or info about
565 // deduced pointee type, then we should wait with setting the type for
566 // the virtual register until pre-legalizer step when we access
567 // @llvm.spv.assign.ptr.type.p...(...)'s info.
568 if (Arg.OrigValue)
569 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg.OrigValue))
570 ArgTy =
571 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrArgTy->getAddressSpace());
572 } else {
573 ArgTy = Arg.Ty;
574 }
575 if (ArgTy) {
576 SpvType = GR->getOrCreateSPIRVType(
577 Type: ArgTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
578 GR->assignSPIRVTypeToVReg(Type: SpvType, VReg: ArgReg, MF);
579 }
580 }
581 if (!MRI->getRegClassOrNull(Reg: ArgReg)) {
582 // Either we have SpvType created, or Arg.Ty is an untyped pointer and
583 // we know its virtual register's class and type even if we don't know
584 // pointee type.
585 MRI->setRegClass(Reg: ArgReg, RC: SpvType ? GR->getRegClass(SpvType)
586 : &SPIRV::pIDRegClass);
587 MRI->setType(
588 VReg: ArgReg,
589 Ty: SpvType ? GR->getRegType(SpvType)
590 : LLT::pointer(AddressSpace: cast<PointerType>(Val: Arg.Ty)->getAddressSpace(),
591 SizeInBits: GR->getPointerSize()));
592 }
593 }
594 if (auto Res = SPIRV::lowerBuiltin(
595 DemangledCall: DemangledName, Set: ST->getPreferredInstructionSet(), MIRBuilder,
596 OrigRet: ResVReg, OrigRetTy, Args: ArgVRegs, GR, CB: *Info.CB))
597 return *Res;
598 }
599
600 if (isFunctionDecl && !GR->find(V: CF, MF: &MF).isValid()) {
601 // Emit the type info and forward function declaration to the first MBB
602 // to ensure VReg definition dependencies are valid across all MBBs.
603 MachineIRBuilder FirstBlockBuilder;
604 FirstBlockBuilder.setMF(MF);
605 FirstBlockBuilder.setMBB(*MF.getBlockNumbered(N: 0));
606
607 SmallVector<ArrayRef<Register>, 8> VRegArgs;
608 SmallVector<SmallVector<Register, 1>, 8> ToInsert;
609 for (const Argument &Arg : CF->args()) {
610 if (MIRBuilder.getDataLayout().getTypeStoreSize(Ty: Arg.getType()).isZero())
611 continue; // Don't handle zero sized types.
612 Register Reg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
613 MRI->setRegClass(Reg, RC: &SPIRV::iIDRegClass);
614 ToInsert.push_back(Elt: {Reg});
615 VRegArgs.push_back(Elt: ToInsert.back());
616 }
617 // TODO: Reuse FunctionLoweringInfo
618 FunctionLoweringInfo FuncInfo;
619 lowerFormalArguments(MIRBuilder&: FirstBlockBuilder, F: *CF, VRegs: VRegArgs, FLI&: FuncInfo);
620 }
621
622 // Ignore the call if it's called from the internal service function
623 if (MIRBuilder.getMF()
624 .getFunction()
625 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
626 .isValid()) {
627 // insert a no-op
628 MIRBuilder.buildTrap();
629 return true;
630 }
631
632 unsigned CallOp;
633 if (Info.CB && Info.CB->isIndirectCall()) {
634 if (!ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers))
635 report_fatal_error(reason: "An indirect call is encountered but SPIR-V without "
636 "extensions does not support it",
637 gen_crash_diag: false);
638 // Set instruction operation according to SPV_INTEL_function_pointers
639 CallOp = SPIRV::OpFunctionPointerCallINTEL;
640 // Collect information about the indirect call to create correct types.
641 Register CalleeReg = Info.Callee.getReg();
642 if (CalleeReg.isValid()) {
643 SPIRVCallLowering::SPIRVIndirectCall IndirectCall;
644 IndirectCall.Callee = CalleeReg;
645 FunctionType *FTy = SPIRV::getOriginalFunctionType(CB: *Info.CB);
646 IndirectCall.RetTy = OrigRetTy = FTy->getReturnType();
647 assert(FTy->getNumParams() == Info.OrigArgs.size() &&
648 "Function types mismatch");
649 for (unsigned I = 0; I != Info.OrigArgs.size(); ++I) {
650 assert(Info.OrigArgs[I].Regs.size() == 1 &&
651 "Call arg has multiple VRegs");
652 IndirectCall.ArgTys.push_back(Elt: FTy->getParamType(i: I));
653 IndirectCall.ArgRegs.push_back(Elt: Info.OrigArgs[I].Regs[0]);
654 }
655 produceIndirectPtrType(MIRBuilder, IC: IndirectCall);
656 }
657 } else {
658 // Emit a regular OpFunctionCall
659 CallOp = SPIRV::OpFunctionCall;
660 }
661
662 // Make sure there's a valid return reg, even for functions returning void.
663 if (!ResVReg.isValid())
664 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(RegClass: &SPIRV::iIDRegClass);
665 SPIRVTypeInst RetType = GR->assignTypeToVReg(
666 Type: OrigRetTy, VReg: ResVReg, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
667
668 // Emit the call instruction and its args.
669 auto MIB = MIRBuilder.buildInstr(Opcode: CallOp)
670 .addDef(RegNo: ResVReg)
671 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetType))
672 .add(MO: Info.Callee);
673
674 for (const auto &Arg : Info.OrigArgs) {
675 // Currently call args should have single vregs.
676 if (Arg.Regs.size() > 1)
677 return false;
678 MIB.addUse(RegNo: Arg.Regs[0]);
679 }
680
681 if (Info.CB)
682 MIB.getInstr()->copyIRFlags(I: *Info.CB);
683
684 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_memory_access_aliasing)) {
685 // Process aliasing metadata.
686 const CallBase *CI = Info.CB;
687 if (CI && CI->hasMetadata()) {
688 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_alias_scope))
689 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
690 Dec: SPIRV::Decoration::AliasScopeINTEL, GVarMD: MD);
691 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_noalias))
692 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
693 Dec: SPIRV::Decoration::NoAliasINTEL, GVarMD: MD);
694 }
695 }
696
697 MIB.constrainAllUses(TII: MIRBuilder.getTII(), TRI: *ST->getRegisterInfo(),
698 RBI: *ST->getRegBankInfo());
699 return true;
700}
701