1//===--- SPIRVCallLowering.cpp - Call lowering ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the lowering of LLVM calls to machine code calls for
10// GlobalISel.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SPIRVCallLowering.h"
15#include "MCTargetDesc/SPIRVBaseInfo.h"
16#include "SPIRV.h"
17#include "SPIRVBuiltins.h"
18#include "SPIRVGlobalRegistry.h"
19#include "SPIRVISelLowering.h"
20#include "SPIRVMetadata.h"
21#include "SPIRVRegisterInfo.h"
22#include "SPIRVSubtarget.h"
23#include "SPIRVUtils.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/CodeGen/FunctionLoweringInfo.h"
26#include "llvm/IR/IntrinsicInst.h"
27#include "llvm/IR/IntrinsicsSPIRV.h"
28#include "llvm/Support/ModRef.h"
29
30using namespace llvm;
31
32SPIRVCallLowering::SPIRVCallLowering(const SPIRVTargetLowering &TLI,
33 SPIRVGlobalRegistry *GR)
34 : CallLowering(&TLI), GR(GR) {}
35
36bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
37 const Value *Val, ArrayRef<Register> VRegs,
38 FunctionLoweringInfo &FLI,
39 Register SwiftErrorVReg) const {
40 // Ignore if called from the internal service function
41 if (MIRBuilder.getMF()
42 .getFunction()
43 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
44 .isValid())
45 return true;
46
47 // Currently all return types should use a single register.
48 // TODO: handle the case of multiple registers.
49 if (VRegs.size() > 1)
50 return false;
51
52 if (Val) {
53 const auto &STI = MIRBuilder.getMF().getSubtarget();
54 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturnValue)
55 .addUse(RegNo: VRegs[0])
56 .constrainAllUses(TII: MIRBuilder.getTII(), TRI: *STI.getRegisterInfo(),
57 RBI: *STI.getRegBankInfo());
58 return true;
59 }
60 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturn);
61 return true;
62}
63
64// Based on the LLVM function attributes, get a SPIR-V FunctionControl.
65static uint32_t getFunctionControl(const Function &F,
66 const SPIRVSubtarget *ST) {
67 MemoryEffects MemEffects = F.getMemoryEffects();
68
69 uint32_t FuncControl = static_cast<uint32_t>(SPIRV::FunctionControl::None);
70
71 if (F.hasFnAttribute(Kind: Attribute::AttrKind::NoInline))
72 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::DontInline);
73 else if (F.hasFnAttribute(Kind: Attribute::AttrKind::AlwaysInline))
74 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Inline);
75
76 if (MemEffects.doesNotAccessMemory())
77 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Pure);
78 else if (MemEffects.onlyReadsMemory())
79 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Const);
80
81 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_optnone) ||
82 ST->canUseExtension(E: SPIRV::Extension::SPV_EXT_optnone))
83 if (F.hasFnAttribute(Kind: Attribute::OptimizeNone))
84 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::OptNoneEXT);
85
86 return FuncControl;
87}
88
89// If the function has pointer arguments, we are forced to re-create this
90// function type from the very beginning, changing PointerType by
91// TypedPointerType for each pointer argument. Otherwise, the same `Type*`
92// potentially corresponds to different SPIR-V function type, effectively
93// invalidating logic behind global registry and duplicates tracker.
94static FunctionType *
95fixFunctionTypeIfPtrArgs(SPIRVGlobalRegistry *GR, const Function &F,
96 FunctionType *FTy, SPIRVTypeInst SRetTy,
97 const SmallVector<SPIRVTypeInst, 4> &SArgTys) {
98 bool hasArgPtrs = any_of(Range: F.args(), P: [](const Argument &Arg) {
99 // check if it's an instance of a non-typed PointerType
100 return Arg.getType()->isPointerTy();
101 });
102 if (!hasArgPtrs) {
103 Type *RetTy = FTy->getReturnType();
104 // check if it's an instance of a non-typed PointerType
105 if (!RetTy->isPointerTy())
106 return FTy;
107 }
108
109 // re-create function type, using TypedPointerType instead of PointerType to
110 // properly trace argument types
111 const Type *RetTy = GR->getTypeForSPIRVType(Ty: SRetTy);
112 SmallVector<Type *, 4> ArgTys;
113 for (auto SArgTy : SArgTys)
114 ArgTys.push_back(Elt: const_cast<Type *>(GR->getTypeForSPIRVType(Ty: SArgTy)));
115 return FunctionType::get(Result: const_cast<Type *>(RetTy), Params: ArgTys, isVarArg: false);
116}
117
118static SPIRV::AccessQualifier::AccessQualifier
119getArgAccessQual(const Function &F, unsigned ArgIdx) {
120 if (F.getCallingConv() != CallingConv::SPIR_KERNEL)
121 return SPIRV::AccessQualifier::ReadWrite;
122
123 MDString *ArgAttribute = getOCLKernelArgAccessQual(F, ArgIdx);
124 if (!ArgAttribute)
125 return SPIRV::AccessQualifier::ReadWrite;
126
127 if (ArgAttribute->getString() == "read_only")
128 return SPIRV::AccessQualifier::ReadOnly;
129 if (ArgAttribute->getString() == "write_only")
130 return SPIRV::AccessQualifier::WriteOnly;
131 return SPIRV::AccessQualifier::ReadWrite;
132}
133
134static std::vector<SPIRV::Decoration::Decoration>
135getKernelArgTypeQual(const Function &F, unsigned ArgIdx) {
136 MDString *ArgAttribute = getOCLKernelArgTypeQual(F, ArgIdx);
137 if (ArgAttribute && ArgAttribute->getString() == "volatile")
138 return {SPIRV::Decoration::Volatile};
139 return {};
140}
141
142static SPIRVTypeInst getArgSPIRVType(const Function &F, unsigned ArgIdx,
143 SPIRVGlobalRegistry *GR,
144 MachineIRBuilder &MIRBuilder,
145 const SPIRVSubtarget &ST) {
146 // Read argument's access qualifier from metadata or default.
147 SPIRV::AccessQualifier::AccessQualifier ArgAccessQual =
148 getArgAccessQual(F, ArgIdx);
149
150 Type *OriginalArgType =
151 SPIRV::getOriginalFunctionType(F)->getParamType(i: ArgIdx);
152
153 // Vector of untyped pointers: build with the deduced pointee instead of
154 // the default i8 (mismatches typed uses downstream).
155 Argument *Arg = F.getArg(i: ArgIdx);
156 if (auto *VTy = dyn_cast<FixedVectorType>(Val: OriginalArgType);
157 VTy && isUntypedPointerTy(T: VTy->getElementType()))
158 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg))
159 return GR->getOrCreateSPIRVVectorType(
160 BaseType: GR->getOrCreateSPIRVPointerType(
161 BaseType: ElemTy, MIRBuilder,
162 SC: addressSpaceToStorageClass(
163 AddrSpace: getPointerAddressSpace(T: OriginalArgType), STI: ST)),
164 NumElements: VTy->getNumElements(), MIRBuilder, EmitIR: true);
165
166 // If OriginalArgType is non-pointer, use the OriginalArgType (the type cannot
167 // be legally reassigned later).
168 if (!isPointerTy(T: OriginalArgType))
169 return GR->getOrCreateSPIRVType(Type: OriginalArgType, MIRBuilder, AQ: ArgAccessQual,
170 EmitIR: true);
171
172 Type *ArgType = Arg->getType();
173
174 // In case OriginalArgType is of untyped pointer type, there are three
175 // possibilities:
176 // 1) This is a pointer of an LLVM IR element type, passed byval/byref.
177 // 2) This is an OpenCL/SPIR-V builtin type if there is spv_assign_type
178 // intrinsic assigning a TargetExtType.
179 // 3) This is a pointer, try to retrieve pointer element type from a
180 // spv_assign_ptr_type intrinsic or otherwise use default pointer element
181 // type.
182 if (hasPointeeTypeAttr(Arg)) {
183 return GR->getOrCreateSPIRVPointerType(
184 BaseType: getPointeeTypeByAttr(Arg), MIRBuilder,
185 SC: addressSpaceToStorageClass(AddrSpace: getPointerAddressSpace(T: ArgType), STI: ST));
186 }
187
188 for (auto User : Arg->users()) {
189 auto *II = dyn_cast<IntrinsicInst>(Val: User);
190 // Check if this is spv_assign_type assigning OpenCL/SPIR-V builtin type.
191 if (II && II->getIntrinsicID() == Intrinsic::spv_assign_type) {
192 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
193 Type *BuiltinType =
194 cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType();
195 assert(BuiltinType->isTargetExtTy() && "Expected TargetExtType");
196 return GR->getOrCreateSPIRVType(Type: BuiltinType, MIRBuilder, AQ: ArgAccessQual,
197 EmitIR: true);
198 }
199
200 // Check if this is spv_assign_ptr_type assigning pointer element type.
201 if (!II || II->getIntrinsicID() != Intrinsic::spv_assign_ptr_type)
202 continue;
203
204 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
205 Type *ElementTy =
206 toTypedPointer(Ty: cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType());
207 return GR->getOrCreateSPIRVPointerType(
208 BaseType: ElementTy, MIRBuilder,
209 SC: addressSpaceToStorageClass(
210 AddrSpace: cast<ConstantInt>(Val: II->getOperand(i_nocapture: 2))->getZExtValue(), STI: ST));
211 }
212
213 // Replace PointerType with TypedPointerType to be able to map SPIR-V types to
214 // LLVM types in a consistent manner
215 return GR->getOrCreateSPIRVType(Type: toTypedPointer(Ty: OriginalArgType), MIRBuilder,
216 AQ: ArgAccessQual, EmitIR: true);
217}
218
219static SPIRV::ExecutionModel::ExecutionModel
220getExecutionModel(const SPIRVSubtarget &STI, const Function &F) {
221 assert(STI.getEnv() != SPIRVSubtarget::Unknown &&
222 "Environment must be resolved before lowering entry points.");
223
224 if (STI.isKernel())
225 return SPIRV::ExecutionModel::Kernel;
226
227 auto attribute = F.getFnAttribute(Kind: "hlsl.shader");
228 if (!attribute.isValid()) {
229 report_fatal_error(
230 reason: "This entry point lacks mandatory hlsl.shader attribute.");
231 }
232
233 const auto value = attribute.getValueAsString();
234 if (value == "compute")
235 return SPIRV::ExecutionModel::GLCompute;
236 if (value == "vertex")
237 return SPIRV::ExecutionModel::Vertex;
238 if (value == "pixel")
239 return SPIRV::ExecutionModel::Fragment;
240
241 report_fatal_error(reason: "This HLSL entry point is not supported by this backend.");
242}
243
244bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
245 const Function &F,
246 ArrayRef<ArrayRef<Register>> VRegs,
247 FunctionLoweringInfo &FLI) const {
248 // Discard the internal service function
249 if (F.getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME).isValid())
250 return true;
251
252 assert(GR && "Must initialize the SPIRV type registry before lowering args.");
253 GR->setCurrentFunc(MIRBuilder.getMF());
254
255 // Get access to information about available extensions
256 const SPIRVSubtarget *ST =
257 static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
258
259 // Assign types and names to all args, and store their types for later.
260 SmallVector<SPIRVTypeInst, 4> ArgTypeVRegs;
261 if (VRegs.size() > 0) {
262 unsigned i = 0;
263 for (const auto &Arg : F.args()) {
264 // Currently formal args should use single registers.
265 // TODO: handle the case of multiple registers.
266 if (VRegs[i].size() > 1)
267 return false;
268 SPIRVTypeInst SpirvTy = getArgSPIRVType(F, ArgIdx: i, GR, MIRBuilder, ST: *ST);
269 GR->assignSPIRVTypeToVReg(Type: SpirvTy, VReg: VRegs[i][0], MF: MIRBuilder.getMF());
270 ArgTypeVRegs.push_back(Elt: SpirvTy);
271
272 if (Arg.hasName())
273 buildOpName(Target: VRegs[i][0], Name: Arg.getName(), MIRBuilder);
274 if (isPointerTyOrWrapper(Ty: Arg.getType())) {
275 auto DerefBytes = static_cast<unsigned>(Arg.getDereferenceableBytes());
276 if (DerefBytes != 0)
277 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
278 Dec: SPIRV::Decoration::MaxByteOffset, DecArgs: {DerefBytes});
279 }
280 if (Arg.hasAttribute(Kind: Attribute::Alignment) && !ST->isShader()) {
281 auto Alignment = static_cast<unsigned>(
282 Arg.getAttribute(Kind: Attribute::Alignment).getValueAsInt());
283 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec: SPIRV::Decoration::Alignment,
284 DecArgs: {Alignment});
285 }
286 if (!ST->isShader()) {
287 if (Arg.hasAttribute(Kind: Attribute::ReadOnly)) {
288 auto Attr =
289 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoWrite);
290 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
291 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
292 }
293 if (Arg.hasAttribute(Kind: Attribute::ZExt)) {
294 auto Attr =
295 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Zext);
296 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
297 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
298 }
299 if (Arg.hasAttribute(Kind: Attribute::SExt)) {
300 auto Attr =
301 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sext);
302 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
303 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
304 }
305 if (Arg.hasAttribute(Kind: Attribute::NoAlias)) {
306 auto Attr =
307 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoAlias);
308 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
309 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
310 }
311 // TODO: the AMDGPU BE only supports ByRef argument passing, thus for
312 // AMDGCN flavoured SPIRV we CodeGen for ByRef, but lower it to
313 // ByVal, handling the impedance mismatch during reverse
314 // translation from SPIRV to LLVM IR; the vendor check should be
315 // removed once / if SPIRV adds ByRef support.
316 if (Arg.hasAttribute(Kind: Attribute::ByVal) ||
317 (Arg.hasAttribute(Kind: Attribute::ByRef) &&
318 F.getParent()->getTargetTriple().getVendor() ==
319 Triple::VendorType::AMD)) {
320 auto Attr =
321 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::ByVal);
322 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
323 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
324 }
325 if (Arg.hasAttribute(Kind: Attribute::StructRet)) {
326 auto Attr =
327 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sret);
328 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
329 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
330 }
331 }
332
333 if (F.getCallingConv() == CallingConv::SPIR_KERNEL) {
334 std::vector<SPIRV::Decoration::Decoration> ArgTypeQualDecs =
335 getKernelArgTypeQual(F, ArgIdx: i);
336 for (SPIRV::Decoration::Decoration Decoration : ArgTypeQualDecs)
337 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec: Decoration, DecArgs: {});
338 }
339
340 MDNode *Node = F.getMetadata(Kind: "spirv.ParameterDecorations");
341 if (Node && i < Node->getNumOperands() &&
342 isa<MDNode>(Val: Node->getOperand(I: i))) {
343 MDNode *MD = cast<MDNode>(Val: Node->getOperand(I: i));
344 for (const MDOperand &MDOp : MD->operands()) {
345 MDNode *MD2 = dyn_cast<MDNode>(Val: MDOp);
346 assert(MD2 && "Metadata operand is expected");
347 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: 0);
348 assert(Const && "MDOperand should be ConstantInt");
349 auto Dec =
350 static_cast<SPIRV::Decoration::Decoration>(Const->getZExtValue());
351 std::vector<uint32_t> DecVec;
352 for (unsigned j = 1; j < MD2->getNumOperands(); j++) {
353 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: j);
354 assert(Const && "MDOperand should be ConstantInt");
355 DecVec.push_back(x: static_cast<uint32_t>(Const->getZExtValue()));
356 }
357 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec, DecArgs: DecVec);
358 }
359 }
360 ++i;
361 }
362 }
363
364 auto MRI = MIRBuilder.getMRI();
365 Register FuncVReg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
366 MRI->setRegClass(Reg: FuncVReg, RC: &SPIRV::iIDRegClass);
367 FunctionType *FTy = SPIRV::getOriginalFunctionType(F);
368 Type *FRetTy = FTy->getReturnType();
369 if (isUntypedPointerTy(T: FRetTy)) {
370 if (Type *FRetElemTy = GR->findDeducedElementType(Val: &F)) {
371 TypedPointerType *DerivedTy = TypedPointerType::get(
372 ElementType: toTypedPointer(Ty: FRetElemTy), AddressSpace: getPointerAddressSpace(T: FRetTy));
373 GR->addReturnType(ArgF: &F, DerivedTy);
374 FRetTy = DerivedTy;
375 }
376 }
377 SPIRVTypeInst RetTy = GR->getOrCreateSPIRVType(
378 Type: FRetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
379 FTy = fixFunctionTypeIfPtrArgs(GR, F, FTy, SRetTy: RetTy, SArgTys: ArgTypeVRegs);
380 SPIRVTypeInst FuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
381 Ty: FTy, RetType: RetTy, ArgTypes: ArgTypeVRegs, MIRBuilder);
382 uint32_t FuncControl = getFunctionControl(F, ST);
383
384 // Add OpFunction instruction
385 MachineInstrBuilder MB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunction)
386 .addDef(RegNo: FuncVReg)
387 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetTy))
388 .addImm(Val: FuncControl)
389 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: FuncTy));
390 GR->recordFunctionDefinition(F: &F, MO: &MB.getInstr()->getOperand(i: 0));
391 GR->addGlobalObject(V: &F, MF: &MIRBuilder.getMF(), R: FuncVReg);
392 if (F.isDeclaration())
393 GR->add(V: &F, MI: MB);
394
395 // Add OpFunctionParameter instructions
396 int i = 0;
397 for (const auto &Arg : F.args()) {
398 assert(VRegs[i].size() == 1 && "Formal arg has multiple vregs");
399 Register ArgReg = VRegs[i][0];
400 MRI->setRegClass(Reg: ArgReg, RC: GR->getRegClass(SpvType: ArgTypeVRegs[i]));
401 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunctionParameter)
402 .addDef(RegNo: ArgReg)
403 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: ArgTypeVRegs[i]));
404 if (F.isDeclaration())
405 GR->add(V: &Arg, MI: MIB);
406 GR->addGlobalObject(V: &Arg, MF: &MIRBuilder.getMF(), R: ArgReg);
407 i++;
408 }
409 // Name the function.
410 if (F.hasName())
411 buildOpName(Target: FuncVReg, Name: F.getName(), MIRBuilder);
412
413 // Handle entry points and function linkage.
414 if (isEntryPoint(F)) {
415 if (F.getName().empty())
416 report_fatal_error(reason: "SPIR-V entry point function must have a name");
417 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpEntryPoint)
418 .addImm(Val: static_cast<uint32_t>(getExecutionModel(STI: *ST, F)))
419 .addUse(RegNo: FuncVReg);
420 addStringImm(Str: F.getName(), MIB);
421 } else if (const auto LnkTy = getSpirvLinkageTypeFor(ST: *ST, GV: F);
422 LnkTy && !F.getName().empty()) {
423 buildOpDecorate(Reg: FuncVReg, MIRBuilder, Dec: SPIRV::Decoration::LinkageAttributes,
424 DecArgs: {static_cast<uint32_t>(*LnkTy)}, StrImm: F.getName());
425 }
426
427 // Handle function pointers decoration
428 bool hasFunctionPointers =
429 ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers);
430 if (hasFunctionPointers) {
431 if (F.hasFnAttribute(Kind: "referenced-indirectly")) {
432 assert((F.getCallingConv() != CallingConv::SPIR_KERNEL) &&
433 "Unexpected 'referenced-indirectly' attribute of the kernel "
434 "function");
435 buildOpDecorate(Reg: FuncVReg, MIRBuilder,
436 Dec: SPIRV::Decoration::ReferencedIndirectlyINTEL, DecArgs: {});
437 }
438 }
439
440 return true;
441}
442
443// TODO:
444// - add a topological sort of IndirectCalls to ensure the best types knowledge
445// - we may need to fix function formal parameter types if they are opaque
446// pointers used as function pointers in these indirect calls
447// - defaulting to StorageClass::Function in the absence of the
448// SPV_INTEL_function_pointers extension seems wrong, as that might not be
449// able to hold a full width pointer to function, and it also does not model
450// the semantics of a pointer to function in a generic fashion.
451void SPIRVCallLowering::produceIndirectPtrType(
452 MachineIRBuilder &MIRBuilder,
453 const SPIRVCallLowering::SPIRVIndirectCall &IC) const {
454 // Create indirect call data type if any
455 MachineFunction &MF = MIRBuilder.getMF();
456 const SPIRVSubtarget &ST = MF.getSubtarget<SPIRVSubtarget>();
457 SPIRVTypeInst SpirvRetTy = GR->getOrCreateSPIRVType(
458 Type: IC.RetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
459 SmallVector<SPIRVTypeInst, 4> SpirvArgTypes;
460 for (size_t i = 0; i < IC.ArgTys.size(); ++i) {
461 SPIRVTypeInst SPIRVTy = GR->getOrCreateSPIRVType(
462 Type: IC.ArgTys[i], MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
463 SpirvArgTypes.push_back(Elt: SPIRVTy);
464 if (!GR->getSPIRVTypeForVReg(VReg: IC.ArgRegs[i]))
465 GR->assignSPIRVTypeToVReg(Type: SPIRVTy, VReg: IC.ArgRegs[i], MF);
466 }
467 // SPIR-V function type:
468 FunctionType *FTy =
469 FunctionType::get(Result: const_cast<Type *>(IC.RetTy), Params: IC.ArgTys, isVarArg: false);
470 SPIRVTypeInst SpirvFuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
471 Ty: FTy, RetType: SpirvRetTy, ArgTypes: SpirvArgTypes, MIRBuilder);
472 // SPIR-V pointer to function type:
473 auto SC = ST.canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers)
474 ? SPIRV::StorageClass::CodeSectionINTEL
475 : SPIRV::StorageClass::Function;
476 SPIRVTypeInst IndirectFuncPtrTy =
477 GR->getOrCreateSPIRVPointerType(BaseType: SpirvFuncTy, MIRBuilder, SC);
478 // Correct the Callee type
479 GR->assignSPIRVTypeToVReg(Type: IndirectFuncPtrTy, VReg: IC.Callee, MF);
480}
481
482bool SPIRVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
483 CallLoweringInfo &Info) const {
484 // Currently call returns should have single vregs.
485 // TODO: handle the case of multiple registers.
486 if (Info.OrigRet.Regs.size() > 1)
487 return false;
488 MachineFunction &MF = MIRBuilder.getMF();
489 GR->setCurrentFunc(MF);
490 const Function *CF = nullptr;
491 std::string DemangledName;
492 const Type *OrigRetTy = Info.OrigRet.Ty;
493
494 // Emit a regular OpFunctionCall. If it's an externally declared function,
495 // be sure to emit its type and function declaration here. It will be hoisted
496 // globally later.
497 if (Info.Callee.isGlobal()) {
498 std::string FuncName = Info.Callee.getGlobal()->getName().str();
499 DemangledName = getOclOrSpirvBuiltinDemangledName(Name: FuncName);
500 CF = dyn_cast_or_null<const Function>(Val: Info.Callee.getGlobal());
501 // TODO: support constexpr casts and indirect calls.
502 if (CF == nullptr)
503 return false;
504
505 FunctionType *FTy = SPIRV::getOriginalFunctionType(F: *CF);
506 OrigRetTy = FTy->getReturnType();
507 if (isUntypedPointerTy(T: OrigRetTy)) {
508 if (auto *DerivedRetTy = GR->findReturnType(ArgF: CF))
509 OrigRetTy = DerivedRetTy;
510 }
511 }
512
513 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
514 Register ResVReg =
515 Info.OrigRet.Regs.empty() ? Register(0) : Info.OrigRet.Regs[0];
516 const auto *ST = static_cast<const SPIRVSubtarget *>(&MF.getSubtarget());
517
518 bool isFunctionDecl = CF && CF->isDeclaration();
519 if (isFunctionDecl && !DemangledName.empty()) {
520 if (ResVReg.isValid()) {
521 if (!GR->getSPIRVTypeForVReg(VReg: ResVReg)) {
522 const Type *RetTy = OrigRetTy;
523 if (auto *PtrRetTy = dyn_cast<PointerType>(Val: OrigRetTy)) {
524 const Value *OrigValue = Info.OrigRet.OrigValue;
525 if (!OrigValue)
526 OrigValue = Info.CB;
527 if (OrigValue)
528 if (Type *ElemTy = GR->findDeducedElementType(Val: OrigValue))
529 RetTy =
530 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrRetTy->getAddressSpace());
531 }
532 setRegClassType(Reg: ResVReg, Ty: RetTy, GR, MIRBuilder,
533 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
534 }
535 } else {
536 ResVReg = createVirtualRegister(Ty: OrigRetTy, GR, MIRBuilder,
537 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
538 }
539 SmallVector<Register, 8> ArgVRegs;
540 for (auto Arg : Info.OrigArgs) {
541 assert(Arg.Regs.size() == 1 && "Call arg has multiple VRegs");
542 Register ArgReg = Arg.Regs[0];
543 ArgVRegs.push_back(Elt: ArgReg);
544 SPIRVTypeInst SpvType = GR->getSPIRVTypeForVReg(VReg: ArgReg);
545 if (!SpvType) {
546 Type *ArgTy = nullptr;
547 if (auto *PtrArgTy = dyn_cast<PointerType>(Val: Arg.Ty)) {
548 // If Arg.Ty is an untyped pointer (i.e., ptr [addrspace(...)]) and we
549 // don't have access to original value in LLVM IR or info about
550 // deduced pointee type, then we should wait with setting the type for
551 // the virtual register until pre-legalizer step when we access
552 // @llvm.spv.assign.ptr.type.p...(...)'s info.
553 if (Arg.OrigValue)
554 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg.OrigValue))
555 ArgTy =
556 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrArgTy->getAddressSpace());
557 } else {
558 ArgTy = Arg.Ty;
559 }
560 if (ArgTy) {
561 SpvType = GR->getOrCreateSPIRVType(
562 Type: ArgTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
563 GR->assignSPIRVTypeToVReg(Type: SpvType, VReg: ArgReg, MF);
564 }
565 }
566 if (!MRI->getRegClassOrNull(Reg: ArgReg)) {
567 // Either we have SpvType created, or Arg.Ty is an untyped pointer and
568 // we know its virtual register's class and type even if we don't know
569 // pointee type.
570 MRI->setRegClass(Reg: ArgReg, RC: SpvType ? GR->getRegClass(SpvType)
571 : &SPIRV::pIDRegClass);
572 MRI->setType(
573 VReg: ArgReg,
574 Ty: SpvType ? GR->getRegType(SpvType)
575 : LLT::pointer(AddressSpace: cast<PointerType>(Val: Arg.Ty)->getAddressSpace(),
576 SizeInBits: GR->getPointerSize()));
577 }
578 }
579 if (auto Res = SPIRV::lowerBuiltin(
580 DemangledCall: DemangledName, Set: ST->getPreferredInstructionSet(), MIRBuilder,
581 OrigRet: ResVReg, OrigRetTy, Args: ArgVRegs, GR, CB: *Info.CB))
582 return *Res;
583 }
584
585 if (isFunctionDecl && !GR->find(V: CF, MF: &MF).isValid()) {
586 // Emit the type info and forward function declaration to the first MBB
587 // to ensure VReg definition dependencies are valid across all MBBs.
588 MachineIRBuilder FirstBlockBuilder;
589 FirstBlockBuilder.setMF(MF);
590 FirstBlockBuilder.setMBB(*MF.getBlockNumbered(N: 0));
591
592 SmallVector<ArrayRef<Register>, 8> VRegArgs;
593 SmallVector<SmallVector<Register, 1>, 8> ToInsert;
594 for (const Argument &Arg : CF->args()) {
595 if (MIRBuilder.getDataLayout().getTypeStoreSize(Ty: Arg.getType()).isZero())
596 continue; // Don't handle zero sized types.
597 Register Reg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
598 MRI->setRegClass(Reg, RC: &SPIRV::iIDRegClass);
599 ToInsert.push_back(Elt: {Reg});
600 VRegArgs.push_back(Elt: ToInsert.back());
601 }
602 // TODO: Reuse FunctionLoweringInfo
603 FunctionLoweringInfo FuncInfo;
604 lowerFormalArguments(MIRBuilder&: FirstBlockBuilder, F: *CF, VRegs: VRegArgs, FLI&: FuncInfo);
605 }
606
607 // Ignore the call if it's called from the internal service function
608 if (MIRBuilder.getMF()
609 .getFunction()
610 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
611 .isValid()) {
612 // insert a no-op
613 MIRBuilder.buildTrap();
614 return true;
615 }
616
617 unsigned CallOp;
618 if (Info.CB->isIndirectCall()) {
619 if (!ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers))
620 report_fatal_error(reason: "An indirect call is encountered but SPIR-V without "
621 "extensions does not support it",
622 gen_crash_diag: false);
623 // Set instruction operation according to SPV_INTEL_function_pointers
624 CallOp = SPIRV::OpFunctionPointerCallINTEL;
625 // Collect information about the indirect call to create correct types.
626 Register CalleeReg = Info.Callee.getReg();
627 if (CalleeReg.isValid()) {
628 SPIRVCallLowering::SPIRVIndirectCall IndirectCall;
629 IndirectCall.Callee = CalleeReg;
630 FunctionType *FTy = SPIRV::getOriginalFunctionType(CB: *Info.CB);
631 IndirectCall.RetTy = OrigRetTy = FTy->getReturnType();
632 assert(FTy->getNumParams() == Info.OrigArgs.size() &&
633 "Function types mismatch");
634 for (unsigned I = 0; I != Info.OrigArgs.size(); ++I) {
635 assert(Info.OrigArgs[I].Regs.size() == 1 &&
636 "Call arg has multiple VRegs");
637 IndirectCall.ArgTys.push_back(Elt: FTy->getParamType(i: I));
638 IndirectCall.ArgRegs.push_back(Elt: Info.OrigArgs[I].Regs[0]);
639 }
640 produceIndirectPtrType(MIRBuilder, IC: IndirectCall);
641 }
642 } else {
643 // Emit a regular OpFunctionCall
644 CallOp = SPIRV::OpFunctionCall;
645 }
646
647 // Make sure there's a valid return reg, even for functions returning void.
648 if (!ResVReg.isValid())
649 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(RegClass: &SPIRV::iIDRegClass);
650 SPIRVTypeInst RetType = GR->assignTypeToVReg(
651 Type: OrigRetTy, VReg: ResVReg, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
652
653 // Emit the call instruction and its args.
654 auto MIB = MIRBuilder.buildInstr(Opcode: CallOp)
655 .addDef(RegNo: ResVReg)
656 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetType))
657 .add(MO: Info.Callee);
658
659 for (const auto &Arg : Info.OrigArgs) {
660 // Currently call args should have single vregs.
661 if (Arg.Regs.size() > 1)
662 return false;
663 MIB.addUse(RegNo: Arg.Regs[0]);
664 }
665
666 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_memory_access_aliasing)) {
667 // Process aliasing metadata.
668 const CallBase *CI = Info.CB;
669 if (CI && CI->hasMetadata()) {
670 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_alias_scope))
671 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
672 Dec: SPIRV::Decoration::AliasScopeINTEL, GVarMD: MD);
673 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_noalias))
674 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
675 Dec: SPIRV::Decoration::NoAliasINTEL, GVarMD: MD);
676 }
677 }
678
679 MIB.constrainAllUses(TII: MIRBuilder.getTII(), TRI: *ST->getRegisterInfo(),
680 RBI: *ST->getRegBankInfo());
681 return true;
682}
683