1//===--- SPIRVCallLowering.cpp - Call lowering ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the lowering of LLVM calls to machine code calls for
10// GlobalISel.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SPIRVCallLowering.h"
15#include "MCTargetDesc/SPIRVBaseInfo.h"
16#include "SPIRV.h"
17#include "SPIRVBuiltins.h"
18#include "SPIRVGlobalRegistry.h"
19#include "SPIRVISelLowering.h"
20#include "SPIRVMetadata.h"
21#include "SPIRVRegisterInfo.h"
22#include "SPIRVSubtarget.h"
23#include "SPIRVUtils.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/CodeGen/FunctionLoweringInfo.h"
26#include "llvm/IR/IntrinsicInst.h"
27#include "llvm/IR/IntrinsicsSPIRV.h"
28#include "llvm/Support/ModRef.h"
29
30using namespace llvm;
31
32SPIRVCallLowering::SPIRVCallLowering(const SPIRVTargetLowering &TLI,
33 SPIRVGlobalRegistry *GR)
34 : CallLowering(&TLI), GR(GR) {}
35
36bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
37 const Value *Val, ArrayRef<Register> VRegs,
38 FunctionLoweringInfo &FLI,
39 Register SwiftErrorVReg) const {
40 // Ignore if called from the internal service function
41 if (MIRBuilder.getMF()
42 .getFunction()
43 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
44 .isValid())
45 return true;
46
47 // Currently all return types should use a single register.
48 // TODO: handle the case of multiple registers.
49 if (VRegs.size() > 1)
50 return false;
51
52 if (Val) {
53 const auto &STI = MIRBuilder.getMF().getSubtarget();
54 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturnValue)
55 .addUse(RegNo: VRegs[0])
56 .constrainAllUses(TII: MIRBuilder.getTII(), TRI: *STI.getRegisterInfo(),
57 RBI: *STI.getRegBankInfo());
58 return true;
59 }
60 MIRBuilder.buildInstr(Opcode: SPIRV::OpReturn);
61 return true;
62}
63
64// Based on the LLVM function attributes, get a SPIR-V FunctionControl.
65static uint32_t getFunctionControl(const Function &F,
66 const SPIRVSubtarget *ST) {
67 MemoryEffects MemEffects = F.getMemoryEffects();
68
69 uint32_t FuncControl = static_cast<uint32_t>(SPIRV::FunctionControl::None);
70
71 if (F.hasFnAttribute(Kind: Attribute::AttrKind::NoInline))
72 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::DontInline);
73 else if (F.hasFnAttribute(Kind: Attribute::AttrKind::AlwaysInline))
74 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Inline);
75
76 if (MemEffects.doesNotAccessMemory())
77 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Pure);
78 else if (MemEffects.onlyReadsMemory())
79 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::Const);
80
81 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_optnone) ||
82 ST->canUseExtension(E: SPIRV::Extension::SPV_EXT_optnone))
83 if (F.hasFnAttribute(Kind: Attribute::OptimizeNone))
84 FuncControl |= static_cast<uint32_t>(SPIRV::FunctionControl::OptNoneEXT);
85
86 return FuncControl;
87}
88
89// If the function has pointer arguments, we are forced to re-create this
90// function type from the very beginning, changing PointerType by
91// TypedPointerType for each pointer argument. Otherwise, the same `Type*`
92// potentially corresponds to different SPIR-V function type, effectively
93// invalidating logic behind global registry and duplicates tracker.
94static FunctionType *
95fixFunctionTypeIfPtrArgs(SPIRVGlobalRegistry *GR, const Function &F,
96 FunctionType *FTy, SPIRVTypeInst SRetTy,
97 const SmallVector<SPIRVTypeInst, 4> &SArgTys) {
98 bool hasArgPtrs = any_of(Range: F.args(), P: [](const Argument &Arg) {
99 // check if it's an instance of a non-typed PointerType
100 return Arg.getType()->isPointerTy();
101 });
102 if (!hasArgPtrs) {
103 Type *RetTy = FTy->getReturnType();
104 // check if it's an instance of a non-typed PointerType
105 if (!RetTy->isPointerTy())
106 return FTy;
107 }
108
109 // re-create function type, using TypedPointerType instead of PointerType to
110 // properly trace argument types
111 const Type *RetTy = GR->getTypeForSPIRVType(Ty: SRetTy);
112 SmallVector<Type *, 4> ArgTys;
113 for (auto SArgTy : SArgTys)
114 ArgTys.push_back(Elt: const_cast<Type *>(GR->getTypeForSPIRVType(Ty: SArgTy)));
115 return FunctionType::get(Result: const_cast<Type *>(RetTy), Params: ArgTys, isVarArg: false);
116}
117
118static SPIRV::AccessQualifier::AccessQualifier
119getArgAccessQual(const Function &F, unsigned ArgIdx) {
120 if (F.getCallingConv() != CallingConv::SPIR_KERNEL)
121 return SPIRV::AccessQualifier::ReadWrite;
122
123 MDString *ArgAttribute = getOCLKernelArgAccessQual(F, ArgIdx);
124 if (!ArgAttribute)
125 return SPIRV::AccessQualifier::ReadWrite;
126
127 if (ArgAttribute->getString() == "read_only")
128 return SPIRV::AccessQualifier::ReadOnly;
129 if (ArgAttribute->getString() == "write_only")
130 return SPIRV::AccessQualifier::WriteOnly;
131 return SPIRV::AccessQualifier::ReadWrite;
132}
133
134static SPIRVTypeInst getArgSPIRVType(const Function &F, unsigned ArgIdx,
135 SPIRVGlobalRegistry *GR,
136 MachineIRBuilder &MIRBuilder,
137 const SPIRVSubtarget &ST) {
138 // Read argument's access qualifier from metadata or default.
139 SPIRV::AccessQualifier::AccessQualifier ArgAccessQual =
140 getArgAccessQual(F, ArgIdx);
141
142 Type *OriginalArgType =
143 SPIRV::getOriginalFunctionType(F)->getParamType(i: ArgIdx);
144
145 // Vector of untyped pointers: build with the deduced pointee instead of
146 // the default i8 (mismatches typed uses downstream).
147 Argument *Arg = F.getArg(i: ArgIdx);
148 if (auto *VTy = dyn_cast<FixedVectorType>(Val: OriginalArgType);
149 VTy && isUntypedPointerTy(T: VTy->getElementType()))
150 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg))
151 return GR->getOrCreateSPIRVVectorType(
152 BaseType: GR->getOrCreateSPIRVPointerType(
153 BaseType: ElemTy, MIRBuilder,
154 SC: addressSpaceToStorageClass(
155 AddrSpace: getPointerAddressSpace(T: OriginalArgType), STI: ST)),
156 NumElements: VTy->getNumElements(), MIRBuilder, EmitIR: true);
157
158 // If OriginalArgType is non-pointer, use the OriginalArgType (the type cannot
159 // be legally reassigned later).
160 if (!isPointerTy(T: OriginalArgType))
161 return GR->getOrCreateSPIRVType(Type: OriginalArgType, MIRBuilder, AQ: ArgAccessQual,
162 EmitIR: true);
163
164 Type *ArgType = Arg->getType();
165
166 // In case OriginalArgType is of untyped pointer type, there are three
167 // possibilities:
168 // 1) This is a pointer of an LLVM IR element type, passed byval/byref.
169 // 2) This is an OpenCL/SPIR-V builtin type if there is spv_assign_type
170 // intrinsic assigning a TargetExtType.
171 // 3) This is a pointer, try to retrieve pointer element type from a
172 // spv_assign_ptr_type intrinsic or otherwise use default pointer element
173 // type.
174 if (hasPointeeTypeAttr(Arg)) {
175 // byval/byref/sret carry the aggregate layout in the pointee type, so keep
176 // a typed pointer here. An untyped one drops the type and breaks the
177 // argument ABI on the way back from SPIR-V.
178 return GR->getOrCreateSPIRVTypedPointerType(
179 BaseType: getPointeeTypeByAttr(Arg), MIRBuilder,
180 SC: addressSpaceToStorageClass(AddrSpace: getPointerAddressSpace(T: ArgType), STI: ST));
181 }
182
183 for (auto User : Arg->users()) {
184 auto *II = dyn_cast<IntrinsicInst>(Val: User);
185 // Check if this is spv_assign_type assigning OpenCL/SPIR-V builtin type.
186 if (II && II->getIntrinsicID() == Intrinsic::spv_assign_type) {
187 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
188 Type *BuiltinType =
189 cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType();
190 assert(BuiltinType->isTargetExtTy() && "Expected TargetExtType");
191 return GR->getOrCreateSPIRVType(Type: BuiltinType, MIRBuilder, AQ: ArgAccessQual,
192 EmitIR: true);
193 }
194
195 // Check if this is spv_assign_ptr_type assigning pointer element type.
196 if (!II || II->getIntrinsicID() != Intrinsic::spv_assign_ptr_type)
197 continue;
198
199 MetadataAsValue *VMD = cast<MetadataAsValue>(Val: II->getOperand(i_nocapture: 1));
200 Type *ElementTy =
201 toTypedPointer(Ty: cast<ConstantAsMetadata>(Val: VMD->getMetadata())->getType());
202 return GR->getOrCreateSPIRVPointerType(
203 BaseType: ElementTy, MIRBuilder,
204 SC: addressSpaceToStorageClass(
205 AddrSpace: cast<ConstantInt>(Val: II->getOperand(i_nocapture: 2))->getZExtValue(), STI: ST));
206 }
207
208 // Replace PointerType with TypedPointerType to be able to map SPIR-V types to
209 // LLVM types in a consistent manner
210 return GR->getOrCreateSPIRVType(Type: toTypedPointer(Ty: OriginalArgType), MIRBuilder,
211 AQ: ArgAccessQual, EmitIR: true);
212}
213
214static SPIRV::ExecutionModel::ExecutionModel
215getExecutionModel(const SPIRVSubtarget &STI, const Function &F) {
216 assert(STI.getEnv() != SPIRVSubtarget::Unknown &&
217 "Environment must be resolved before lowering entry points.");
218
219 if (STI.isKernel())
220 return SPIRV::ExecutionModel::Kernel;
221
222 auto attribute = F.getFnAttribute(Kind: "hlsl.shader");
223 if (!attribute.isValid()) {
224 report_fatal_error(
225 reason: "This entry point lacks mandatory hlsl.shader attribute.");
226 }
227
228 const auto value = attribute.getValueAsString();
229 if (value == "compute")
230 return SPIRV::ExecutionModel::GLCompute;
231 if (value == "vertex")
232 return SPIRV::ExecutionModel::Vertex;
233 if (value == "pixel")
234 return SPIRV::ExecutionModel::Fragment;
235
236 report_fatal_error(reason: "This HLSL entry point is not supported by this backend.");
237}
238
239bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
240 const Function &F,
241 ArrayRef<ArrayRef<Register>> VRegs,
242 FunctionLoweringInfo &FLI) const {
243 // Discard the internal service function
244 if (F.getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME).isValid())
245 return true;
246
247 assert(GR && "Must initialize the SPIRV type registry before lowering args.");
248 GR->setCurrentFunc(MIRBuilder.getMF());
249
250 // Get access to information about available extensions
251 const SPIRVSubtarget *ST =
252 static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
253
254 // Assign types and names to all args, and store their types for later.
255 SmallVector<SPIRVTypeInst, 4> ArgTypeVRegs;
256 if (VRegs.size() > 0) {
257 unsigned i = 0;
258 for (const auto &Arg : F.args()) {
259 // Currently formal args should use single registers.
260 // TODO: handle the case of multiple registers.
261 if (VRegs[i].size() > 1)
262 return false;
263 SPIRVTypeInst SpirvTy = getArgSPIRVType(F, ArgIdx: i, GR, MIRBuilder, ST: *ST);
264 GR->assignSPIRVTypeToVReg(Type: SpirvTy, VReg: VRegs[i][0], MF: MIRBuilder.getMF());
265 ArgTypeVRegs.push_back(Elt: SpirvTy);
266
267 if (Arg.hasName())
268 buildOpName(Target: VRegs[i][0], Name: Arg.getName(), MIRBuilder);
269 if (isPointerTyOrWrapper(Ty: Arg.getType())) {
270 auto DerefBytes = static_cast<unsigned>(Arg.getDereferenceableBytes());
271 if (DerefBytes != 0)
272 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
273 Dec: SPIRV::Decoration::MaxByteOffset, DecArgs: {DerefBytes});
274 }
275 if (Arg.hasAttribute(Kind: Attribute::Alignment) && !ST->isShader()) {
276 auto Alignment = static_cast<unsigned>(
277 Arg.getAttribute(Kind: Attribute::Alignment).getValueAsInt());
278 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec: SPIRV::Decoration::Alignment,
279 DecArgs: {Alignment});
280 }
281 if (!ST->isShader()) {
282 if (Arg.hasAttribute(Kind: Attribute::ReadOnly)) {
283 auto Attr =
284 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoWrite);
285 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
286 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
287 }
288 if (Arg.hasAttribute(Kind: Attribute::ZExt)) {
289 auto Attr =
290 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Zext);
291 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
292 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
293 }
294 if (Arg.hasAttribute(Kind: Attribute::SExt)) {
295 auto Attr =
296 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sext);
297 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
298 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
299 }
300 if (Arg.hasAttribute(Kind: Attribute::NoAlias)) {
301 auto Attr =
302 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::NoAlias);
303 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
304 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
305 }
306 // TODO: the AMDGPU BE only supports ByRef argument passing, thus for
307 // AMDGCN flavoured SPIRV we CodeGen for ByRef, but lower it to
308 // ByVal, handling the impedance mismatch during reverse
309 // translation from SPIRV to LLVM IR; the vendor check should be
310 // removed once / if SPIRV adds ByRef support.
311 if (Arg.hasAttribute(Kind: Attribute::ByVal) ||
312 (Arg.hasAttribute(Kind: Attribute::ByRef) &&
313 F.getParent()->getTargetTriple().getVendor() ==
314 Triple::VendorType::AMD)) {
315 auto Attr =
316 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::ByVal);
317 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
318 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
319 }
320 if (Arg.hasAttribute(Kind: Attribute::StructRet)) {
321 auto Attr =
322 static_cast<unsigned>(SPIRV::FunctionParameterAttribute::Sret);
323 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder,
324 Dec: SPIRV::Decoration::FuncParamAttr, DecArgs: {Attr});
325 }
326 }
327
328 MDNode *Node = F.getMetadata(Kind: "spirv.ParameterDecorations");
329 if (Node && i < Node->getNumOperands() &&
330 isa<MDNode>(Val: Node->getOperand(I: i))) {
331 MDNode *MD = cast<MDNode>(Val: Node->getOperand(I: i));
332 for (const MDOperand &MDOp : MD->operands()) {
333 MDNode *MD2 = dyn_cast<MDNode>(Val: MDOp);
334 assert(MD2 && "Metadata operand is expected");
335 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: 0);
336 assert(Const && "MDOperand should be ConstantInt");
337 auto Dec =
338 static_cast<SPIRV::Decoration::Decoration>(Const->getZExtValue());
339 std::vector<uint32_t> DecVec;
340 for (unsigned j = 1; j < MD2->getNumOperands(); j++) {
341 ConstantInt *Const = getMDOperandAsConstInt(N: MD2, I: j);
342 assert(Const && "MDOperand should be ConstantInt");
343 DecVec.push_back(x: static_cast<uint32_t>(Const->getZExtValue()));
344 }
345 buildOpDecorate(Reg: VRegs[i][0], MIRBuilder, Dec, DecArgs: DecVec);
346 }
347 }
348 ++i;
349 }
350 }
351
352 auto MRI = MIRBuilder.getMRI();
353 Register FuncVReg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
354 MRI->setRegClass(Reg: FuncVReg, RC: &SPIRV::iIDRegClass);
355 FunctionType *FTy = SPIRV::getOriginalFunctionType(F);
356 Type *FRetTy = FTy->getReturnType();
357 if (isUntypedPointerTy(T: FRetTy)) {
358 if (Type *FRetElemTy = GR->findDeducedElementType(Val: &F)) {
359 TypedPointerType *DerivedTy = TypedPointerType::get(
360 ElementType: toTypedPointer(Ty: FRetElemTy), AddressSpace: getPointerAddressSpace(T: FRetTy));
361 GR->addReturnType(ArgF: &F, DerivedTy);
362 FRetTy = DerivedTy;
363 }
364 }
365 SPIRVTypeInst RetTy = GR->getOrCreateSPIRVType(
366 Type: FRetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
367 FTy = fixFunctionTypeIfPtrArgs(GR, F, FTy, SRetTy: RetTy, SArgTys: ArgTypeVRegs);
368 SPIRVTypeInst FuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
369 Ty: FTy, RetType: RetTy, ArgTypes: ArgTypeVRegs, MIRBuilder);
370 uint32_t FuncControl = getFunctionControl(F, ST);
371
372 // Add OpFunction instruction
373 MachineInstrBuilder MB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunction)
374 .addDef(RegNo: FuncVReg)
375 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetTy))
376 .addImm(Val: FuncControl)
377 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: FuncTy));
378 GR->recordFunctionDefinition(F: &F, MO: &MB.getInstr()->getOperand(i: 0));
379 GR->addGlobalObject(V: &F, MF: &MIRBuilder.getMF(), R: FuncVReg);
380 if (F.isDeclaration())
381 GR->add(V: &F, MI: MB);
382
383 // Add OpFunctionParameter instructions
384 int i = 0;
385 for (const auto &Arg : F.args()) {
386 assert(VRegs[i].size() == 1 && "Formal arg has multiple vregs");
387 Register ArgReg = VRegs[i][0];
388 MRI->setRegClass(Reg: ArgReg, RC: GR->getRegClass(SpvType: ArgTypeVRegs[i]));
389 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpFunctionParameter)
390 .addDef(RegNo: ArgReg)
391 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: ArgTypeVRegs[i]));
392 if (F.isDeclaration())
393 GR->add(V: &Arg, MI: MIB);
394 GR->addGlobalObject(V: &Arg, MF: &MIRBuilder.getMF(), R: ArgReg);
395 i++;
396 }
397 // Name the function.
398 if (F.hasName())
399 buildOpName(Target: FuncVReg, Name: F.getName(), MIRBuilder);
400
401 // Handle entry points and function linkage.
402 if (isEntryPoint(F)) {
403 if (F.getName().empty())
404 report_fatal_error(reason: "SPIR-V entry point function must have a name");
405 auto MIB = MIRBuilder.buildInstr(Opcode: SPIRV::OpEntryPoint)
406 .addImm(Val: static_cast<uint32_t>(getExecutionModel(STI: *ST, F)))
407 .addUse(RegNo: FuncVReg);
408 addStringImm(Str: F.getName(), MIB);
409 } else if (const auto LnkTy = getSpirvLinkageTypeFor(ST: *ST, GV: F);
410 LnkTy && !F.getName().empty()) {
411 buildOpDecorate(Reg: FuncVReg, MIRBuilder, Dec: SPIRV::Decoration::LinkageAttributes,
412 DecArgs: {static_cast<uint32_t>(*LnkTy)}, StrImm: F.getName());
413 }
414
415 // Handle function pointers decoration
416 bool hasFunctionPointers =
417 ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers);
418 if (hasFunctionPointers) {
419 if (F.hasFnAttribute(Kind: "referenced-indirectly")) {
420 assert((F.getCallingConv() != CallingConv::SPIR_KERNEL) &&
421 "Unexpected 'referenced-indirectly' attribute of the kernel "
422 "function");
423 buildOpDecorate(Reg: FuncVReg, MIRBuilder,
424 Dec: SPIRV::Decoration::ReferencedIndirectlyINTEL, DecArgs: {});
425 }
426 }
427
428 return true;
429}
430
431// TODO:
432// - add a topological sort of IndirectCalls to ensure the best types knowledge
433// - we may need to fix function formal parameter types if they are opaque
434// pointers used as function pointers in these indirect calls
435// - defaulting to StorageClass::Function in the absence of the
436// SPV_INTEL_function_pointers extension seems wrong, as that might not be
437// able to hold a full width pointer to function, and it also does not model
438// the semantics of a pointer to function in a generic fashion.
439void SPIRVCallLowering::produceIndirectPtrType(
440 MachineIRBuilder &MIRBuilder,
441 const SPIRVCallLowering::SPIRVIndirectCall &IC) const {
442 // Create indirect call data type if any
443 MachineFunction &MF = MIRBuilder.getMF();
444 const SPIRVSubtarget &ST = MF.getSubtarget<SPIRVSubtarget>();
445 SPIRVTypeInst SpirvRetTy = GR->getOrCreateSPIRVType(
446 Type: IC.RetTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
447 SmallVector<SPIRVTypeInst, 4> SpirvArgTypes;
448 for (size_t i = 0; i < IC.ArgTys.size(); ++i) {
449 SPIRVTypeInst SPIRVTy = GR->getOrCreateSPIRVType(
450 Type: IC.ArgTys[i], MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
451 SpirvArgTypes.push_back(Elt: SPIRVTy);
452 if (!GR->getSPIRVTypeForVReg(VReg: IC.ArgRegs[i]))
453 GR->assignSPIRVTypeToVReg(Type: SPIRVTy, VReg: IC.ArgRegs[i], MF);
454 }
455 // SPIR-V function type:
456 FunctionType *FTy =
457 FunctionType::get(Result: const_cast<Type *>(IC.RetTy), Params: IC.ArgTys, isVarArg: false);
458 SPIRVTypeInst SpirvFuncTy = GR->getOrCreateOpTypeFunctionWithArgs(
459 Ty: FTy, RetType: SpirvRetTy, ArgTypes: SpirvArgTypes, MIRBuilder);
460 // SPIR-V pointer to function type:
461 auto SC = ST.canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers)
462 ? SPIRV::StorageClass::CodeSectionINTEL
463 : SPIRV::StorageClass::Function;
464 SPIRVTypeInst IndirectFuncPtrTy =
465 GR->getOrCreateSPIRVPointerType(BaseType: SpirvFuncTy, MIRBuilder, SC);
466 // Correct the Callee type
467 GR->assignSPIRVTypeToVReg(Type: IndirectFuncPtrTy, VReg: IC.Callee, MF);
468}
469
470bool SPIRVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
471 CallLoweringInfo &Info) const {
472 // Currently call returns should have single vregs.
473 // TODO: handle the case of multiple registers.
474 if (Info.OrigRet.Regs.size() > 1)
475 return false;
476 MachineFunction &MF = MIRBuilder.getMF();
477 GR->setCurrentFunc(MF);
478 const Function *CF = nullptr;
479 std::string DemangledName;
480 const Type *OrigRetTy = Info.OrigRet.Ty;
481
482 // Emit a regular OpFunctionCall. If it's an externally declared function,
483 // be sure to emit its type and function declaration here. It will be hoisted
484 // globally later.
485 if (Info.Callee.isGlobal()) {
486 std::string FuncName = Info.Callee.getGlobal()->getName().str();
487 DemangledName = getOclOrSpirvBuiltinDemangledName(Name: FuncName);
488 CF = dyn_cast_or_null<const Function>(Val: Info.Callee.getGlobal());
489 // TODO: support constexpr casts and indirect calls.
490 if (CF == nullptr)
491 return false;
492
493 FunctionType *FTy = SPIRV::getOriginalFunctionType(F: *CF);
494 OrigRetTy = FTy->getReturnType();
495 if (isUntypedPointerTy(T: OrigRetTy)) {
496 if (auto *DerivedRetTy = GR->findReturnType(ArgF: CF))
497 OrigRetTy = DerivedRetTy;
498 }
499 }
500
501 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
502 Register ResVReg =
503 Info.OrigRet.Regs.empty() ? Register(0) : Info.OrigRet.Regs[0];
504 const auto *ST = static_cast<const SPIRVSubtarget *>(&MF.getSubtarget());
505
506 bool isFunctionDecl = CF && CF->isDeclaration();
507 if (isFunctionDecl && !DemangledName.empty()) {
508 if (ResVReg.isValid()) {
509 if (!GR->getSPIRVTypeForVReg(VReg: ResVReg)) {
510 const Type *RetTy = OrigRetTy;
511 if (auto *PtrRetTy = dyn_cast<PointerType>(Val: OrigRetTy)) {
512 const Value *OrigValue = Info.OrigRet.OrigValue;
513 if (!OrigValue)
514 OrigValue = Info.CB;
515 if (OrigValue)
516 if (Type *ElemTy = GR->findDeducedElementType(Val: OrigValue))
517 RetTy =
518 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrRetTy->getAddressSpace());
519 }
520 setRegClassType(Reg: ResVReg, Ty: RetTy, GR, MIRBuilder,
521 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
522 }
523 } else {
524 ResVReg = createVirtualRegister(Ty: OrigRetTy, GR, MIRBuilder,
525 AccessQual: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
526 }
527 SmallVector<Register, 8> ArgVRegs;
528 for (auto Arg : Info.OrigArgs) {
529 assert(Arg.Regs.size() == 1 && "Call arg has multiple VRegs");
530 Register ArgReg = Arg.Regs[0];
531 ArgVRegs.push_back(Elt: ArgReg);
532 SPIRVTypeInst SpvType = GR->getSPIRVTypeForVReg(VReg: ArgReg);
533 if (!SpvType) {
534 Type *ArgTy = nullptr;
535 if (auto *PtrArgTy = dyn_cast<PointerType>(Val: Arg.Ty)) {
536 // If Arg.Ty is an untyped pointer (i.e., ptr [addrspace(...)]) and we
537 // don't have access to original value in LLVM IR or info about
538 // deduced pointee type, then we should wait with setting the type for
539 // the virtual register until pre-legalizer step when we access
540 // @llvm.spv.assign.ptr.type.p...(...)'s info.
541 if (Arg.OrigValue)
542 if (Type *ElemTy = GR->findDeducedElementType(Val: Arg.OrigValue))
543 ArgTy =
544 TypedPointerType::get(ElementType: ElemTy, AddressSpace: PtrArgTy->getAddressSpace());
545 } else {
546 ArgTy = Arg.Ty;
547 }
548 if (ArgTy) {
549 SpvType = GR->getOrCreateSPIRVType(
550 Type: ArgTy, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
551 GR->assignSPIRVTypeToVReg(Type: SpvType, VReg: ArgReg, MF);
552 }
553 }
554 if (!MRI->getRegClassOrNull(Reg: ArgReg)) {
555 // Either we have SpvType created, or Arg.Ty is an untyped pointer and
556 // we know its virtual register's class and type even if we don't know
557 // pointee type.
558 MRI->setRegClass(Reg: ArgReg, RC: SpvType ? GR->getRegClass(SpvType)
559 : &SPIRV::pIDRegClass);
560 MRI->setType(
561 VReg: ArgReg,
562 Ty: SpvType ? GR->getRegType(SpvType)
563 : LLT::pointer(AddressSpace: cast<PointerType>(Val: Arg.Ty)->getAddressSpace(),
564 SizeInBits: GR->getPointerSize()));
565 }
566 }
567 if (auto Res = SPIRV::lowerBuiltin(
568 DemangledCall: DemangledName, Set: ST->getPreferredInstructionSet(), MIRBuilder,
569 OrigRet: ResVReg, OrigRetTy, Args: ArgVRegs, GR, CB: *Info.CB))
570 return *Res;
571 }
572
573 if (isFunctionDecl && !GR->find(V: CF, MF: &MF).isValid()) {
574 // Emit the type info and forward function declaration to the first MBB
575 // to ensure VReg definition dependencies are valid across all MBBs.
576 MachineIRBuilder FirstBlockBuilder;
577 FirstBlockBuilder.setMF(MF);
578 FirstBlockBuilder.setMBB(*MF.getBlockNumbered(N: 0));
579
580 SmallVector<ArrayRef<Register>, 8> VRegArgs;
581 SmallVector<SmallVector<Register, 1>, 8> ToInsert;
582 for (const Argument &Arg : CF->args()) {
583 if (MIRBuilder.getDataLayout().getTypeStoreSize(Ty: Arg.getType()).isZero())
584 continue; // Don't handle zero sized types.
585 Register Reg = MRI->createGenericVirtualRegister(Ty: LLT::scalar(SizeInBits: 64));
586 MRI->setRegClass(Reg, RC: &SPIRV::iIDRegClass);
587 ToInsert.push_back(Elt: {Reg});
588 VRegArgs.push_back(Elt: ToInsert.back());
589 }
590 // TODO: Reuse FunctionLoweringInfo
591 FunctionLoweringInfo FuncInfo;
592 lowerFormalArguments(MIRBuilder&: FirstBlockBuilder, F: *CF, VRegs: VRegArgs, FLI&: FuncInfo);
593 }
594
595 // Ignore the call if it's called from the internal service function
596 if (MIRBuilder.getMF()
597 .getFunction()
598 .getFnAttribute(SPIRV_BACKEND_SERVICE_FUN_NAME)
599 .isValid()) {
600 // insert a no-op
601 MIRBuilder.buildTrap();
602 return true;
603 }
604
605 unsigned CallOp;
606 if (Info.CB && Info.CB->isIndirectCall()) {
607 if (!ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_function_pointers))
608 report_fatal_error(reason: "An indirect call is encountered but SPIR-V without "
609 "extensions does not support it",
610 gen_crash_diag: false);
611 // Set instruction operation according to SPV_INTEL_function_pointers
612 CallOp = SPIRV::OpFunctionPointerCallINTEL;
613 // Collect information about the indirect call to create correct types.
614 Register CalleeReg = Info.Callee.getReg();
615 if (CalleeReg.isValid()) {
616 SPIRVCallLowering::SPIRVIndirectCall IndirectCall;
617 IndirectCall.Callee = CalleeReg;
618 FunctionType *FTy = SPIRV::getOriginalFunctionType(CB: *Info.CB);
619 IndirectCall.RetTy = OrigRetTy = FTy->getReturnType();
620 assert(FTy->getNumParams() == Info.OrigArgs.size() &&
621 "Function types mismatch");
622 for (unsigned I = 0; I != Info.OrigArgs.size(); ++I) {
623 assert(Info.OrigArgs[I].Regs.size() == 1 &&
624 "Call arg has multiple VRegs");
625 IndirectCall.ArgTys.push_back(Elt: FTy->getParamType(i: I));
626 IndirectCall.ArgRegs.push_back(Elt: Info.OrigArgs[I].Regs[0]);
627 }
628 produceIndirectPtrType(MIRBuilder, IC: IndirectCall);
629 }
630 } else {
631 // Emit a regular OpFunctionCall
632 CallOp = SPIRV::OpFunctionCall;
633 }
634
635 // Make sure there's a valid return reg, even for functions returning void.
636 if (!ResVReg.isValid())
637 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(RegClass: &SPIRV::iIDRegClass);
638 SPIRVTypeInst RetType = GR->assignTypeToVReg(
639 Type: OrigRetTy, VReg: ResVReg, MIRBuilder, AQ: SPIRV::AccessQualifier::ReadWrite, EmitIR: true);
640
641 // Emit the call instruction and its args.
642 auto MIB = MIRBuilder.buildInstr(Opcode: CallOp)
643 .addDef(RegNo: ResVReg)
644 .addUse(RegNo: GR->getSPIRVTypeID(SpirvType: RetType))
645 .add(MO: Info.Callee);
646
647 for (const auto &Arg : Info.OrigArgs) {
648 // Currently call args should have single vregs.
649 if (Arg.Regs.size() > 1)
650 return false;
651 MIB.addUse(RegNo: Arg.Regs[0]);
652 }
653
654 if (Info.CB)
655 MIB.getInstr()->copyIRFlags(I: *Info.CB);
656
657 if (ST->canUseExtension(E: SPIRV::Extension::SPV_INTEL_memory_access_aliasing)) {
658 // Process aliasing metadata.
659 const CallBase *CI = Info.CB;
660 if (CI && CI->hasMetadata()) {
661 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_alias_scope))
662 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
663 Dec: SPIRV::Decoration::AliasScopeINTEL, GVarMD: MD);
664 if (MDNode *MD = CI->getMetadata(KindID: LLVMContext::MD_noalias))
665 GR->buildMemAliasingOpDecorate(Reg: ResVReg, MIRBuilder,
666 Dec: SPIRV::Decoration::NoAliasINTEL, GVarMD: MD);
667 }
668 }
669
670 MIB.constrainAllUses(TII: MIRBuilder.getTII(), TRI: *ST->getRegisterInfo(),
671 RBI: *ST->getRegBankInfo());
672 return true;
673}
674