1// WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst //
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains code to lower WebAssembly MachineInstrs to their
11/// corresponding MCInst records.
12///
13//===----------------------------------------------------------------------===//
14
15#include "WebAssemblyMCInstLower.h"
16#include "MCTargetDesc/WebAssemblyMCAsmInfo.h"
17#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
18#include "MCTargetDesc/WebAssemblyMCTypeUtilities.h"
19#include "TargetInfo/WebAssemblyTargetInfo.h"
20#include "Utils/WebAssemblyTypeUtilities.h"
21#include "WebAssemblyAsmPrinter.h"
22#include "WebAssemblyMachineFunctionInfo.h"
23#include "WebAssemblyUtilities.h"
24#include "llvm/ADT/APInt.h"
25#include "llvm/ADT/SmallVector.h"
26#include "llvm/BinaryFormat/Wasm.h"
27#include "llvm/CodeGen/AsmPrinter.h"
28#include "llvm/CodeGen/MachineFunction.h"
29#include "llvm/CodeGen/MachineOperand.h"
30#include "llvm/IR/Constants.h"
31#include "llvm/IR/DiagnosticInfo.h"
32#include "llvm/IR/GlobalVariable.h"
33#include "llvm/MC/MCAsmInfo.h"
34#include "llvm/MC/MCContext.h"
35#include "llvm/MC/MCExpr.h"
36#include "llvm/MC/MCInst.h"
37#include "llvm/MC/MCSymbolWasm.h"
38#include "llvm/Support/ErrorHandling.h"
39#include "llvm/Support/raw_ostream.h"
40#include <optional>
41
42using namespace llvm;
43
44// This disables the removal of registers when lowering into MC, as required
45// by some current tests.
46static cl::opt<bool>
47 WasmKeepRegisters("wasm-keep-registers", cl::Hidden,
48 cl::desc("WebAssembly: output stack registers in"
49 " instruction output for test purposes only."),
50 cl::init(Val: false));
51
52static std::optional<bool> getWasmGlobalMutable(const GlobalValue *Global,
53 const Function &CurrentFunc,
54 const DiagnosticLocation &DL) {
55 const auto *BaseObject = Global->getAliaseeObject();
56 const auto *GV = dyn_cast_or_null<GlobalVariable>(Val: BaseObject);
57 if (!GV) {
58 CurrentFunc.getContext().diagnose(DI: DiagnosticInfoUnsupported(
59 CurrentFunc,
60 "wasm_var address space symbol must resolve to a "
61 "GlobalVariable",
62 DL));
63 return std::nullopt;
64 }
65 return !GV->isConstant();
66}
67
68static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI);
69
70MCSymbol *
71WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const {
72 const GlobalValue *Global = MO.getGlobal();
73 if (!isa<Function>(Val: Global)) {
74 auto *WasmSym = static_cast<MCSymbolWasm *>(Printer.getSymbol(GV: Global));
75 // If the symbol doesn't have an explicit WasmSymbolType yet and the
76 // GlobalValue is actually a WebAssembly global, then ensure the symbol is a
77 // WASM_SYMBOL_TYPE_GLOBAL.
78 if (WebAssembly::isWasmVarAddressSpace(AS: Global->getAddressSpace()) &&
79 !WasmSym->getType()) {
80 const MachineInstr &MI = *MO.getParent();
81 const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
82 const TargetMachine &TM = MF.getTarget();
83 const Function &CurrentFunc = MF.getFunction();
84
85 std::optional<bool> Mutable =
86 getWasmGlobalMutable(Global, CurrentFunc, DL: MI.getDebugLoc());
87 if (!Mutable.has_value())
88 return WasmSym;
89
90 Type *GlobalVT = Global->getValueType();
91 SmallVector<MVT, 1> VTs;
92 computeLegalValueVTs(F: CurrentFunc, TM, Ty: GlobalVT, ValueVTs&: VTs);
93
94 WebAssembly::wasmSymbolSetType(Sym: WasmSym, GlobalVT, VTs, Mutable: *Mutable);
95 }
96 return WasmSym;
97 }
98
99 const auto *FuncTy = cast<FunctionType>(Val: Global->getValueType());
100 const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
101 const TargetMachine &TM = MF.getTarget();
102 const Function &CurrentFunc = MF.getFunction();
103
104 SmallVector<MVT, 1> ResultMVTs;
105 SmallVector<MVT, 4> ParamMVTs;
106 const auto *const F = dyn_cast<Function>(Val: Global);
107 computeSignatureVTs(Ty: FuncTy, TargetFunc: F, ContextFunc: CurrentFunc, TM, Params&: ParamMVTs, Results&: ResultMVTs);
108 auto Signature = signatureFromMVTs(Ctx, Results: ResultMVTs, Params: ParamMVTs);
109
110 bool InvokeDetected = false;
111 auto *WasmSym = Printer.getMCSymbolForFunction(F, Sig: Signature, InvokeDetected);
112 WasmSym->setSignature(Signature);
113 WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
114 return WasmSym;
115}
116
117MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol(
118 const MachineOperand &MO) const {
119 return Printer.getOrCreateWasmSymbol(Name: MO.getSymbolName());
120}
121
122MCOperand WebAssemblyMCInstLower::lowerSymbolOperand(const MachineOperand &MO,
123 MCSymbol *Sym) const {
124 auto Spec = WebAssembly::S_None;
125 unsigned TargetFlags = MO.getTargetFlags();
126
127 switch (TargetFlags) {
128 case WebAssemblyII::MO_NO_FLAG:
129 break;
130 case WebAssemblyII::MO_GOT_TLS:
131 Spec = WebAssembly::S_GOT_TLS;
132 break;
133 case WebAssemblyII::MO_GOT:
134 Spec = WebAssembly::S_GOT;
135 break;
136 case WebAssemblyII::MO_MEMORY_BASE_REL:
137 Spec = WebAssembly::S_MBREL;
138 break;
139 case WebAssemblyII::MO_TLS_BASE_REL:
140 Spec = WebAssembly::S_TLSREL;
141 break;
142 case WebAssemblyII::MO_TABLE_BASE_REL:
143 Spec = WebAssembly::S_TBREL;
144 break;
145 default:
146 llvm_unreachable("Unknown target flag on GV operand");
147 }
148
149 const MCExpr *Expr = MCSymbolRefExpr::create(Symbol: Sym, specifier: Spec, Ctx);
150
151 if (MO.getOffset() != 0) {
152 const auto *WasmSym = static_cast<const MCSymbolWasm *>(Sym);
153 if (TargetFlags == WebAssemblyII::MO_GOT)
154 report_fatal_error(reason: "GOT symbol references do not support offsets");
155 if (WasmSym->isFunction())
156 report_fatal_error(reason: "Function addresses with offsets not supported");
157 if (WasmSym->isGlobal())
158 report_fatal_error(reason: "Global indexes with offsets not supported");
159 if (WasmSym->isTag())
160 report_fatal_error(reason: "Tag indexes with offsets not supported");
161 if (WasmSym->isTable())
162 report_fatal_error(reason: "Table indexes with offsets not supported");
163
164 Expr = MCBinaryExpr::createAdd(
165 LHS: Expr, RHS: MCConstantExpr::create(Value: MO.getOffset(), Ctx), Ctx);
166 }
167
168 return MCOperand::createExpr(Val: Expr);
169}
170
171MCOperand WebAssemblyMCInstLower::lowerTypeIndexOperand(
172 SmallVectorImpl<wasm::ValType> &&Returns,
173 SmallVectorImpl<wasm::ValType> &&Params) const {
174 auto Signature = Ctx.createWasmSignature();
175 Signature->Returns = std::move(Returns);
176 Signature->Params = std::move(Params);
177 auto *Sym =
178 static_cast<MCSymbolWasm *>(Printer.createTempSymbol(Name: "typeindex"));
179 Sym->setSignature(Signature);
180 Sym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
181 const MCExpr *Expr =
182 MCSymbolRefExpr::create(Symbol: Sym, specifier: WebAssembly::S_TYPEINDEX, Ctx);
183 return MCOperand::createExpr(Val: Expr);
184}
185
186MCOperand
187WebAssemblyMCInstLower::lowerEncodedFunctionSignature(const APInt &Sig) const {
188 // For APInt a word is 64 bits on all architectures, see definition in APInt.h
189 auto NumWords = Sig.getNumWords();
190 SmallVector<wasm::ValType, 4> Params;
191 SmallVector<wasm::ValType, 2> Returns;
192
193 int Idx = NumWords;
194 auto GetWord = [&Idx, &Sig]() {
195 Idx--;
196 return Sig.extractBitsAsZExtValue(numBits: 64, bitPosition: 64 * Idx);
197 };
198 // Annoying special case: if getSignificantBits() <= 64 then InstrEmitter will
199 // emit an Imm instead of a CImm. It simplifies WebAssemblyMCInstLower if we
200 // always emit a CImm. So xor NParams with 0x7ffffff to ensure
201 // getSignificantBits() > 64
202 // See encodeFunctionSignature in WebAssemblyISelDAGtoDAG.cpp
203 int NReturns = GetWord() ^ 0x7ffffff;
204 for (int I = 0; I < NReturns; I++) {
205 Returns.push_back(Elt: static_cast<wasm::ValType>(GetWord()));
206 }
207 int NParams = GetWord();
208 for (int I = 0; I < NParams; I++) {
209 Params.push_back(Elt: static_cast<wasm::ValType>(GetWord()));
210 }
211 return lowerTypeIndexOperand(Returns: std::move(Returns), Params: std::move(Params));
212}
213
214static void getFunctionReturns(const MachineInstr *MI,
215 SmallVectorImpl<wasm::ValType> &Returns) {
216 const Function &F = MI->getMF()->getFunction();
217 const TargetMachine &TM = MI->getMF()->getTarget();
218 Type *RetTy = F.getReturnType();
219 SmallVector<MVT, 4> CallerRetTys;
220 computeLegalValueVTs(F, TM, Ty: RetTy, ValueVTs&: CallerRetTys);
221 valTypesFromMVTs(In: CallerRetTys, Out&: Returns);
222}
223
224void WebAssemblyMCInstLower::lower(const MachineInstr *MI,
225 MCInst &OutMI) const {
226 OutMI.setOpcode(MI->getOpcode());
227
228 const MCInstrDesc &Desc = MI->getDesc();
229 unsigned NumVariadicDefs = MI->getNumExplicitDefs() - Desc.getNumDefs();
230 const MachineFunction *MF = MI->getMF();
231 const auto &TLI =
232 *MF->getSubtarget<WebAssemblySubtarget>().getTargetLowering();
233 wasm::ValType PtrTy = TLI.getPointerTy(DL: MF->getDataLayout()) == MVT::i32
234 ? wasm::ValType::I32
235 : wasm::ValType::I64;
236
237 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
238 const MachineOperand &MO = MI->getOperand(i: I);
239
240 MCOperand MCOp;
241 switch (MO.getType()) {
242 default:
243 MI->print(OS&: errs());
244 llvm_unreachable("unknown operand type");
245 case MachineOperand::MO_MachineBasicBlock:
246 MI->print(OS&: errs());
247 llvm_unreachable("MachineBasicBlock operand should have been rewritten");
248 case MachineOperand::MO_Register: {
249 // Ignore all implicit register operands.
250 if (MO.isImplicit())
251 continue;
252 const WebAssemblyFunctionInfo &MFI =
253 *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
254 unsigned WAReg = MFI.getWAReg(VReg: MO.getReg());
255 MCOp = MCOperand::createReg(Reg: WAReg);
256 break;
257 }
258 case llvm::MachineOperand::MO_CImmediate: {
259 // Lower type index placeholder for ref.test
260 // Currently this is the only way that CImmediates show up so panic if we
261 // get confused.
262 unsigned DescIndex = I - NumVariadicDefs;
263 assert(DescIndex < Desc.NumOperands && "unexpected CImmediate operand");
264 auto Operands = Desc.operands();
265 const MCOperandInfo &Info = Operands[DescIndex];
266 assert(Info.OperandType == WebAssembly::OPERAND_TYPEINDEX &&
267 "unexpected CImmediate operand");
268 (void)Info;
269 MCOp = lowerEncodedFunctionSignature(Sig: MO.getCImm()->getValue());
270 break;
271 }
272 case MachineOperand::MO_Immediate: {
273 unsigned DescIndex = I - NumVariadicDefs;
274 if (DescIndex < Desc.NumOperands) {
275 auto Operands = Desc.operands();
276 const MCOperandInfo &Info = Operands[DescIndex];
277 // Replace type index placeholder with actual type index. The type index
278 // placeholders are Immediates and have an operand type of
279 // OPERAND_TYPEINDEX or OPERAND_SIGNATURE.
280 if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) {
281 // Lower type index placeholder for a CALL_INDIRECT instruction
282 SmallVector<wasm::ValType, 4> Returns;
283 SmallVector<wasm::ValType, 4> Params;
284
285 const MachineRegisterInfo &MRI =
286 MI->getParent()->getParent()->getRegInfo();
287 for (const MachineOperand &MO : MI->defs())
288 Returns.push_back(Elt: WebAssembly::regClassToValType(
289 RC: MRI.getRegClass(Reg: MO.getReg())->getID()));
290 for (const MachineOperand &MO : MI->explicit_uses())
291 if (MO.isReg())
292 Params.push_back(Elt: WebAssembly::regClassToValType(
293 RC: MRI.getRegClass(Reg: MO.getReg())->getID()));
294
295 // call_indirect instructions have a callee operand at the end which
296 // doesn't count as a param.
297 if (WebAssembly::isCallIndirect(Opc: MI->getOpcode()))
298 Params.pop_back();
299
300 // return_call_indirect instructions have the return type of the
301 // caller
302 if (MI->getOpcode() == WebAssembly::RET_CALL_INDIRECT)
303 getFunctionReturns(MI, Returns);
304
305 MCOp = lowerTypeIndexOperand(Returns: std::move(Returns), Params: std::move(Params));
306 break;
307 }
308 if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) {
309 // Lower type index placeholder for blocks
310 auto BT = static_cast<WebAssembly::BlockType>(MO.getImm());
311 assert(BT != WebAssembly::BlockType::Invalid);
312 if (BT == WebAssembly::BlockType::Multivalue) {
313 SmallVector<wasm::ValType, 2> Returns;
314 // Multivalue blocks are emitted in two cases:
315 // 1. When the blocks will never be exited and are at the ends of
316 // functions (see
317 // WebAssemblyCFGStackify::fixEndsAtEndOfFunction). In this case
318 // the exact multivalue signature can always be inferred from the
319 // return type of the parent function.
320 // 2. (catch_ref ...) clause in try_table instruction. Currently all
321 // tags we support (cpp_exception and c_longjmp) throws a single
322 // pointer, so the multivalue signature for this case will be
323 // (ptr, exnref). Having MO_CATCH_BLOCK_SIG target flags means
324 // this is a destination of a catch_ref.
325 if (MO.getTargetFlags() == WebAssemblyII::MO_CATCH_BLOCK_SIG) {
326 Returns = {PtrTy, wasm::ValType::EXNREF};
327 } else
328 getFunctionReturns(MI, Returns);
329 MCOp = lowerTypeIndexOperand(Returns: std::move(Returns),
330 Params: SmallVector<wasm::ValType, 4>());
331 break;
332 }
333 }
334 }
335 MCOp = MCOperand::createImm(Val: MO.getImm());
336 break;
337 }
338 case MachineOperand::MO_FPImmediate: {
339 const ConstantFP *Imm = MO.getFPImm();
340 const uint64_t BitPattern =
341 Imm->getValueAPF().bitcastToAPInt().getZExtValue();
342 if (Imm->getType()->isFloatTy())
343 MCOp = MCOperand::createSFPImm(Val: static_cast<uint32_t>(BitPattern));
344 else if (Imm->getType()->isDoubleTy())
345 MCOp = MCOperand::createDFPImm(Val: BitPattern);
346 else
347 llvm_unreachable("unknown floating point immediate type");
348 break;
349 }
350 case MachineOperand::MO_GlobalAddress:
351 MCOp = lowerSymbolOperand(MO, Sym: GetGlobalAddressSymbol(MO));
352 break;
353 case MachineOperand::MO_ExternalSymbol:
354 MCOp = lowerSymbolOperand(MO, Sym: GetExternalSymbolSymbol(MO));
355 break;
356 case MachineOperand::MO_MCSymbol:
357 assert(MO.getTargetFlags() == 0 &&
358 "WebAssembly does not use target flags on MCSymbol");
359 MCOp = lowerSymbolOperand(MO, Sym: MO.getMCSymbol());
360 break;
361 }
362
363 OutMI.addOperand(Op: MCOp);
364 }
365
366 if (!WasmKeepRegisters)
367 removeRegisterOperands(MI, OutMI);
368 else if (Desc.variadicOpsAreDefs())
369 OutMI.insert(I: OutMI.begin(), Op: MCOperand::createImm(Val: MI->getNumExplicitDefs()));
370}
371
372static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) {
373 // Remove all uses of stackified registers to bring the instruction format
374 // into its final stack form used thruout MC, and transition opcodes to
375 // their _S variant.
376 // We do this separate from the above code that still may need these
377 // registers for e.g. call_indirect signatures.
378 // See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for
379 // details.
380 // TODO: the code above creates new registers which are then removed here.
381 // That code could be slightly simplified by not doing that, though maybe
382 // it is simpler conceptually to keep the code above in "register mode"
383 // until this transition point.
384 // FIXME: we are not processing inline assembly, which contains register
385 // operands, because it is used by later target generic code.
386 if (MI->isDebugInstr() || MI->isLabel() || MI->isInlineAsm())
387 return;
388
389 // Transform to _S instruction.
390 auto RegOpcode = OutMI.getOpcode();
391 auto StackOpcode = WebAssembly::getStackOpcode(Opcode: RegOpcode);
392 assert(StackOpcode != -1 && "Failed to stackify instruction");
393 OutMI.setOpcode(StackOpcode);
394
395 // Remove register operands.
396 for (auto I = OutMI.getNumOperands(); I; --I) {
397 auto &MO = OutMI.getOperand(i: I - 1);
398 if (MO.isReg()) {
399 OutMI.erase(I: &MO);
400 }
401 }
402}
403