1//===- SplitKit.h - Toolkit for splitting live ranges -----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SplitAnalysis class as well as mutator functions for
10// live range splitting.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
15#define LLVM_LIB_CODEGEN_SPLITKIT_H
16
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/BitVector.h"
19#include "llvm/ADT/DenseMap.h"
20#include "llvm/ADT/DenseSet.h"
21#include "llvm/ADT/IntervalMap.h"
22#include "llvm/ADT/PointerIntPair.h"
23#include "llvm/ADT/SmallPtrSet.h"
24#include "llvm/ADT/SmallVector.h"
25#include "llvm/CodeGen/LiveIntervalCalc.h"
26#include "llvm/CodeGen/LiveIntervals.h"
27#include "llvm/CodeGen/MachineBasicBlock.h"
28#include "llvm/CodeGen/MachineFunction.h"
29#include "llvm/CodeGen/SlotIndexes.h"
30#include "llvm/Support/Compiler.h"
31#include <utility>
32
33namespace llvm {
34
35class LiveInterval;
36class LiveRange;
37class LiveIntervals;
38class LiveRangeEdit;
39class MachineBlockFrequencyInfo;
40class MachineDominatorTree;
41class MachineLoopInfo;
42class MachineRegisterInfo;
43class TargetInstrInfo;
44class TargetRegisterInfo;
45class VirtRegMap;
46class VirtRegAuxInfo;
47
48/// Determines the latest safe point in a block in which we can insert a split,
49/// spill or other instruction related with CurLI.
50class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
51private:
52 const LiveIntervals &LIS;
53
54 /// Last legal insert point in each basic block in the current function.
55 /// The first entry is the first terminator, the second entry is the
56 /// last valid point to insert a split or spill for a variable that is
57 /// live into a landing pad or inlineasm_br successor.
58 SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint;
59
60 SlotIndex computeLastInsertPoint(const LiveInterval &CurLI,
61 const MachineBasicBlock &MBB);
62
63public:
64 InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
65
66 /// Return the base index of the last valid insert point for \pCurLI in \pMBB.
67 SlotIndex getLastInsertPoint(const LiveInterval &CurLI,
68 const MachineBasicBlock &MBB) {
69 unsigned Num = MBB.getNumber();
70 // Inline the common simple case.
71 if (LastInsertPoint[Num].first.isValid() &&
72 !LastInsertPoint[Num].second.isValid())
73 return LastInsertPoint[Num].first;
74 return computeLastInsertPoint(CurLI, MBB);
75 }
76
77 /// Returns the last insert point as an iterator for \pCurLI in \pMBB.
78 MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI,
79 MachineBasicBlock &MBB);
80
81 /// Return the base index of the first insert point in \pMBB.
82 SlotIndex getFirstInsertPoint(MachineBasicBlock &MBB) {
83 SlotIndex Res = LIS.getMBBStartIdx(mbb: &MBB);
84 if (!MBB.empty()) {
85 MachineBasicBlock::iterator MII = MBB.SkipPHIsLabelsAndDebug(I: MBB.begin());
86 if (MII != MBB.end())
87 Res = LIS.getInstructionIndex(Instr: *MII);
88 }
89 return Res;
90 }
91
92};
93
94/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
95/// opportunities.
96class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
97public:
98 const MachineFunction &MF;
99 const VirtRegMap &VRM;
100 const LiveIntervals &LIS;
101 const MachineLoopInfo &Loops;
102 const TargetInstrInfo &TII;
103
104 /// Additional information about basic blocks where the current variable is
105 /// live. Such a block will look like one of these templates:
106 ///
107 /// 1. | o---x | Internal to block. Variable is only live in this block.
108 /// 2. |---x | Live-in, kill.
109 /// 3. | o---| Def, live-out.
110 /// 4. |---x o---| Live-in, kill, def, live-out. Counted by NumGapBlocks.
111 /// 5. |---o---o---| Live-through with uses or defs.
112 /// 6. |-----------| Live-through without uses. Counted by NumThroughBlocks.
113 ///
114 /// Two BlockInfo entries are created for template 4. One for the live-in
115 /// segment, and one for the live-out segment. These entries look as if the
116 /// block were split in the middle where the live range isn't live.
117 ///
118 /// Live-through blocks without any uses don't get BlockInfo entries. They
119 /// are simply listed in ThroughBlocks instead.
120 ///
121 struct BlockInfo {
122 MachineBasicBlock *MBB;
123 SlotIndex FirstInstr; ///< First instr accessing current reg.
124 SlotIndex LastInstr; ///< Last instr accessing current reg.
125 SlotIndex FirstDef; ///< First non-phi valno->def, or SlotIndex().
126 bool LiveIn; ///< Current reg is live in.
127 bool LiveOut; ///< Current reg is live out.
128
129 /// isOneInstr - Returns true when this BlockInfo describes a single
130 /// instruction.
131 bool isOneInstr() const {
132 return SlotIndex::isSameInstr(A: FirstInstr, B: LastInstr);
133 }
134
135 void print(raw_ostream &OS) const;
136 void dump() const;
137 };
138
139private:
140 // Current live interval.
141 const LiveInterval *CurLI = nullptr;
142
143 /// Insert Point Analysis.
144 InsertPointAnalysis IPA;
145
146 // Sorted slot indexes of using instructions.
147 SmallVector<SlotIndex, 8> UseSlots;
148
149 /// UseBlocks - Blocks where CurLI has uses.
150 SmallVector<BlockInfo, 8> UseBlocks;
151
152 /// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where
153 /// the live range has a gap.
154 unsigned NumGapBlocks = 0u;
155
156 /// ThroughBlocks - Block numbers where CurLI is live through without uses.
157 BitVector ThroughBlocks;
158
159 /// NumThroughBlocks - Number of live-through blocks.
160 unsigned NumThroughBlocks = 0u;
161
162 /// LooksLikeLoopIV - The variable defines what looks like it could be a loop
163 /// IV, where it defs a variable in the latch.
164 bool LooksLikeLoopIV = false;
165
166 // Sumarize statistics by counting instructions using CurLI.
167 void analyzeUses();
168
169 /// calcLiveBlockInfo - Compute per-block information about CurLI.
170 void calcLiveBlockInfo();
171
172public:
173 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
174 const MachineLoopInfo &mli);
175
176 /// analyze - set CurLI to the specified interval, and analyze how it may be
177 /// split.
178 void analyze(const LiveInterval *li);
179
180 /// clear - clear all data structures so SplitAnalysis is ready to analyze a
181 /// new interval.
182 void clear();
183
184 /// getParent - Return the last analyzed interval.
185 const LiveInterval &getParent() const { return *CurLI; }
186
187 /// isOriginalEndpoint - Return true if the original live range was killed or
188 /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
189 /// and 'use' for an early-clobber def.
190 /// This can be used to recognize code inserted by earlier live range
191 /// splitting.
192 bool isOriginalEndpoint(SlotIndex Idx) const;
193
194 /// getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
195 /// This include both use and def operands, at most one entry per instruction.
196 ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; }
197
198 /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
199 /// where CurLI has uses.
200 ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; }
201
202 /// getNumThroughBlocks - Return the number of through blocks.
203 unsigned getNumThroughBlocks() const { return NumThroughBlocks; }
204
205 /// isThroughBlock - Return true if CurLI is live through MBB without uses.
206 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(Idx: MBB); }
207
208 /// getThroughBlocks - Return the set of through blocks.
209 const BitVector &getThroughBlocks() const { return ThroughBlocks; }
210
211 /// getNumLiveBlocks - Return the number of blocks where CurLI is live.
212 unsigned getNumLiveBlocks() const {
213 return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
214 }
215
216 bool looksLikeLoopIV() const { return LooksLikeLoopIV; }
217
218 /// countLiveBlocks - Return the number of blocks where li is live. This is
219 /// guaranteed to return the same number as getNumLiveBlocks() after calling
220 /// analyze(li).
221 unsigned countLiveBlocks(const LiveInterval *li) const;
222
223 using BlockPtrSet = SmallPtrSet<const MachineBasicBlock *, 16>;
224
225 /// shouldSplitSingleBlock - Returns true if it would help to create a local
226 /// live range for the instructions in BI. There is normally no benefit to
227 /// creating a live range for a single instruction, but it does enable
228 /// register class inflation if the instruction has a restricted register
229 /// class.
230 ///
231 /// @param BI The block to be isolated.
232 /// @param SingleInstrs True when single instructions should be isolated.
233 bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const;
234
235 SlotIndex getLastSplitPoint(unsigned Num) {
236 return IPA.getLastInsertPoint(CurLI: *CurLI, MBB: *MF.getBlockNumbered(N: Num));
237 }
238
239 SlotIndex getLastSplitPoint(MachineBasicBlock *BB) {
240 return IPA.getLastInsertPoint(CurLI: *CurLI, MBB: *BB);
241 }
242
243 MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) {
244 return IPA.getLastInsertPointIter(CurLI: *CurLI, MBB&: *BB);
245 }
246
247 SlotIndex getFirstSplitPoint(unsigned Num) {
248 return IPA.getFirstInsertPoint(MBB&: *MF.getBlockNumbered(N: Num));
249 }
250};
251
252/// SplitEditor - Edit machine code and LiveIntervals for live range
253/// splitting.
254///
255/// - Create a SplitEditor from a SplitAnalysis.
256/// - Start a new live interval with openIntv.
257/// - Mark the places where the new interval is entered using enterIntv*
258/// - Mark the ranges where the new interval is used with useIntv*
259/// - Mark the places where the interval is exited with exitIntv*.
260/// - Finish the current interval with closeIntv and repeat from 2.
261/// - Rewrite instructions with finish().
262///
263class LLVM_LIBRARY_VISIBILITY SplitEditor {
264 SplitAnalysis &SA;
265 LiveIntervals &LIS;
266 VirtRegMap &VRM;
267 MachineRegisterInfo &MRI;
268 MachineDominatorTree &MDT;
269 const TargetInstrInfo &TII;
270 const TargetRegisterInfo &TRI;
271 const MachineBlockFrequencyInfo &MBFI;
272 VirtRegAuxInfo &VRAI;
273
274public:
275 /// ComplementSpillMode - Select how the complement live range should be
276 /// created. SplitEditor automatically creates interval 0 to contain
277 /// anything that isn't added to another interval. This complement interval
278 /// can get quite complicated, and it can sometimes be an advantage to allow
279 /// it to overlap the other intervals. If it is going to spill anyway, no
280 /// registers are wasted by keeping a value in two places at the same time.
281 enum ComplementSpillMode {
282 /// SM_Partition(Default) - Try to create the complement interval so it
283 /// doesn't overlap any other intervals, and the original interval is
284 /// partitioned. This may require a large number of back copies and extra
285 /// PHI-defs. Only segments marked with overlapIntv will be overlapping.
286 SM_Partition,
287
288 /// SM_Size - Overlap intervals to minimize the number of inserted COPY
289 /// instructions. Copies to the complement interval are hoisted to their
290 /// common dominator, so only one COPY is required per value in the
291 /// complement interval. This also means that no extra PHI-defs need to be
292 /// inserted in the complement interval.
293 SM_Size,
294
295 /// SM_Speed - Overlap intervals to minimize the expected execution
296 /// frequency of the inserted copies. This is very similar to SM_Size, but
297 /// the complement interval may get some extra PHI-defs.
298 SM_Speed
299 };
300
301private:
302 /// Edit - The current parent register and new intervals created.
303 LiveRangeEdit *Edit = nullptr;
304
305 /// Index into Edit of the currently open interval.
306 /// The index 0 is used for the complement, so the first interval started by
307 /// openIntv will be 1.
308 unsigned OpenIdx = 0;
309
310 /// The current spill mode, selected by reset().
311 ComplementSpillMode SpillMode = SM_Partition;
312
313 using RegAssignMap = IntervalMap<SlotIndex, unsigned>;
314
315 /// Allocator for the interval map. This will eventually be shared with
316 /// SlotIndexes and LiveIntervals.
317 RegAssignMap::Allocator Allocator;
318
319 /// RegAssign - Map of the assigned register indexes.
320 /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
321 /// Idx.
322 RegAssignMap RegAssign;
323
324 using ValueForcePair = PointerIntPair<VNInfo *, 1>;
325 using ValueMap = DenseMap<std::pair<unsigned, unsigned>, ValueForcePair>;
326
327 /// Values - keep track of the mapping from parent values to values in the new
328 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
329 ///
330 /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
331 /// 2. (Null, false) - the value is mapped to multiple values in
332 /// Edit.get(RegIdx). Each value is represented by a minimal live range at
333 /// its def. The full live range can be inferred exactly from the range
334 /// of RegIdx in RegAssign.
335 /// 3. (Null, true). As above, but the ranges in RegAssign are too large, and
336 /// the live range must be recomputed using ::extend().
337 /// 4. (VNI, false) The value is mapped to a single new value.
338 /// The new value has no live ranges anywhere.
339 ValueMap Values;
340
341 /// LICalc - Cache for computing live ranges and SSA update. Each instance
342 /// can only handle non-overlapping live ranges, so use a separate
343 /// LiveIntervalCalc instance for the complement interval when in spill mode.
344 LiveIntervalCalc LICalc[2];
345
346 /// getLICalc - Return the LICalc to use for RegIdx. In spill mode, the
347 /// complement interval can overlap the other intervals, so it gets its own
348 /// LICalc instance. When not in spill mode, all intervals can share one.
349 LiveIntervalCalc &getLICalc(unsigned RegIdx) {
350 return LICalc[SpillMode != SM_Partition && RegIdx != 0];
351 }
352
353 /// Add a segment to the interval LI for the value number VNI. If LI has
354 /// subranges, corresponding segments will be added to them as well, but
355 /// with newly created value numbers. If Original is true, dead def will
356 /// only be added a subrange of LI if the corresponding subrange of the
357 /// original interval has a def at this index. Otherwise, all subranges
358 /// of LI will be updated.
359 void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original);
360
361 /// defValue - define a value in RegIdx from ParentVNI at Idx.
362 /// Idx does not have to be ParentVNI->def, but it must be contained within
363 /// ParentVNI's live range in ParentLI. The new value is added to the value
364 /// map. The value being defined may either come from rematerialization
365 /// (or an inserted copy), or it may be coming from the original interval.
366 /// The parameter Original should be true in the latter case, otherwise
367 /// it should be false.
368 /// Return the new LI value.
369 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx,
370 bool Original);
371
372 /// forceRecompute - Force the live range of ParentVNI in RegIdx to be
373 /// recomputed by LiveRangeCalc::extend regardless of the number of defs.
374 /// This is used for values whose live range doesn't match RegAssign exactly.
375 /// They could have rematerialized, or back-copies may have been moved.
376 void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI);
377
378 /// Calls forceRecompute() on any affected regidx and on ParentVNI
379 /// predecessors in case of a phi definition.
380 void forceRecomputeVNI(const VNInfo &ParentVNI);
381
382 /// \return true if rematerializing \p DefMI at \p UseIdx will make the
383 /// register class requirements stricter at the use.
384 bool rematWillIncreaseRestriction(const MachineInstr *DefMI,
385 MachineBasicBlock &MBB,
386 SlotIndex UseIdx) const;
387
388 /// defFromParent - Define Reg from ParentVNI at UseIdx using either
389 /// rematerialization or a COPY from parent. Return the new value.
390 VNInfo *defFromParent(unsigned RegIdx, const VNInfo *ParentVNI,
391 SlotIndex UseIdx, MachineBasicBlock &MBB,
392 MachineBasicBlock::iterator I);
393
394 /// removeBackCopies - Remove the copy instructions that defines the values
395 /// in the vector in the complement interval.
396 void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
397
398 /// getShallowDominator - Returns the least busy dominator of MBB that is
399 /// also dominated by DefMBB. Busy is measured by loop depth.
400 MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
401 MachineBasicBlock *DefMBB);
402
403 /// Find out all the backCopies dominated by others.
404 void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
405 SmallVectorImpl<VNInfo *> &BackCopies);
406
407 /// Hoist back-copies to the complement interval. It tries to hoist all
408 /// the back-copies to one BB if it is beneficial, or else simply remove
409 /// redundant backcopies dominated by others.
410 void hoistCopies();
411
412 /// transferValues - Transfer values to the new ranges.
413 /// Return true if any ranges were skipped.
414 bool transferValues();
415
416 /// Live range @p LR corresponding to the lane Mask @p LM has a live
417 /// PHI def at the beginning of block @p B. Extend the range @p LR of
418 /// all predecessor values that reach this def. If @p LR is a subrange,
419 /// the array @p Undefs is the set of all locations where it is undefined
420 /// via <def,read-undef> in other subranges for the same register.
421 void extendPHIRange(MachineBasicBlock &B, LiveIntervalCalc &LIC,
422 LiveRange &LR, LaneBitmask LM,
423 ArrayRef<SlotIndex> Undefs);
424
425 /// extendPHIKillRanges - Extend the ranges of all values killed by original
426 /// parent PHIDefs.
427 void extendPHIKillRanges();
428
429 /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
430 void rewriteAssigned(bool ExtendRanges);
431
432 /// deleteRematVictims - Delete defs that are dead after rematerializing.
433 void deleteRematVictims();
434
435 /// Add a copy instruction copying \p FromReg to \p ToReg before
436 /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
437 /// necessary to construct a sequence of copies to cover it exactly.
438 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
439 MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
440 bool Late, unsigned RegIdx);
441
442 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
443 MachineBasicBlock &MB,
444 MachineBasicBlock::iterator InsertBefore,
445 unsigned SubIdx, LiveInterval &DestLI,
446 bool Late, SlotIndex Def,
447 const MCInstrDesc &Desc);
448
449public:
450 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
451 /// Newly created intervals will be appended to newIntervals.
452 SplitEditor(SplitAnalysis &SA, LiveIntervals &LIS, VirtRegMap &VRM,
453 MachineDominatorTree &MDT, MachineBlockFrequencyInfo &MBFI,
454 VirtRegAuxInfo &VRAI);
455
456 /// reset - Prepare for a new split.
457 void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
458
459 /// Create a new virtual register and live interval.
460 /// Return the interval index, starting from 1. Interval index 0 is the
461 /// implicit complement interval.
462 unsigned openIntv();
463
464 /// currentIntv - Return the current interval index.
465 unsigned currentIntv() const { return OpenIdx; }
466
467 /// selectIntv - Select a previously opened interval index.
468 void selectIntv(unsigned Idx);
469
470 /// enterIntvBefore - Enter the open interval before the instruction at Idx.
471 /// If the parent interval is not live before Idx, a COPY is not inserted.
472 /// Return the beginning of the new live range.
473 SlotIndex enterIntvBefore(SlotIndex Idx);
474
475 /// enterIntvAfter - Enter the open interval after the instruction at Idx.
476 /// Return the beginning of the new live range.
477 SlotIndex enterIntvAfter(SlotIndex Idx);
478
479 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
480 /// Use the open interval from the inserted copy to the MBB end.
481 /// Return the beginning of the new live range.
482 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
483
484 /// useIntv - indicate that all instructions in MBB should use OpenLI.
485 void useIntv(const MachineBasicBlock &MBB);
486
487 /// useIntv - indicate that all instructions in range should use OpenLI.
488 void useIntv(SlotIndex Start, SlotIndex End);
489
490 /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
491 /// Return the end of the live range.
492 SlotIndex leaveIntvAfter(SlotIndex Idx);
493
494 /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
495 /// Return the end of the live range.
496 SlotIndex leaveIntvBefore(SlotIndex Idx);
497
498 /// leaveIntvAtTop - Leave the interval at the top of MBB.
499 /// Add liveness from the MBB top to the copy.
500 /// Return the end of the live range.
501 SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
502
503 /// overlapIntv - Indicate that all instructions in range should use the open
504 /// interval if End does not have tied-def usage of the register and in this
505 /// case complement interval is used. Let the complement interval be live.
506 ///
507 /// This doubles the register pressure, but is sometimes required to deal with
508 /// register uses after the last valid split point.
509 ///
510 /// The Start index should be a return value from a leaveIntv* call, and End
511 /// should be in the same basic block. The parent interval must have the same
512 /// value across the range.
513 ///
514 void overlapIntv(SlotIndex Start, SlotIndex End);
515
516 /// finish - after all the new live ranges have been created, compute the
517 /// remaining live range, and rewrite instructions to use the new registers.
518 /// @param LRMap When not null, this vector will map each live range in Edit
519 /// back to the indices returned by openIntv.
520 /// There may be extra indices created by dead code elimination.
521 void finish(SmallVectorImpl<unsigned> *LRMap = nullptr);
522
523 /// dump - print the current interval mapping to dbgs().
524 void dump() const;
525
526 // ===--- High level methods ---===
527
528 /// splitSingleBlock - Split CurLI into a separate live interval around the
529 /// uses in a single block. This is intended to be used as part of a larger
530 /// split, and doesn't call finish().
531 void splitSingleBlock(const SplitAnalysis::BlockInfo &BI);
532
533 /// splitLiveThroughBlock - Split CurLI in the given block such that it
534 /// enters the block in IntvIn and leaves it in IntvOut. There may be uses in
535 /// the block, but they will be ignored when placing split points.
536 ///
537 /// @param MBBNum Block number.
538 /// @param IntvIn Interval index entering the block.
539 /// @param LeaveBefore When set, leave IntvIn before this point.
540 /// @param IntvOut Interval index leaving the block.
541 /// @param EnterAfter When set, enter IntvOut after this point.
542 void splitLiveThroughBlock(unsigned MBBNum,
543 unsigned IntvIn, SlotIndex LeaveBefore,
544 unsigned IntvOut, SlotIndex EnterAfter);
545
546 /// splitRegInBlock - Split CurLI in the given block such that it enters the
547 /// block in IntvIn and leaves it on the stack (or not at all). Split points
548 /// are placed in a way that avoids putting uses in the stack interval. This
549 /// may require creating a local interval when there is interference.
550 ///
551 /// @param BI Block descriptor.
552 /// @param IntvIn Interval index entering the block. Not 0.
553 /// @param LeaveBefore When set, leave IntvIn before this point.
554 void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
555 unsigned IntvIn, SlotIndex LeaveBefore);
556
557 /// splitRegOutBlock - Split CurLI in the given block such that it enters the
558 /// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
559 /// Split points are placed to avoid interference and such that the uses are
560 /// not in the stack interval. This may require creating a local interval
561 /// when there is interference.
562 ///
563 /// @param BI Block descriptor.
564 /// @param IntvOut Interval index leaving the block.
565 /// @param EnterAfter When set, enter IntvOut after this point.
566 void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
567 unsigned IntvOut, SlotIndex EnterAfter);
568};
569
570} // end namespace llvm
571
572#endif // LLVM_LIB_CODEGEN_SPLITKIT_H
573