| 1 | //===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file implements the SPARC specific subclass of TargetSubtargetInfo. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "SparcSubtarget.h" |
| 14 | #include "SparcSelectionDAGInfo.h" |
| 15 | #include "llvm/ADT/StringRef.h" |
| 16 | #include "llvm/MC/TargetRegistry.h" |
| 17 | #include "llvm/Support/MathExtras.h" |
| 18 | |
| 19 | using namespace llvm; |
| 20 | |
| 21 | #define DEBUG_TYPE "sparc-subtarget" |
| 22 | |
| 23 | #define GET_SUBTARGETINFO_TARGET_DESC |
| 24 | #define GET_SUBTARGETINFO_CTOR |
| 25 | #include "SparcGenSubtargetInfo.inc" |
| 26 | |
| 27 | void SparcSubtarget::anchor() { } |
| 28 | |
| 29 | SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies( |
| 30 | StringRef CPU, StringRef TuneCPU, StringRef FS) { |
| 31 | // Determine default and user specified characteristics |
| 32 | std::string CPUName = std::string(CPU); |
| 33 | if (CPUName.empty()) |
| 34 | CPUName = (Is64Bit) ? "v9" : "v8" ; |
| 35 | |
| 36 | if (TuneCPU.empty()) |
| 37 | TuneCPU = CPUName; |
| 38 | |
| 39 | // Parse features string. |
| 40 | ParseSubtargetFeatures(CPU: CPUName, TuneCPU, FS); |
| 41 | |
| 42 | // Popc is a v9-only instruction. |
| 43 | if (!IsV9) |
| 44 | UsePopc = false; |
| 45 | |
| 46 | return *this; |
| 47 | } |
| 48 | |
| 49 | SparcSubtarget::SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU, |
| 50 | const StringRef &FS, const TargetMachine &TM, |
| 51 | bool is64Bit) |
| 52 | : SparcGenSubtargetInfo(TM.getTargetTriple(), CPU, TuneCPU, FS), |
| 53 | ReserveRegister(TM.getMCRegisterInfo()->getNumRegs()), |
| 54 | TargetTriple(TM.getTargetTriple()), Is64Bit(is64Bit), |
| 55 | InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)), |
| 56 | TLInfo(TM, *this), FrameLowering(*this) { |
| 57 | TSInfo = std::make_unique<SparcSelectionDAGInfo>(); |
| 58 | } |
| 59 | |
| 60 | SparcSubtarget::~SparcSubtarget() = default; |
| 61 | |
| 62 | const SelectionDAGTargetInfo *SparcSubtarget::getSelectionDAGInfo() const { |
| 63 | return TSInfo.get(); |
| 64 | } |
| 65 | |
| 66 | int SparcSubtarget::getAdjustedFrameSize(int frameSize) const { |
| 67 | |
| 68 | if (is64Bit()) { |
| 69 | // All 64-bit stack frames must be 16-byte aligned, and must reserve space |
| 70 | // for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128. |
| 71 | frameSize += 128; |
| 72 | // Frames with calls must also reserve space for 6 outgoing arguments |
| 73 | // whether they are used or not. LowerCall_64 takes care of that. |
| 74 | frameSize = alignTo(Value: frameSize, Align: 16); |
| 75 | } else { |
| 76 | // Emit the correct save instruction based on the number of bytes in |
| 77 | // the frame. Minimum stack frame size according to V8 ABI is: |
| 78 | // 16 words for register window spill |
| 79 | // 1 word for address of returned aggregate-value |
| 80 | // + 6 words for passing parameters on the stack |
| 81 | // ---------- |
| 82 | // 23 words * 4 bytes per word = 92 bytes |
| 83 | frameSize += 92; |
| 84 | |
| 85 | // Round up to next doubleword boundary -- a double-word boundary |
| 86 | // is required by the ABI. |
| 87 | frameSize = alignTo(Value: frameSize, Align: 8); |
| 88 | } |
| 89 | return frameSize; |
| 90 | } |
| 91 | |
| 92 | bool SparcSubtarget::enableMachineScheduler() const { |
| 93 | return true; |
| 94 | } |
| 95 | |