1//===-- AMDGPUPromoteAlloca.cpp - Promote Allocas -------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Eliminates allocas by either converting them into vectors or by migrating
10// them to local address space.
11//
12// Two passes are exposed by this file:
13// - "promote-alloca-to-vector", which runs early in the pipeline and only
14// promotes to vector. Promotion to vector is almost always profitable
15// except when the alloca is too big and the promotion would result in
16// very high register pressure.
17// - "promote-alloca", which does both promotion to vector and LDS and runs
18// much later in the pipeline. This runs after SROA because promoting to
19// LDS is of course less profitable than getting rid of the alloca or
20// vectorizing it, thus we only want to do it when the only alternative is
21// lowering the alloca to stack.
22//
23// Note that both of them exist for the old and new PMs. The new PM passes are
24// declared in AMDGPU.h and the legacy PM ones are declared here.s
25//
26//===----------------------------------------------------------------------===//
27
28#include "AMDGPU.h"
29#include "GCNSubtarget.h"
30#include "Utils/AMDGPUBaseInfo.h"
31#include "llvm/ADT/STLExtras.h"
32#include "llvm/Analysis/CaptureTracking.h"
33#include "llvm/Analysis/InstSimplifyFolder.h"
34#include "llvm/Analysis/InstructionSimplify.h"
35#include "llvm/Analysis/LoopInfo.h"
36#include "llvm/Analysis/ValueTracking.h"
37#include "llvm/CodeGen/TargetPassConfig.h"
38#include "llvm/IR/IRBuilder.h"
39#include "llvm/IR/IntrinsicInst.h"
40#include "llvm/IR/IntrinsicsAMDGPU.h"
41#include "llvm/IR/IntrinsicsR600.h"
42#include "llvm/IR/PatternMatch.h"
43#include "llvm/InitializePasses.h"
44#include "llvm/Pass.h"
45#include "llvm/Support/MathExtras.h"
46#include "llvm/Target/TargetMachine.h"
47#include "llvm/Transforms/Utils/SSAUpdater.h"
48
49#define DEBUG_TYPE "amdgpu-promote-alloca"
50
51using namespace llvm;
52
53namespace {
54
55static cl::opt<bool>
56 DisablePromoteAllocaToVector("disable-promote-alloca-to-vector",
57 cl::desc("Disable promote alloca to vector"),
58 cl::init(Val: false));
59
60static cl::opt<bool>
61 DisablePromoteAllocaToLDS("disable-promote-alloca-to-lds",
62 cl::desc("Disable promote alloca to LDS"),
63 cl::init(Val: false));
64
65static cl::opt<unsigned> PromoteAllocaToVectorLimit(
66 "amdgpu-promote-alloca-to-vector-limit",
67 cl::desc("Maximum byte size to consider promote alloca to vector"),
68 cl::init(Val: 0));
69
70static cl::opt<unsigned> PromoteAllocaToVectorMaxRegs(
71 "amdgpu-promote-alloca-to-vector-max-regs",
72 cl::desc(
73 "Maximum vector size (in 32b registers) to use when promoting alloca"),
74 cl::init(Val: 32));
75
76// Use up to 1/4 of available register budget for vectorization.
77// FIXME: Increase the limit for whole function budgets? Perhaps x2?
78static cl::opt<unsigned> PromoteAllocaToVectorVGPRRatio(
79 "amdgpu-promote-alloca-to-vector-vgpr-ratio",
80 cl::desc("Ratio of VGPRs to budget for promoting alloca to vectors"),
81 cl::init(Val: 4));
82
83static cl::opt<unsigned>
84 LoopUserWeight("promote-alloca-vector-loop-user-weight",
85 cl::desc("The bonus weight of users of allocas within loop "
86 "when sorting profitable allocas"),
87 cl::init(Val: 4));
88
89// We support vector indices of the form ((A * stride) >> shift) + B
90// VarIndex is A, VarMul is stride, VarShift is shift and ConstIndex is B. All
91// parts are optional.
92struct GEPToVectorIndex {
93 WeakTrackingVH VarIndex = nullptr; // defaults to 0
94 ConstantInt *VarMul = nullptr; // defaults to 1
95 ConstantInt *VarShift = nullptr; // defaults to 0
96 ConstantInt *ConstIndex = nullptr; // defaults to 0
97 Value *Full = nullptr;
98};
99
100struct MemTransferInfo {
101 ConstantInt *SrcIndex = nullptr;
102 ConstantInt *DestIndex = nullptr;
103};
104
105// Analysis for planning the different strategies of alloca promotion.
106struct AllocaAnalysis {
107 AllocaInst *Alloca = nullptr;
108 DenseSet<Value *> Pointers;
109 SmallVector<Use *> Uses;
110 unsigned Score = 0;
111 bool HaveSelectOrPHI = false;
112 struct {
113 FixedVectorType *Ty = nullptr;
114 SmallVector<Instruction *> Worklist;
115 SmallVector<Instruction *> UsersToRemove;
116 MapVector<GetElementPtrInst *, GEPToVectorIndex> GEPVectorIdx;
117 MapVector<MemTransferInst *, MemTransferInfo> TransferInfo;
118 } Vector;
119 struct {
120 bool Enable = false;
121 SmallVector<User *> Worklist;
122 } LDS;
123
124 explicit AllocaAnalysis(AllocaInst *Alloca) : Alloca(Alloca) {}
125};
126
127// Shared implementation which can do both promotion to vector and to LDS.
128class AMDGPUPromoteAllocaImpl {
129private:
130 const TargetMachine &TM;
131 LoopInfo &LI;
132 Module &Mod;
133 const DataLayout &DL;
134
135 // FIXME: This should be per-kernel.
136 uint32_t LocalMemLimit = 0;
137 uint32_t CurrentLocalMemUsage = 0;
138 unsigned MaxVGPRs;
139 unsigned VGPRBudgetRatio;
140 unsigned MaxVectorRegs;
141
142 bool IsAMDGCN = false;
143 bool IsAMDHSA = false;
144
145 std::pair<Value *, Value *> getLocalSizeYZ(IRBuilder<> &Builder);
146 Value *getWorkitemID(IRBuilder<> &Builder, unsigned N);
147
148 bool collectAllocaUses(AllocaAnalysis &AA) const;
149
150 /// Val is a derived pointer from Alloca. OpIdx0/OpIdx1 are the operand
151 /// indices to an instruction with 2 pointer inputs (e.g. select, icmp).
152 /// Returns true if both operands are derived from the same alloca. Val should
153 /// be the same value as one of the input operands of UseInst.
154 bool binaryOpIsDerivedFromSameAlloca(Value *Alloca, Value *Val,
155 Instruction *UseInst, int OpIdx0,
156 int OpIdx1) const;
157
158 /// Check whether we have enough local memory for promotion.
159 bool hasSufficientLocalMem(const Function &F);
160
161 FixedVectorType *getVectorTypeForAlloca(Type *AllocaTy) const;
162 void analyzePromoteToVector(AllocaAnalysis &AA) const;
163 void promoteAllocaToVector(AllocaAnalysis &AA);
164 void analyzePromoteToLDS(AllocaAnalysis &AA) const;
165 bool tryPromoteAllocaToLDS(AllocaAnalysis &AA, bool SufficientLDS,
166 SetVector<IntrinsicInst *> &DeferredIntrs);
167 void
168 finishDeferredAllocaToLDSPromotion(SetVector<IntrinsicInst *> &DeferredIntrs);
169
170 void scoreAlloca(AllocaAnalysis &AA) const;
171
172 void setFunctionLimits(const Function &F);
173
174public:
175 AMDGPUPromoteAllocaImpl(TargetMachine &TM, Module &M, LoopInfo &LI)
176 : TM(TM), LI(LI), Mod(M), DL(M.getDataLayout()) {
177 const Triple &TT = M.getTargetTriple();
178 IsAMDGCN = TT.isAMDGCN();
179 IsAMDHSA = TT.getOS() == Triple::AMDHSA;
180 }
181
182 bool run(Function &F, bool PromoteToLDS);
183};
184
185// FIXME: This can create globals so should be a module pass.
186class AMDGPUPromoteAlloca : public FunctionPass {
187public:
188 static char ID;
189
190 AMDGPUPromoteAlloca() : FunctionPass(ID) {}
191
192 bool runOnFunction(Function &F) override {
193 if (skipFunction(F))
194 return false;
195 if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>())
196 return AMDGPUPromoteAllocaImpl(
197 TPC->getTM<TargetMachine>(), *F.getParent(),
198 getAnalysis<LoopInfoWrapperPass>().getLoopInfo())
199 .run(F, /*PromoteToLDS*/ true);
200 return false;
201 }
202
203 StringRef getPassName() const override { return "AMDGPU Promote Alloca"; }
204
205 void getAnalysisUsage(AnalysisUsage &AU) const override {
206 AU.setPreservesCFG();
207 AU.addRequired<LoopInfoWrapperPass>();
208 FunctionPass::getAnalysisUsage(AU);
209 }
210};
211
212static unsigned getMaxVGPRs(unsigned LDSBytes, const TargetMachine &TM,
213 const Function &F) {
214 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
215
216 unsigned DynamicVGPRBlockSize = AMDGPU::getDynamicVGPRBlockSize(F);
217 unsigned MaxVGPRs = ST.getMaxNumVGPRs(
218 WavesPerEU: ST.getWavesPerEU(FlatWorkGroupSizes: ST.getFlatWorkGroupSizes(F), LDSBytes, F).first,
219 DynamicVGPRBlockSize);
220
221 // A non-entry function has only 32 caller preserved registers.
222 // Do not promote alloca which will force spilling unless we know the function
223 // will be inlined.
224 if (!F.hasFnAttribute(Kind: Attribute::AlwaysInline) &&
225 !AMDGPU::isEntryFunctionCC(CC: F.getCallingConv()))
226 MaxVGPRs = std::min(a: MaxVGPRs, b: 32u);
227 return MaxVGPRs;
228}
229
230} // end anonymous namespace
231
232char AMDGPUPromoteAlloca::ID = 0;
233
234INITIALIZE_PASS_BEGIN(AMDGPUPromoteAlloca, DEBUG_TYPE,
235 "AMDGPU promote alloca to vector or LDS", false, false)
236// Move LDS uses from functions to kernels before promote alloca for accurate
237// estimation of LDS available
238INITIALIZE_PASS_DEPENDENCY(AMDGPULowerModuleLDSLegacy)
239INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
240INITIALIZE_PASS_END(AMDGPUPromoteAlloca, DEBUG_TYPE,
241 "AMDGPU promote alloca to vector or LDS", false, false)
242
243char &llvm::AMDGPUPromoteAllocaID = AMDGPUPromoteAlloca::ID;
244
245PreservedAnalyses AMDGPUPromoteAllocaPass::run(Function &F,
246 FunctionAnalysisManager &AM) {
247 auto &LI = AM.getResult<LoopAnalysis>(IR&: F);
248 bool Changed = AMDGPUPromoteAllocaImpl(TM, *F.getParent(), LI)
249 .run(F, /*PromoteToLDS=*/true);
250 if (Changed) {
251 PreservedAnalyses PA;
252 PA.preserveSet<CFGAnalyses>();
253 return PA;
254 }
255 return PreservedAnalyses::all();
256}
257
258PreservedAnalyses
259AMDGPUPromoteAllocaToVectorPass::run(Function &F, FunctionAnalysisManager &AM) {
260 auto &LI = AM.getResult<LoopAnalysis>(IR&: F);
261 bool Changed = AMDGPUPromoteAllocaImpl(TM, *F.getParent(), LI)
262 .run(F, /*PromoteToLDS=*/false);
263 if (Changed) {
264 PreservedAnalyses PA;
265 PA.preserveSet<CFGAnalyses>();
266 return PA;
267 }
268 return PreservedAnalyses::all();
269}
270
271FunctionPass *llvm::createAMDGPUPromoteAlloca() {
272 return new AMDGPUPromoteAlloca();
273}
274
275bool AMDGPUPromoteAllocaImpl::collectAllocaUses(AllocaAnalysis &AA) const {
276 const auto RejectUser = [&](Instruction *Inst, Twine Msg) {
277 LLVM_DEBUG(dbgs() << " Cannot promote alloca: " << Msg << "\n"
278 << " " << *Inst << "\n");
279 return false;
280 };
281
282 SmallVector<Instruction *, 4> WorkList({AA.Alloca});
283 while (!WorkList.empty()) {
284 auto *Cur = WorkList.pop_back_val();
285 if (find(Range&: AA.Pointers, Val: Cur) != AA.Pointers.end())
286 continue;
287 AA.Pointers.insert(V: Cur);
288 for (auto &U : Cur->uses()) {
289 auto *Inst = cast<Instruction>(Val: U.getUser());
290 if (isa<StoreInst>(Val: Inst)) {
291 if (U.getOperandNo() != StoreInst::getPointerOperandIndex()) {
292 return RejectUser(Inst, "pointer escapes via store");
293 }
294 }
295 AA.Uses.push_back(Elt: &U);
296
297 if (isa<GetElementPtrInst>(Val: U.getUser())) {
298 WorkList.push_back(Elt: Inst);
299 } else if (auto *SI = dyn_cast<SelectInst>(Val: Inst)) {
300 // Only promote a select if we know that the other select operand is
301 // from another pointer that will also be promoted.
302 if (!binaryOpIsDerivedFromSameAlloca(Alloca: AA.Alloca, Val: Cur, UseInst: SI, OpIdx0: 1, OpIdx1: 2))
303 return RejectUser(Inst, "select from mixed objects");
304 WorkList.push_back(Elt: Inst);
305 AA.HaveSelectOrPHI = true;
306 } else if (auto *Phi = dyn_cast<PHINode>(Val: Inst)) {
307 // Repeat for phis.
308
309 // TODO: Handle more complex cases. We should be able to replace loops
310 // over arrays.
311 switch (Phi->getNumIncomingValues()) {
312 case 1:
313 break;
314 case 2:
315 if (!binaryOpIsDerivedFromSameAlloca(Alloca: AA.Alloca, Val: Cur, UseInst: Phi, OpIdx0: 0, OpIdx1: 1))
316 return RejectUser(Inst, "phi from mixed objects");
317 break;
318 default:
319 return RejectUser(Inst, "phi with too many operands");
320 }
321
322 WorkList.push_back(Elt: Inst);
323 AA.HaveSelectOrPHI = true;
324 }
325 }
326 }
327 return true;
328}
329
330void AMDGPUPromoteAllocaImpl::scoreAlloca(AllocaAnalysis &AA) const {
331 LLVM_DEBUG(dbgs() << "Scoring: " << *AA.Alloca << "\n");
332 unsigned Score = 0;
333 // Increment score by one for each user + a bonus for users within loops.
334 for (auto *U : AA.Uses) {
335 Instruction *Inst = cast<Instruction>(Val: U->getUser());
336 if (isa<GetElementPtrInst>(Val: Inst) || isa<SelectInst>(Val: Inst) ||
337 isa<PHINode>(Val: Inst))
338 continue;
339 unsigned UserScore =
340 1 + (LoopUserWeight * LI.getLoopDepth(BB: Inst->getParent()));
341 LLVM_DEBUG(dbgs() << " [+" << UserScore << "]:\t" << *Inst << "\n");
342 Score += UserScore;
343 }
344 LLVM_DEBUG(dbgs() << " => Final Score:" << Score << "\n");
345 AA.Score = Score;
346}
347
348void AMDGPUPromoteAllocaImpl::setFunctionLimits(const Function &F) {
349 // Load per function limits, overriding with global options where appropriate.
350 // R600 register tuples/aliasing are fragile with large vector promotions so
351 // apply architecture specific limit here.
352 const int R600MaxVectorRegs = 16;
353 MaxVectorRegs = F.getFnAttributeAsParsedInteger(
354 Kind: "amdgpu-promote-alloca-to-vector-max-regs",
355 Default: IsAMDGCN ? PromoteAllocaToVectorMaxRegs : R600MaxVectorRegs);
356 if (PromoteAllocaToVectorMaxRegs.getNumOccurrences())
357 MaxVectorRegs = PromoteAllocaToVectorMaxRegs;
358 VGPRBudgetRatio = F.getFnAttributeAsParsedInteger(
359 Kind: "amdgpu-promote-alloca-to-vector-vgpr-ratio",
360 Default: PromoteAllocaToVectorVGPRRatio);
361 if (PromoteAllocaToVectorVGPRRatio.getNumOccurrences())
362 VGPRBudgetRatio = PromoteAllocaToVectorVGPRRatio;
363}
364
365bool AMDGPUPromoteAllocaImpl::run(Function &F, bool PromoteToLDS) {
366 if (DisablePromoteAllocaToLDS && DisablePromoteAllocaToVector)
367 return false;
368
369 bool SufficientLDS = PromoteToLDS && hasSufficientLocalMem(F);
370 MaxVGPRs = IsAMDGCN ? getMaxVGPRs(LDSBytes: CurrentLocalMemUsage, TM, F) : 128;
371 setFunctionLimits(F);
372
373 unsigned VectorizationBudget =
374 (PromoteAllocaToVectorLimit ? PromoteAllocaToVectorLimit * 8
375 : (MaxVGPRs * 32)) /
376 VGPRBudgetRatio;
377
378 std::vector<AllocaAnalysis> Allocas;
379 for (Instruction &I : F.getEntryBlock()) {
380 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val: &I)) {
381 // Array allocations are probably not worth handling, since an allocation
382 // of the array type is the canonical form.
383 if (!AI->isStaticAlloca() || AI->isArrayAllocation())
384 continue;
385
386 LLVM_DEBUG(dbgs() << "Analyzing: " << *AI << '\n');
387
388 AllocaAnalysis AA{AI};
389 if (collectAllocaUses(AA)) {
390 analyzePromoteToVector(AA);
391 if (PromoteToLDS)
392 analyzePromoteToLDS(AA);
393 if (AA.Vector.Ty || AA.LDS.Enable) {
394 scoreAlloca(AA);
395 Allocas.push_back(x: std::move(AA));
396 }
397 }
398 }
399 }
400
401 stable_sort(Range&: Allocas,
402 C: [](const auto &A, const auto &B) { return A.Score > B.Score; });
403
404 // clang-format off
405 LLVM_DEBUG(
406 dbgs() << "Sorted Worklist:\n";
407 for (const auto &AA : Allocas)
408 dbgs() << " " << *AA.Alloca << "\n";
409 );
410 // clang-format on
411
412 bool Changed = false;
413 SetVector<IntrinsicInst *> DeferredIntrs;
414 for (AllocaAnalysis &AA : Allocas) {
415 if (AA.Vector.Ty) {
416 std::optional<TypeSize> Size = AA.Alloca->getAllocationSize(DL);
417 assert(Size); // Expected to succeed on non-array alloca.
418 const unsigned AllocaCost = Size->getFixedValue() * 8;
419 // First, check if we have enough budget to vectorize this alloca.
420 if (AllocaCost <= VectorizationBudget) {
421 promoteAllocaToVector(AA);
422 Changed = true;
423 assert((VectorizationBudget - AllocaCost) < VectorizationBudget &&
424 "Underflow!");
425 VectorizationBudget -= AllocaCost;
426 LLVM_DEBUG(dbgs() << " Remaining vectorization budget:"
427 << VectorizationBudget << "\n");
428 continue;
429 } else {
430 LLVM_DEBUG(dbgs() << "Alloca too big for vectorization (size:"
431 << AllocaCost << ", budget:" << VectorizationBudget
432 << "): " << *AA.Alloca << "\n");
433 }
434 }
435
436 if (AA.LDS.Enable &&
437 tryPromoteAllocaToLDS(AA, SufficientLDS, DeferredIntrs))
438 Changed = true;
439 }
440 finishDeferredAllocaToLDSPromotion(DeferredIntrs);
441
442 // NOTE: tryPromoteAllocaToVector removes the alloca, so Allocas contains
443 // dangling pointers. If we want to reuse it past this point, the loop above
444 // would need to be updated to remove successfully promoted allocas.
445
446 return Changed;
447}
448
449// Checks if the instruction I is a memset user of the alloca AI that we can
450// deal with. Currently, only non-volatile memsets that affect the whole alloca
451// are handled.
452static bool isSupportedMemset(MemSetInst *I, AllocaInst *AI,
453 const DataLayout &DL) {
454 using namespace PatternMatch;
455 // For now we only care about non-volatile memsets that affect the whole type
456 // (start at index 0 and fill the whole alloca).
457 //
458 // TODO: Now that we moved to PromoteAlloca we could handle any memsets
459 // (except maybe volatile ones?) - we just need to use shufflevector if it
460 // only affects a subset of the vector.
461 const unsigned Size = DL.getTypeStoreSize(Ty: AI->getAllocatedType());
462 return I->getOperand(i_nocapture: 0) == AI &&
463 match(V: I->getOperand(i_nocapture: 2), P: m_SpecificInt(V: Size)) && !I->isVolatile();
464}
465
466static Value *calculateVectorIndex(Value *Ptr, AllocaAnalysis &AA) {
467 IRBuilder<> B(Ptr->getContext());
468
469 Ptr = Ptr->stripPointerCasts();
470 if (Ptr == AA.Alloca)
471 return B.getInt32(C: 0);
472
473 auto *GEP = cast<GetElementPtrInst>(Val: Ptr);
474 auto I = AA.Vector.GEPVectorIdx.find(Key: GEP);
475 assert(I != AA.Vector.GEPVectorIdx.end() && "Must have entry for GEP!");
476
477 if (!I->second.Full) {
478 Value *Result = nullptr;
479 B.SetInsertPoint(GEP);
480
481 if (I->second.VarIndex) {
482 Result = I->second.VarIndex;
483 Result = B.CreateSExtOrTrunc(V: Result, DestTy: B.getInt32Ty());
484
485 if (I->second.VarMul)
486 Result = B.CreateMul(LHS: Result, RHS: I->second.VarMul);
487
488 if (I->second.VarShift)
489 Result = B.CreateAShr(LHS: Result, RHS: I->second.VarShift, Name: "", /*isExact*/ true);
490 }
491
492 if (I->second.ConstIndex) {
493 if (Result)
494 Result = B.CreateAdd(LHS: Result, RHS: I->second.ConstIndex);
495 else
496 Result = I->second.ConstIndex;
497 }
498
499 if (!Result)
500 Result = B.getInt32(C: 0);
501
502 I->second.Full = Result;
503 }
504
505 return I->second.Full;
506}
507
508static std::optional<GEPToVectorIndex>
509computeGEPToVectorIndex(GetElementPtrInst *GEP, AllocaInst *Alloca,
510 Type *VecElemTy, const DataLayout &DL) {
511 // TODO: Extracting a "multiple of X" from a GEP might be a useful generic
512 // helper.
513 LLVMContext &Ctx = GEP->getContext();
514 unsigned BW = DL.getIndexTypeSizeInBits(Ty: GEP->getType());
515 SmallMapVector<Value *, APInt, 4> VarOffsets;
516 APInt ConstOffset(BW, 0);
517
518 // Walk backwards through nested GEPs to collect both constant and variable
519 // offsets, so that nested vector GEP chains can be lowered in one step.
520 //
521 // Given this IR fragment as input:
522 //
523 // %0 = alloca [10 x <2 x i32>], align 8, addrspace(5)
524 // %1 = getelementptr [10 x <2 x i32>], ptr addrspace(5) %0, i32 0, i32 %j
525 // %2 = getelementptr i8, ptr addrspace(5) %1, i32 4
526 // %3 = load i32, ptr addrspace(5) %2, align 4
527 //
528 // Combine both GEP operations in a single pass, producing:
529 // BasePtr = %0
530 // ConstOffset = 4
531 // VarOffsets = { %j -> element_size(<2 x i32>) }
532 //
533 // That lets us emit a single buffer_load directly into a VGPR, without ever
534 // allocating scratch memory for the intermediate pointer.
535 Value *CurPtr = GEP;
536 while (auto *CurGEP = dyn_cast<GetElementPtrInst>(Val: CurPtr)) {
537 if (!CurGEP->collectOffset(DL, BitWidth: BW, VariableOffsets&: VarOffsets, ConstantOffset&: ConstOffset))
538 return {};
539
540 // Move to the next outer pointer.
541 CurPtr = CurGEP->getPointerOperand();
542 }
543
544 assert(CurPtr == Alloca && "GEP not based on alloca");
545
546 int64_t VecElemSize = DL.getTypeAllocSize(Ty: VecElemTy);
547 if (VarOffsets.size() > 1)
548 return {};
549
550 // We support vector indices of the form ((VarIndex * stride) >> shift) + B.
551 // IndexQuot represents B. Check that the constant offset is a multiple
552 // of the vector element size.
553 if (ConstOffset.srem(RHS: VecElemSize) != 0)
554 return {};
555 APInt IndexQuot = ConstOffset.sdiv(RHS: VecElemSize);
556
557 GEPToVectorIndex Result;
558
559 if (!ConstOffset.isZero())
560 Result.ConstIndex = ConstantInt::get(Context&: Ctx, V: IndexQuot.sextOrTrunc(width: BW));
561
562 // If there are no variable offsets, only a constant offset, then we're done.
563 if (VarOffsets.empty())
564 return Result;
565
566 // Scale is the stride in the (A * stride) part. Check that there is only one
567 // variable offset and extract the scale factor.
568 const auto &VarOffset = VarOffsets.front();
569 auto ScaleOpt = VarOffset.second.tryZExtValue();
570 if (!ScaleOpt || *ScaleOpt == 0)
571 return {};
572
573 uint64_t Scale = *ScaleOpt;
574 Result.VarIndex = VarOffset.first;
575 auto *OffsetType = dyn_cast<IntegerType>(Val: Result.VarIndex->getType());
576 if (!OffsetType)
577 return {};
578
579 // The vector index for the variable part is: VarIndex * Scale / VecElemSize.
580 if (Scale >= (uint64_t)VecElemSize) {
581 if (Scale % VecElemSize != 0)
582 return {};
583
584 // Scale is a multiple of VecElemSize, so the index is just: VarIndex *
585 // (Scale / VecElemSize).
586 uint64_t VarMul = Scale / VecElemSize;
587 // Only the multiplier is needed.
588 if (VarMul != 1)
589 Result.VarMul = ConstantInt::get(Context&: Ctx, V: APInt(BW, VarMul));
590 } else {
591 if ((uint64_t)VecElemSize % Scale != 0)
592 return {};
593
594 // VecElemSize is a multiple of Scale, so the index is just: VarIndex /
595 // (VecElemSize / Scale).
596 uint64_t Divisor = VecElemSize / Scale;
597 // The divisor must be a power of 2 so we can use a right shift.
598 if (!isPowerOf2_64(Value: Divisor))
599 return {};
600
601 // VarIndex must be known to be divisible by that divisor.
602 KnownBits KB = computeKnownBits(V: VarOffset.first, DL);
603 if (KB.countMinTrailingZeros() < Log2_64(Value: Divisor))
604 return {};
605
606 Result.VarShift = ConstantInt::get(Context&: Ctx, V: APInt(BW, Log2_64(Value: Divisor)));
607 }
608
609 return Result;
610}
611
612/// Promotes a single user of the alloca to a vector form.
613///
614/// \param Inst Instruction to be promoted.
615/// \param DL Module Data Layout.
616/// \param AA Alloca Analysis.
617/// \param VecStoreSize Size of \p VectorTy in bytes.
618/// \param ElementSize Size of \p VectorTy element type in bytes.
619/// \param CurVal Current value of the vector (e.g. last stored value)
620/// \param[out] DeferredLoads \p Inst is added to this vector if it can't
621/// be promoted now. This happens when promoting requires \p
622/// CurVal, but \p CurVal is nullptr.
623/// \return the stored value if \p Inst would have written to the alloca, or
624/// nullptr otherwise.
625static Value *promoteAllocaUserToVector(Instruction *Inst, const DataLayout &DL,
626 AllocaAnalysis &AA,
627 unsigned VecStoreSize,
628 unsigned ElementSize,
629 function_ref<Value *()> GetCurVal) {
630 // Note: we use InstSimplifyFolder because it can leverage the DataLayout
631 // to do more folding, especially in the case of vector splats.
632 IRBuilder<InstSimplifyFolder> Builder(Inst->getContext(),
633 InstSimplifyFolder(DL));
634 Builder.SetInsertPoint(Inst);
635
636 Type *VecEltTy = AA.Vector.Ty->getElementType();
637
638 switch (Inst->getOpcode()) {
639 case Instruction::Load: {
640 Value *CurVal = GetCurVal();
641 Value *Index =
642 calculateVectorIndex(Ptr: cast<LoadInst>(Val: Inst)->getPointerOperand(), AA);
643
644 // We're loading the full vector.
645 Type *AccessTy = Inst->getType();
646 TypeSize AccessSize = DL.getTypeStoreSize(Ty: AccessTy);
647 if (Constant *CI = dyn_cast<Constant>(Val: Index)) {
648 if (CI->isNullValue() && AccessSize == VecStoreSize) {
649 Inst->replaceAllUsesWith(
650 V: Builder.CreateBitPreservingCastChain(DL, V: CurVal, NewTy: AccessTy));
651 return nullptr;
652 }
653 }
654
655 // Loading a subvector, or a scalar that spans several elements.
656 TypeSize EltSize = DL.getTypeStoreSize(Ty: VecEltTy);
657 assert(AccessSize.isKnownMultipleOf(EltSize) &&
658 "promotable access must cover a whole number of elements");
659 const unsigned NumLoadedElts = AccessSize / EltSize;
660 if (NumLoadedElts > 1) {
661 auto *SubVecTy = FixedVectorType::get(ElementType: VecEltTy, NumElts: NumLoadedElts);
662 assert(DL.getTypeStoreSize(SubVecTy) == DL.getTypeStoreSize(AccessTy));
663
664 // If idx is dynamic, then sandwich load with bitcasts.
665 // ie. VectorTy SubVecTy AccessTy
666 // <64 x i8> -> <16 x i8> <8 x i16>
667 // <64 x i8> -> <4 x i128> -> i128 -> <8 x i16>
668 // Extracting subvector with dynamic index has very large expansion in
669 // the amdgpu backend. Limit to pow2.
670 FixedVectorType *VectorTy = AA.Vector.Ty;
671 TypeSize NumBits = DL.getTypeStoreSize(Ty: SubVecTy) * 8u;
672 uint64_t LoadAlign = cast<LoadInst>(Val: Inst)->getAlign().value();
673 bool IsAlignedLoad = NumBits <= (LoadAlign * 8u);
674 unsigned TotalNumElts = VectorTy->getNumElements();
675 bool IsProperlyDivisible = TotalNumElts % NumLoadedElts == 0;
676 if (!isa<ConstantInt>(Val: Index) &&
677 llvm::isPowerOf2_32(Value: SubVecTy->getNumElements()) &&
678 IsProperlyDivisible && IsAlignedLoad) {
679 IntegerType *NewElemTy = Builder.getIntNTy(N: NumBits);
680 const unsigned NewNumElts =
681 DL.getTypeStoreSize(Ty: VectorTy) * 8u / NumBits;
682 const unsigned LShrAmt = llvm::Log2_32(Value: SubVecTy->getNumElements());
683 FixedVectorType *BitCastTy =
684 FixedVectorType::get(ElementType: NewElemTy, NumElts: NewNumElts);
685 Value *BCVal =
686 Builder.CreateBitPreservingCastChain(DL, V: CurVal, NewTy: BitCastTy);
687 Value *NewIdx = Builder.CreateLShr(
688 LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: LShrAmt));
689 Value *ExtVal = Builder.CreateExtractElement(Vec: BCVal, Idx: NewIdx);
690 Value *BCOut =
691 Builder.CreateBitPreservingCastChain(DL, V: ExtVal, NewTy: AccessTy);
692 Inst->replaceAllUsesWith(V: BCOut);
693 return nullptr;
694 }
695
696 Value *SubVec = PoisonValue::get(T: SubVecTy);
697 for (unsigned K = 0; K < NumLoadedElts; ++K) {
698 Value *CurIdx =
699 Builder.CreateAdd(LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: K));
700 SubVec = Builder.CreateInsertElement(
701 Vec: SubVec, NewElt: Builder.CreateExtractElement(Vec: CurVal, Idx: CurIdx), Idx: K);
702 }
703
704 Inst->replaceAllUsesWith(
705 V: Builder.CreateBitPreservingCastChain(DL, V: SubVec, NewTy: AccessTy));
706 return nullptr;
707 }
708
709 // We're loading one element.
710 Value *ExtractElement = Builder.CreateExtractElement(Vec: CurVal, Idx: Index);
711 if (AccessTy != VecEltTy)
712 ExtractElement = Builder.CreateBitOrPointerCast(V: ExtractElement, DestTy: AccessTy);
713
714 Inst->replaceAllUsesWith(V: ExtractElement);
715 return nullptr;
716 }
717 case Instruction::Store: {
718 // For stores, it's a bit trickier and it depends on whether we're storing
719 // the full vector or not. If we're storing the full vector, we don't need
720 // to know the current value. If this is a store of a single element, we
721 // need to know the value.
722 StoreInst *SI = cast<StoreInst>(Val: Inst);
723 Value *Index = calculateVectorIndex(Ptr: SI->getPointerOperand(), AA);
724 Value *Val = SI->getValueOperand();
725
726 // We're storing the full vector, we can handle this without knowing CurVal.
727 Type *AccessTy = Val->getType();
728 TypeSize AccessSize = DL.getTypeStoreSize(Ty: AccessTy);
729 if (Constant *CI = dyn_cast<Constant>(Val: Index)) {
730 if (CI->isNullValue() && AccessSize == VecStoreSize) {
731 Value *Result =
732 Builder.CreateBitPreservingCastChain(DL, V: Val, NewTy: AA.Vector.Ty);
733 // If Result is a load from this alloca, it will later be RAUW'd and
734 // deleted. The SSAUpdater holds a raw Value* that RAUW doesn't update,
735 // leaving a dangling pointer. Wrap in a freeze to create a fresh value
736 // the SSAUpdater can safely hold; the freeze's operand is a proper IR
737 // use that RAUW does update.
738 if (isa<LoadInst>(Val: Result))
739 Result = Builder.CreateFreeze(V: Result);
740 return Result;
741 }
742 }
743
744 // Storing a subvector, or a scalar that spans several elements.
745 TypeSize EltSize = DL.getTypeStoreSize(Ty: VecEltTy);
746 assert(AccessSize.isKnownMultipleOf(EltSize) &&
747 "promotable access must cover a whole number of elements");
748 const unsigned NumWrittenElts = AccessSize / EltSize;
749 if (NumWrittenElts > 1) {
750 const unsigned NumVecElts = AA.Vector.Ty->getNumElements();
751 auto *SubVecTy = FixedVectorType::get(ElementType: VecEltTy, NumElts: NumWrittenElts);
752 assert(DL.getTypeStoreSize(SubVecTy) == DL.getTypeStoreSize(AccessTy));
753
754 Val = Builder.CreateBitPreservingCastChain(DL, V: Val, NewTy: SubVecTy);
755 Value *CurVec = GetCurVal();
756 for (unsigned K = 0, NumElts = std::min(a: NumWrittenElts, b: NumVecElts);
757 K < NumElts; ++K) {
758 Value *CurIdx =
759 Builder.CreateAdd(LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: K));
760 CurVec = Builder.CreateInsertElement(
761 Vec: CurVec, NewElt: Builder.CreateExtractElement(Vec: Val, Idx: K), Idx: CurIdx);
762 }
763 return CurVec;
764 }
765
766 if (Val->getType() != VecEltTy)
767 Val = Builder.CreateBitOrPointerCast(V: Val, DestTy: VecEltTy);
768 return Builder.CreateInsertElement(Vec: GetCurVal(), NewElt: Val, Idx: Index);
769 }
770 case Instruction::Call: {
771 if (auto *MTI = dyn_cast<MemTransferInst>(Val: Inst)) {
772 // For memcpy, we need to know curval.
773 ConstantInt *Length = cast<ConstantInt>(Val: MTI->getLength());
774 unsigned NumCopied = Length->getZExtValue() / ElementSize;
775 MemTransferInfo *TI = &AA.Vector.TransferInfo[MTI];
776 unsigned SrcBegin = TI->SrcIndex->getZExtValue();
777 unsigned DestBegin = TI->DestIndex->getZExtValue();
778
779 SmallVector<int> Mask;
780 for (unsigned Idx = 0; Idx < AA.Vector.Ty->getNumElements(); ++Idx) {
781 if (Idx >= DestBegin && Idx < DestBegin + NumCopied) {
782 Mask.push_back(Elt: SrcBegin < AA.Vector.Ty->getNumElements()
783 ? SrcBegin++
784 : PoisonMaskElem);
785 } else {
786 Mask.push_back(Elt: Idx);
787 }
788 }
789
790 return Builder.CreateShuffleVector(V: GetCurVal(), Mask);
791 }
792
793 if (auto *MSI = dyn_cast<MemSetInst>(Val: Inst)) {
794 // For memset, we don't need to know the previous value because we
795 // currently only allow memsets that cover the whole alloca.
796 Value *Elt = MSI->getOperand(i_nocapture: 1);
797 const unsigned BytesPerElt = DL.getTypeStoreSize(Ty: VecEltTy);
798 if (BytesPerElt > 1) {
799 Value *EltBytes = Builder.CreateVectorSplat(NumElts: BytesPerElt, V: Elt);
800
801 // If the element type of the vector is a pointer, we need to first cast
802 // to an integer, then use a PtrCast.
803 if (VecEltTy->isPointerTy()) {
804 Type *PtrInt = Builder.getIntNTy(N: BytesPerElt * 8);
805 Elt = Builder.CreateBitCast(V: EltBytes, DestTy: PtrInt);
806 Elt = Builder.CreateIntToPtr(V: Elt, DestTy: VecEltTy);
807 } else
808 Elt = Builder.CreateBitCast(V: EltBytes, DestTy: VecEltTy);
809 }
810
811 return Builder.CreateVectorSplat(EC: AA.Vector.Ty->getElementCount(), V: Elt);
812 }
813
814 if (auto *Intr = dyn_cast<IntrinsicInst>(Val: Inst)) {
815 if (Intr->getIntrinsicID() == Intrinsic::objectsize) {
816 Intr->replaceAllUsesWith(
817 V: Builder.getIntN(N: Intr->getType()->getIntegerBitWidth(),
818 C: DL.getTypeAllocSize(Ty: AA.Vector.Ty)));
819 return nullptr;
820 }
821 }
822
823 llvm_unreachable("Unsupported call when promoting alloca to vector");
824 }
825
826 default:
827 llvm_unreachable("Inconsistency in instructions promotable to vector");
828 }
829
830 llvm_unreachable("Did not return after promoting instruction!");
831}
832
833static bool isSupportedAccessType(FixedVectorType *VecTy, Type *AccessTy,
834 const DataLayout &DL) {
835 // An access that covers several elements can work if its size is a multiple
836 // of the size of the alloca's vector element type, since it can be split
837 // across consecutive elements. This covers accesses by a vector type, as well
838 // as scalar accesses that are wider than one element, which happens when an
839 // object is written one element at a time but read back in wider pieces.
840 //
841 // Examples:
842 // - VecTy = <8 x float>, AccessTy = <4 x float> -> OK
843 // - VecTy = <4 x double>, AccessTy = <2 x float> -> OK
844 // - VecTy = <4 x double>, AccessTy = <3 x float> -> NOT OK
845 // - 3*32 is not a multiple of 64
846 // - VecTy = <8 x i32>, AccessTy = i64 -> OK
847 //
848 // We could handle more complicated cases, but it'd make things a lot more
849 // complicated.
850 if (isa<FixedVectorType>(Val: AccessTy) || AccessTy->isIntegerTy() ||
851 AccessTy->isFloatingPointTy()) {
852 TypeSize AccTS = DL.getTypeStoreSize(Ty: AccessTy);
853 TypeSize VecTS = DL.getTypeStoreSize(Ty: VecTy->getElementType());
854 // If the type size and the store size don't match, we would need to do more
855 // than just bitcast to translate between an extracted/insertable subvectors
856 // and the accessed value.
857 if (AccTS * 8 == DL.getTypeSizeInBits(Ty: AccessTy) && AccTS > VecTS &&
858 AccTS.isKnownMultipleOf(RHS: VecTS))
859 return true;
860 }
861
862 // An access that covers exactly one element only needs a cast.
863 return CastInst::isBitOrNoopPointerCastable(SrcTy: VecTy->getElementType(), DestTy: AccessTy,
864 DL);
865}
866
867/// Iterates over an instruction worklist that may contain multiple instructions
868/// from the same basic block, but in a different order.
869template <typename InstContainer>
870static void forEachWorkListItem(const InstContainer &WorkList,
871 std::function<void(Instruction *)> Fn) {
872 // Bucket up uses of the alloca by the block they occur in.
873 // This is important because we have to handle multiple defs/uses in a block
874 // ourselves: SSAUpdater is purely for cross-block references.
875 DenseMap<BasicBlock *, SmallDenseSet<Instruction *>> UsesByBlock;
876 for (Instruction *User : WorkList)
877 UsesByBlock[User->getParent()].insert(V: User);
878
879 for (Instruction *User : WorkList) {
880 BasicBlock *BB = User->getParent();
881 auto &BlockUses = UsesByBlock[BB];
882
883 // Already processed, skip.
884 if (BlockUses.empty())
885 continue;
886
887 // Only user in the block, directly process it.
888 if (BlockUses.size() == 1) {
889 Fn(User);
890 continue;
891 }
892
893 // Multiple users in the block, do a linear scan to see users in order.
894 for (Instruction &Inst : *BB) {
895 if (!BlockUses.contains(V: &Inst))
896 continue;
897
898 Fn(&Inst);
899 }
900
901 // Clear the block so we know it's been processed.
902 BlockUses.clear();
903 }
904}
905
906/// Find an insert point after an alloca, after all other allocas clustered at
907/// the start of the block.
908static BasicBlock::iterator skipToNonAllocaInsertPt(BasicBlock &BB,
909 BasicBlock::iterator I) {
910 for (BasicBlock::iterator E = BB.end(); I != E && isa<AllocaInst>(Val: *I); ++I)
911 ;
912 return I;
913}
914
915FixedVectorType *
916AMDGPUPromoteAllocaImpl::getVectorTypeForAlloca(Type *AllocaTy) const {
917 if (DisablePromoteAllocaToVector) {
918 LLVM_DEBUG(dbgs() << " Promote alloca to vectors is disabled\n");
919 return nullptr;
920 }
921
922 auto *VectorTy = dyn_cast<FixedVectorType>(Val: AllocaTy);
923 if (auto *ArrayTy = dyn_cast<ArrayType>(Val: AllocaTy)) {
924 uint64_t NumElems = 1;
925 Type *ElemTy;
926 do {
927 NumElems *= ArrayTy->getNumElements();
928 ElemTy = ArrayTy->getElementType();
929 } while ((ArrayTy = dyn_cast<ArrayType>(Val: ElemTy)));
930
931 // Check for array of vectors
932 auto *InnerVectorTy = dyn_cast<FixedVectorType>(Val: ElemTy);
933 if (InnerVectorTy) {
934 NumElems *= InnerVectorTy->getNumElements();
935 ElemTy = InnerVectorTy->getElementType();
936 }
937
938 if (VectorType::isValidElementType(ElemTy) && NumElems > 0) {
939 unsigned ElementSize = DL.getTypeSizeInBits(Ty: ElemTy) / 8;
940 if (ElementSize > 0) {
941 unsigned AllocaSize = DL.getTypeStoreSize(Ty: AllocaTy);
942 // Expand vector if required to match padding of inner type,
943 // i.e. odd size subvectors.
944 // Storage size of new vector must match that of alloca for correct
945 // behaviour of byte offsets and GEP computation.
946 if (NumElems * ElementSize != AllocaSize)
947 NumElems = AllocaSize / ElementSize;
948 if (NumElems > 0 && (AllocaSize % ElementSize) == 0)
949 VectorTy = FixedVectorType::get(ElementType: ElemTy, NumElts: NumElems);
950 }
951 }
952 }
953 if (!VectorTy) {
954 LLVM_DEBUG(dbgs() << " Cannot convert type to vector\n");
955 return nullptr;
956 }
957
958 const unsigned MaxElements =
959 (MaxVectorRegs * 32) / DL.getTypeSizeInBits(Ty: VectorTy->getElementType());
960
961 if (VectorTy->getNumElements() > MaxElements ||
962 VectorTy->getNumElements() < 2) {
963 LLVM_DEBUG(dbgs() << " " << *VectorTy
964 << " has an unsupported number of elements\n");
965 return nullptr;
966 }
967
968 Type *VecEltTy = VectorTy->getElementType();
969 unsigned ElementSizeInBits = DL.getTypeSizeInBits(Ty: VecEltTy);
970 if (ElementSizeInBits != DL.getTypeAllocSizeInBits(Ty: VecEltTy)) {
971 LLVM_DEBUG(dbgs() << " Cannot convert to vector if the allocation size "
972 "does not match the type's size\n");
973 return nullptr;
974 }
975
976 return VectorTy;
977}
978
979void AMDGPUPromoteAllocaImpl::analyzePromoteToVector(AllocaAnalysis &AA) const {
980 if (AA.HaveSelectOrPHI) {
981 LLVM_DEBUG(dbgs() << " Cannot convert to vector due to select or phi\n");
982 return;
983 }
984
985 Type *AllocaTy = AA.Alloca->getAllocatedType();
986 AA.Vector.Ty = getVectorTypeForAlloca(AllocaTy);
987 if (!AA.Vector.Ty)
988 return;
989
990 const auto RejectUser = [&](Instruction *Inst, Twine Msg) {
991 LLVM_DEBUG(dbgs() << " Cannot promote alloca to vector: " << Msg << "\n"
992 << " " << *Inst << "\n");
993 AA.Vector.Ty = nullptr;
994 };
995
996 Type *VecEltTy = AA.Vector.Ty->getElementType();
997 unsigned ElementSize = DL.getTypeSizeInBits(Ty: VecEltTy) / 8;
998 assert(ElementSize > 0);
999 for (auto *U : AA.Uses) {
1000 Instruction *Inst = cast<Instruction>(Val: U->getUser());
1001
1002 if (Value *Ptr = getLoadStorePointerOperand(V: Inst)) {
1003 assert(!isa<StoreInst>(Inst) ||
1004 U->getOperandNo() == StoreInst::getPointerOperandIndex());
1005
1006 Type *AccessTy = getLoadStoreType(I: Inst);
1007 if (AccessTy->isAggregateType())
1008 return RejectUser(Inst, "unsupported load/store as aggregate");
1009 assert(!AccessTy->isAggregateType() || AccessTy->isArrayTy());
1010
1011 // Check that this is a simple access of a vector element.
1012 bool IsSimple = isa<LoadInst>(Val: Inst) ? cast<LoadInst>(Val: Inst)->isSimple()
1013 : cast<StoreInst>(Val: Inst)->isSimple();
1014 if (!IsSimple)
1015 return RejectUser(Inst, "not a simple load or store");
1016
1017 Ptr = Ptr->stripPointerCasts();
1018
1019 // Alloca already accessed as vector.
1020 if (Ptr == AA.Alloca &&
1021 DL.getTypeStoreSize(Ty: AA.Alloca->getAllocatedType()) ==
1022 DL.getTypeStoreSize(Ty: AccessTy)) {
1023 AA.Vector.Worklist.push_back(Elt: Inst);
1024 continue;
1025 }
1026
1027 if (!isSupportedAccessType(VecTy: AA.Vector.Ty, AccessTy, DL))
1028 return RejectUser(Inst, "not a supported access type");
1029
1030 AA.Vector.Worklist.push_back(Elt: Inst);
1031 continue;
1032 }
1033
1034 if (auto *GEP = dyn_cast<GetElementPtrInst>(Val: Inst)) {
1035 // If we can't compute a vector index from this GEP, then we can't
1036 // promote this alloca to vector.
1037 auto Index = computeGEPToVectorIndex(GEP, Alloca: AA.Alloca, VecElemTy: VecEltTy, DL);
1038 if (!Index)
1039 return RejectUser(Inst, "cannot compute vector index for GEP");
1040
1041 AA.Vector.GEPVectorIdx[GEP] = std::move(Index.value());
1042 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1043 continue;
1044 }
1045
1046 if (MemSetInst *MSI = dyn_cast<MemSetInst>(Val: Inst);
1047 MSI && isSupportedMemset(I: MSI, AI: AA.Alloca, DL)) {
1048 AA.Vector.Worklist.push_back(Elt: Inst);
1049 continue;
1050 }
1051
1052 if (MemTransferInst *TransferInst = dyn_cast<MemTransferInst>(Val: Inst)) {
1053 if (TransferInst->isVolatile())
1054 return RejectUser(Inst, "mem transfer inst is volatile");
1055
1056 ConstantInt *Len = dyn_cast<ConstantInt>(Val: TransferInst->getLength());
1057 if (!Len || (Len->getZExtValue() % ElementSize))
1058 return RejectUser(Inst, "mem transfer inst length is non-constant or "
1059 "not a multiple of the vector element size");
1060
1061 auto getConstIndexIntoAlloca = [&](Value *Ptr) -> ConstantInt * {
1062 if (Ptr == AA.Alloca)
1063 return ConstantInt::get(Context&: Ptr->getContext(), V: APInt(32, 0));
1064
1065 GetElementPtrInst *GEP = cast<GetElementPtrInst>(Val: Ptr);
1066 const auto &GEPI = AA.Vector.GEPVectorIdx.find(Key: GEP)->second;
1067 if (GEPI.VarIndex)
1068 return nullptr;
1069 if (GEPI.ConstIndex)
1070 return GEPI.ConstIndex;
1071 return ConstantInt::get(Context&: Ptr->getContext(), V: APInt(32, 0));
1072 };
1073
1074 MemTransferInfo *TI =
1075 &AA.Vector.TransferInfo.try_emplace(Key: TransferInst).first->second;
1076 unsigned OpNum = U->getOperandNo();
1077 if (OpNum == 0) {
1078 Value *Dest = TransferInst->getDest();
1079 ConstantInt *Index = getConstIndexIntoAlloca(Dest);
1080 if (!Index)
1081 return RejectUser(Inst, "could not calculate constant dest index");
1082 TI->DestIndex = Index;
1083 } else {
1084 assert(OpNum == 1);
1085 Value *Src = TransferInst->getSource();
1086 ConstantInt *Index = getConstIndexIntoAlloca(Src);
1087 if (!Index)
1088 return RejectUser(Inst, "could not calculate constant src index");
1089 TI->SrcIndex = Index;
1090 }
1091 continue;
1092 }
1093
1094 if (auto *Intr = dyn_cast<IntrinsicInst>(Val: Inst)) {
1095 if (Intr->getIntrinsicID() == Intrinsic::objectsize) {
1096 AA.Vector.Worklist.push_back(Elt: Inst);
1097 continue;
1098 }
1099 }
1100
1101 // Ignore assume-like intrinsics and comparisons used in assumes.
1102 if (isAssumeLikeIntrinsic(I: Inst)) {
1103 if (!Inst->use_empty())
1104 return RejectUser(Inst, "assume-like intrinsic cannot have any users");
1105 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1106 continue;
1107 }
1108
1109 if (isa<ICmpInst>(Val: Inst) && all_of(Range: Inst->users(), P: [](User *U) {
1110 return isAssumeLikeIntrinsic(I: cast<Instruction>(Val: U));
1111 })) {
1112 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1113 continue;
1114 }
1115
1116 return RejectUser(Inst, "unhandled alloca user");
1117 }
1118
1119 // Follow-up check to ensure we've seen both sides of all transfer insts.
1120 for (const auto &Entry : AA.Vector.TransferInfo) {
1121 const MemTransferInfo &TI = Entry.second;
1122 if (!TI.SrcIndex || !TI.DestIndex)
1123 return RejectUser(Entry.first,
1124 "mem transfer inst between different objects");
1125 AA.Vector.Worklist.push_back(Elt: Entry.first);
1126 }
1127}
1128
1129void AMDGPUPromoteAllocaImpl::promoteAllocaToVector(AllocaAnalysis &AA) {
1130 LLVM_DEBUG(dbgs() << "Promoting to vectors: " << *AA.Alloca << '\n');
1131 LLVM_DEBUG(dbgs() << " type conversion: " << *AA.Alloca->getAllocatedType()
1132 << " -> " << *AA.Vector.Ty << '\n');
1133 const unsigned VecStoreSize = DL.getTypeStoreSize(Ty: AA.Vector.Ty);
1134
1135 Type *VecEltTy = AA.Vector.Ty->getElementType();
1136 const unsigned ElementSize = DL.getTypeSizeInBits(Ty: VecEltTy) / 8;
1137
1138 // Alloca is uninitialized memory. Imitate that by making the first value
1139 // undef.
1140 SSAUpdater Updater;
1141 Updater.Initialize(Ty: AA.Vector.Ty, Name: "promotealloca");
1142
1143 BasicBlock *EntryBB = AA.Alloca->getParent();
1144 BasicBlock::iterator InitInsertPos =
1145 skipToNonAllocaInsertPt(BB&: *EntryBB, I: AA.Alloca->getIterator());
1146 IRBuilder<> Builder(&*InitInsertPos);
1147 Value *AllocaInitValue = Builder.CreateFreeze(V: PoisonValue::get(T: AA.Vector.Ty));
1148 AllocaInitValue->takeName(V: AA.Alloca);
1149
1150 Updater.AddAvailableValue(BB: AA.Alloca->getParent(), V: AllocaInitValue);
1151
1152 // First handle the initial worklist, in basic block order.
1153 //
1154 // Insert a placeholder whenever we need the vector value at the top of a
1155 // basic block.
1156 SmallSetVector<Instruction *, 8> Placeholders;
1157 forEachWorkListItem(WorkList: AA.Vector.Worklist, Fn: [&](Instruction *I) {
1158 BasicBlock *BB = I->getParent();
1159 auto GetCurVal = [&]() -> Value * {
1160 if (Value *CurVal = Updater.FindValueForBlock(BB))
1161 return CurVal;
1162
1163 if (!Placeholders.empty() && Placeholders.back()->getParent() == BB)
1164 return Placeholders.back();
1165
1166 // If the current value in the basic block is not yet known, insert a
1167 // placeholder that we will replace later.
1168 IRBuilder<> Builder(I);
1169 auto *Placeholder = cast<Instruction>(Val: Builder.CreateFreeze(
1170 V: PoisonValue::get(T: AA.Vector.Ty), Name: "promotealloca.placeholder"));
1171 Placeholders.insert(X: Placeholder);
1172 return Placeholders.back();
1173 };
1174
1175 Value *Result = promoteAllocaUserToVector(Inst: I, DL, AA, VecStoreSize,
1176 ElementSize, GetCurVal);
1177 // If the returned result is a placeholder, it means the instruction does
1178 // not really modify the alloca. So no need to make it being available value
1179 // to SSAUpdater.
1180 // This will stop placeholder being cached in SSAUpdater. The cached
1181 // placeholder may cause stale pointer being referenced when doing
1182 // placeholder replacement.
1183 if (Result && (!isa<Instruction>(Val: Result) ||
1184 !Placeholders.contains(key: cast<Instruction>(Val: Result))))
1185 Updater.AddAvailableValue(BB, V: Result);
1186 });
1187
1188 // Now fixup the placeholders.
1189 for (Instruction *Placeholder : Placeholders) {
1190 Placeholder->replaceAllUsesWith(
1191 V: Updater.GetValueInMiddleOfBlock(BB: Placeholder->getParent()));
1192 Placeholder->eraseFromParent();
1193 }
1194
1195 // Delete all instructions.
1196 for (Instruction *I : AA.Vector.Worklist) {
1197 assert(I->use_empty());
1198 I->eraseFromParent();
1199 }
1200
1201 // Delete all the users that are known to be removeable.
1202 for (Instruction *I : reverse(C&: AA.Vector.UsersToRemove)) {
1203 I->dropDroppableUses();
1204 assert(I->use_empty());
1205 I->eraseFromParent();
1206 }
1207
1208 // Alloca should now be dead too.
1209 assert(AA.Alloca->use_empty());
1210 AA.Alloca->eraseFromParent();
1211}
1212
1213std::pair<Value *, Value *>
1214AMDGPUPromoteAllocaImpl::getLocalSizeYZ(IRBuilder<> &Builder) {
1215 Function &F = *Builder.GetInsertBlock()->getParent();
1216 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F);
1217
1218 if (!IsAMDHSA) {
1219 CallInst *LocalSizeY = Builder.CreateIntrinsicWithoutFolding(
1220 ID: Intrinsic::r600_read_local_size_y, Args: {});
1221 CallInst *LocalSizeZ = Builder.CreateIntrinsicWithoutFolding(
1222 ID: Intrinsic::r600_read_local_size_z, Args: {});
1223
1224 ST.makeLIDRangeMetadata(I: LocalSizeY);
1225 ST.makeLIDRangeMetadata(I: LocalSizeZ);
1226
1227 return std::pair(LocalSizeY, LocalSizeZ);
1228 }
1229
1230 // We must read the size out of the dispatch pointer.
1231 assert(IsAMDGCN);
1232
1233 // We are indexing into this struct, and want to extract the workgroup_size_*
1234 // fields.
1235 //
1236 // typedef struct hsa_kernel_dispatch_packet_s {
1237 // uint16_t header;
1238 // uint16_t setup;
1239 // uint16_t workgroup_size_x ;
1240 // uint16_t workgroup_size_y;
1241 // uint16_t workgroup_size_z;
1242 // uint16_t reserved0;
1243 // uint32_t grid_size_x ;
1244 // uint32_t grid_size_y ;
1245 // uint32_t grid_size_z;
1246 //
1247 // uint32_t private_segment_size;
1248 // uint32_t group_segment_size;
1249 // uint64_t kernel_object;
1250 //
1251 // #ifdef HSA_LARGE_MODEL
1252 // void *kernarg_address;
1253 // #elif defined HSA_LITTLE_ENDIAN
1254 // void *kernarg_address;
1255 // uint32_t reserved1;
1256 // #else
1257 // uint32_t reserved1;
1258 // void *kernarg_address;
1259 // #endif
1260 // uint64_t reserved2;
1261 // hsa_signal_t completion_signal; // uint64_t wrapper
1262 // } hsa_kernel_dispatch_packet_t
1263 //
1264 CallInst *DispatchPtr =
1265 Builder.CreateIntrinsicWithoutFolding(ID: Intrinsic::amdgcn_dispatch_ptr, Args: {});
1266 DispatchPtr->addRetAttr(Kind: Attribute::NoAlias);
1267 DispatchPtr->addRetAttr(Kind: Attribute::NonNull);
1268 F.removeFnAttr(Kind: "amdgpu-no-dispatch-ptr");
1269
1270 // Size of the dispatch packet struct.
1271 DispatchPtr->addDereferenceableRetAttr(Bytes: 64);
1272
1273 Type *I32Ty = Type::getInt32Ty(C&: Mod.getContext());
1274
1275 // We could do a single 64-bit load here, but it's likely that the basic
1276 // 32-bit and extract sequence is already present, and it is probably easier
1277 // to CSE this. The loads should be mergeable later anyway.
1278 Value *GEPXY = Builder.CreateConstInBoundsGEP1_64(Ty: I32Ty, Ptr: DispatchPtr, Idx0: 1);
1279 LoadInst *LoadXY = Builder.CreateAlignedLoad(Ty: I32Ty, Ptr: GEPXY, Align: Align(4));
1280
1281 Value *GEPZU = Builder.CreateConstInBoundsGEP1_64(Ty: I32Ty, Ptr: DispatchPtr, Idx0: 2);
1282 LoadInst *LoadZU = Builder.CreateAlignedLoad(Ty: I32Ty, Ptr: GEPZU, Align: Align(4));
1283
1284 MDNode *MD = MDNode::get(Context&: Mod.getContext(), MDs: {});
1285 LoadXY->setMetadata(KindID: LLVMContext::MD_invariant_load, Node: MD);
1286 LoadZU->setMetadata(KindID: LLVMContext::MD_invariant_load, Node: MD);
1287 ST.makeLIDRangeMetadata(I: LoadZU);
1288
1289 // Extract y component. Upper half of LoadZU should be zero already.
1290 Value *Y = Builder.CreateLShr(LHS: LoadXY, RHS: 16);
1291
1292 return std::pair(Y, LoadZU);
1293}
1294
1295Value *AMDGPUPromoteAllocaImpl::getWorkitemID(IRBuilder<> &Builder,
1296 unsigned N) {
1297 Function *F = Builder.GetInsertBlock()->getParent();
1298 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F: *F);
1299 Intrinsic::ID IntrID = Intrinsic::not_intrinsic;
1300 StringRef AttrName;
1301
1302 switch (N) {
1303 case 0:
1304 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_x
1305 : (Intrinsic::ID)Intrinsic::r600_read_tidig_x;
1306 AttrName = "amdgpu-no-workitem-id-x";
1307 break;
1308 case 1:
1309 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_y
1310 : (Intrinsic::ID)Intrinsic::r600_read_tidig_y;
1311 AttrName = "amdgpu-no-workitem-id-y";
1312 break;
1313
1314 case 2:
1315 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_z
1316 : (Intrinsic::ID)Intrinsic::r600_read_tidig_z;
1317 AttrName = "amdgpu-no-workitem-id-z";
1318 break;
1319 default:
1320 llvm_unreachable("invalid dimension");
1321 }
1322
1323 Function *WorkitemIdFn = Intrinsic::getOrInsertDeclaration(M: &Mod, id: IntrID);
1324 CallInst *CI = Builder.CreateCall(Callee: WorkitemIdFn);
1325 ST.makeLIDRangeMetadata(I: CI);
1326 F->removeFnAttr(Kind: AttrName);
1327
1328 return CI;
1329}
1330
1331static bool isCallPromotable(CallInst *CI) {
1332 IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: CI);
1333 if (!II)
1334 return false;
1335
1336 switch (II->getIntrinsicID()) {
1337 case Intrinsic::memcpy:
1338 case Intrinsic::memmove:
1339 case Intrinsic::memset:
1340 case Intrinsic::lifetime_start:
1341 case Intrinsic::lifetime_end:
1342 case Intrinsic::invariant_start:
1343 case Intrinsic::invariant_end:
1344 case Intrinsic::launder_invariant_group:
1345 case Intrinsic::strip_invariant_group:
1346 case Intrinsic::objectsize:
1347 return true;
1348 default:
1349 return false;
1350 }
1351}
1352
1353bool AMDGPUPromoteAllocaImpl::binaryOpIsDerivedFromSameAlloca(
1354 Value *BaseAlloca, Value *Val, Instruction *Inst, int OpIdx0,
1355 int OpIdx1) const {
1356 // Figure out which operand is the one we might not be promoting.
1357 Value *OtherOp = Inst->getOperand(i: OpIdx0);
1358 if (Val == OtherOp)
1359 OtherOp = Inst->getOperand(i: OpIdx1);
1360
1361 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: OtherOp))
1362 return true;
1363
1364 // TODO: getUnderlyingObject will not work on a vector getelementptr
1365 Value *OtherObj = getUnderlyingObject(V: OtherOp);
1366 if (!isa<AllocaInst>(Val: OtherObj))
1367 return false;
1368
1369 // TODO: We should be able to replace undefs with the right pointer type.
1370
1371 // TODO: If we know the other base object is another promotable
1372 // alloca, not necessarily this alloca, we can do this. The
1373 // important part is both must have the same address space at
1374 // the end.
1375 if (OtherObj != BaseAlloca) {
1376 LLVM_DEBUG(
1377 dbgs() << "Found a binary instruction with another alloca object\n");
1378 return false;
1379 }
1380
1381 return true;
1382}
1383
1384void AMDGPUPromoteAllocaImpl::analyzePromoteToLDS(AllocaAnalysis &AA) const {
1385 if (DisablePromoteAllocaToLDS) {
1386 LLVM_DEBUG(dbgs() << " Promote alloca to LDS is disabled\n");
1387 return;
1388 }
1389
1390 // Don't promote the alloca to LDS for shader calling conventions as the work
1391 // item ID intrinsics are not supported for these calling conventions.
1392 // Furthermore not all LDS is available for some of the stages.
1393 const Function &ContainingFunction = *AA.Alloca->getFunction();
1394 CallingConv::ID CC = ContainingFunction.getCallingConv();
1395
1396 switch (CC) {
1397 case CallingConv::AMDGPU_KERNEL:
1398 case CallingConv::SPIR_KERNEL:
1399 break;
1400 default:
1401 LLVM_DEBUG(
1402 dbgs()
1403 << " promote alloca to LDS not supported with calling convention.\n");
1404 return;
1405 }
1406
1407 for (Use *Use : AA.Uses) {
1408 auto *User = Use->getUser();
1409
1410 if (CallInst *CI = dyn_cast<CallInst>(Val: User)) {
1411 if (!isCallPromotable(CI))
1412 return;
1413
1414 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1415 AA.LDS.Worklist.push_back(Elt: User);
1416 continue;
1417 }
1418
1419 Instruction *UseInst = cast<Instruction>(Val: User);
1420 if (UseInst->getOpcode() == Instruction::PtrToInt)
1421 return;
1422
1423 if (LoadInst *LI = dyn_cast<LoadInst>(Val: UseInst)) {
1424 if (LI->isVolatile())
1425 return;
1426 continue;
1427 }
1428
1429 if (StoreInst *SI = dyn_cast<StoreInst>(Val: UseInst)) {
1430 if (SI->isVolatile())
1431 return;
1432 continue;
1433 }
1434
1435 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Val: UseInst)) {
1436 if (RMW->isVolatile())
1437 return;
1438 continue;
1439 }
1440
1441 if (AtomicCmpXchgInst *CAS = dyn_cast<AtomicCmpXchgInst>(Val: UseInst)) {
1442 if (CAS->isVolatile())
1443 return;
1444 continue;
1445 }
1446
1447 // Only promote a select if we know that the other select operand
1448 // is from another pointer that will also be promoted.
1449 if (ICmpInst *ICmp = dyn_cast<ICmpInst>(Val: UseInst)) {
1450 if (!binaryOpIsDerivedFromSameAlloca(BaseAlloca: AA.Alloca, Val: Use->get(), Inst: ICmp, OpIdx0: 0, OpIdx1: 1))
1451 return;
1452
1453 // May need to rewrite constant operands.
1454 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1455 AA.LDS.Worklist.push_back(Elt: ICmp);
1456 continue;
1457 }
1458
1459 if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Val: UseInst)) {
1460 // Be conservative if an address could be computed outside the bounds of
1461 // the alloca.
1462 if (!GEP->isInBounds())
1463 return;
1464 } else if (!isa<ExtractElementInst, SelectInst, PHINode>(Val: User)) {
1465 // Do not promote vector/aggregate type instructions. It is hard to track
1466 // their users.
1467
1468 // Do not promote addrspacecast.
1469 //
1470 // TODO: If we know the address is only observed through flat pointers, we
1471 // could still promote.
1472 return;
1473 }
1474
1475 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1476 AA.LDS.Worklist.push_back(Elt: User);
1477 }
1478
1479 AA.LDS.Enable = true;
1480}
1481
1482bool AMDGPUPromoteAllocaImpl::hasSufficientLocalMem(const Function &F) {
1483
1484 FunctionType *FTy = F.getFunctionType();
1485 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F);
1486
1487 // If the function has any arguments in the local address space, then it's
1488 // possible these arguments require the entire local memory space, so
1489 // we cannot use local memory in the pass.
1490 for (Type *ParamTy : FTy->params()) {
1491 PointerType *PtrTy = dyn_cast<PointerType>(Val: ParamTy);
1492 if (PtrTy && PtrTy->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS) {
1493 LocalMemLimit = 0;
1494 LLVM_DEBUG(dbgs() << "Function has local memory argument. Promoting to "
1495 "local memory disabled.\n");
1496 return false;
1497 }
1498 }
1499
1500 LocalMemLimit = ST.getAddressableLocalMemorySize();
1501 if (LocalMemLimit == 0)
1502 return false;
1503
1504 SmallVector<const Constant *, 16> Stack;
1505 SmallPtrSet<const Constant *, 8> VisitedConstants;
1506 SmallPtrSet<const GlobalVariable *, 8> UsedLDS;
1507
1508 auto visitUsers = [&](const GlobalVariable *GV, const Constant *Val) -> bool {
1509 for (const User *U : Val->users()) {
1510 if (const Instruction *Use = dyn_cast<Instruction>(Val: U)) {
1511 if (Use->getFunction() == &F)
1512 return true;
1513 } else {
1514 const Constant *C = cast<Constant>(Val: U);
1515 if (VisitedConstants.insert(Ptr: C).second)
1516 Stack.push_back(Elt: C);
1517 }
1518 }
1519
1520 return false;
1521 };
1522
1523 for (GlobalVariable &GV : Mod.globals()) {
1524 if (GV.getAddressSpace() != AMDGPUAS::LOCAL_ADDRESS)
1525 continue;
1526
1527 if (visitUsers(&GV, &GV)) {
1528 UsedLDS.insert(Ptr: &GV);
1529 Stack.clear();
1530 continue;
1531 }
1532
1533 // For any ConstantExpr uses, we need to recursively search the users until
1534 // we see a function.
1535 while (!Stack.empty()) {
1536 const Constant *C = Stack.pop_back_val();
1537 if (visitUsers(&GV, C)) {
1538 UsedLDS.insert(Ptr: &GV);
1539 Stack.clear();
1540 break;
1541 }
1542 }
1543 }
1544
1545 SmallVector<std::pair<uint64_t, Align>, 16> AllocatedSizes;
1546 AllocatedSizes.reserve(N: UsedLDS.size());
1547
1548 for (const GlobalVariable *GV : UsedLDS) {
1549 Align Alignment =
1550 DL.getValueOrABITypeAlignment(Alignment: GV->getAlign(), Ty: GV->getValueType());
1551 uint64_t AllocSize = GV->getGlobalSize(DL);
1552
1553 // HIP uses an extern unsized array in local address space for dynamically
1554 // allocated shared memory. In that case, we have to disable the promotion.
1555 if (GV->hasExternalLinkage() && AllocSize == 0) {
1556 LocalMemLimit = 0;
1557 LLVM_DEBUG(dbgs() << "Function has a reference to externally allocated "
1558 "local memory. Promoting to local memory "
1559 "disabled.\n");
1560 return false;
1561 }
1562
1563 AllocatedSizes.emplace_back(Args&: AllocSize, Args&: Alignment);
1564 }
1565
1566 // Sort to try to estimate the worst case alignment padding
1567 //
1568 // FIXME: We should really do something to fix the addresses to a more optimal
1569 // value instead
1570 llvm::sort(C&: AllocatedSizes, Comp: llvm::less_second());
1571
1572 // Check how much local memory is being used by global objects
1573 CurrentLocalMemUsage = 0;
1574
1575 // FIXME: Try to account for padding here. The real padding and address is
1576 // currently determined from the inverse order of uses in the function when
1577 // legalizing, which could also potentially change. We try to estimate the
1578 // worst case here, but we probably should fix the addresses earlier.
1579 for (auto Alloc : AllocatedSizes) {
1580 CurrentLocalMemUsage = alignTo(Size: CurrentLocalMemUsage, A: Alloc.second);
1581 CurrentLocalMemUsage += Alloc.first;
1582 }
1583
1584 unsigned MaxOccupancy =
1585 ST.getWavesPerEU(FlatWorkGroupSizes: ST.getFlatWorkGroupSizes(F), LDSBytes: CurrentLocalMemUsage, F)
1586 .second;
1587
1588 // Round up to the next tier of usage.
1589 unsigned MaxSizeWithWaveCount =
1590 ST.getMaxLocalMemSizeWithWaveCount(WaveCount: MaxOccupancy, F);
1591
1592 // Program may already use more LDS than is usable at maximum occupancy.
1593 if (CurrentLocalMemUsage > MaxSizeWithWaveCount)
1594 return false;
1595
1596 LocalMemLimit = MaxSizeWithWaveCount;
1597
1598 LLVM_DEBUG(dbgs() << F.getName() << " uses " << CurrentLocalMemUsage
1599 << " bytes of LDS\n"
1600 << " Rounding size to " << MaxSizeWithWaveCount
1601 << " with a maximum occupancy of " << MaxOccupancy << '\n'
1602 << " and " << (LocalMemLimit - CurrentLocalMemUsage)
1603 << " available for promotion\n");
1604
1605 return true;
1606}
1607
1608// FIXME: Should try to pick the most likely to be profitable allocas first.
1609bool AMDGPUPromoteAllocaImpl::tryPromoteAllocaToLDS(
1610 AllocaAnalysis &AA, bool SufficientLDS,
1611 SetVector<IntrinsicInst *> &DeferredIntrs) {
1612 LLVM_DEBUG(dbgs() << "Trying to promote to LDS: " << *AA.Alloca << '\n');
1613
1614 // Not likely to have sufficient local memory for promotion.
1615 if (!SufficientLDS)
1616 return false;
1617
1618 IRBuilder<> Builder(AA.Alloca);
1619
1620 const Function &ContainingFunction = *AA.Alloca->getParent()->getParent();
1621 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F: ContainingFunction);
1622 unsigned WorkGroupSize = ST.getFlatWorkGroupSizes(F: ContainingFunction).second;
1623
1624 Align Alignment = AA.Alloca->getAlign();
1625
1626 // FIXME: This computed padding is likely wrong since it depends on inverse
1627 // usage order.
1628 //
1629 // FIXME: It is also possible that if we're allowed to use all of the memory
1630 // could end up using more than the maximum due to alignment padding.
1631
1632 uint32_t NewSize = alignTo(Size: CurrentLocalMemUsage, A: Alignment);
1633 std::optional<TypeSize> ElemSize = AA.Alloca->getAllocationSize(DL);
1634 if (!ElemSize || ElemSize->isScalable())
1635 return false;
1636 TypeSize AllocSize = WorkGroupSize * *ElemSize;
1637 NewSize += AllocSize.getFixedValue();
1638
1639 if (NewSize > LocalMemLimit) {
1640 LLVM_DEBUG(dbgs() << " " << AllocSize
1641 << " bytes of local memory not available to promote\n");
1642 return false;
1643 }
1644
1645 CurrentLocalMemUsage = NewSize;
1646
1647 LLVM_DEBUG(dbgs() << "Promoting alloca to local memory\n");
1648
1649 Function *F = AA.Alloca->getFunction();
1650
1651 Type *GVTy = ArrayType::get(ElementType: AA.Alloca->getAllocatedType(), NumElements: WorkGroupSize);
1652 GlobalVariable *GV = new GlobalVariable(
1653 Mod, GVTy, false, GlobalValue::InternalLinkage, PoisonValue::get(T: GVTy),
1654 Twine(F->getName()) + Twine('.') + AA.Alloca->getName(), nullptr,
1655 GlobalVariable::NotThreadLocal, AMDGPUAS::LOCAL_ADDRESS);
1656 GV->setUnnamedAddr(GlobalValue::UnnamedAddr::Global);
1657 GV->setAlignment(AA.Alloca->getAlign());
1658
1659 Value *TCntY, *TCntZ;
1660
1661 std::tie(args&: TCntY, args&: TCntZ) = getLocalSizeYZ(Builder);
1662 Value *TIdX = getWorkitemID(Builder, N: 0);
1663 Value *TIdY = getWorkitemID(Builder, N: 1);
1664 Value *TIdZ = getWorkitemID(Builder, N: 2);
1665
1666 Value *Tmp0 = Builder.CreateMul(LHS: TCntY, RHS: TCntZ, Name: "", HasNUW: true, HasNSW: true);
1667 Tmp0 = Builder.CreateMul(LHS: Tmp0, RHS: TIdX);
1668 Value *Tmp1 = Builder.CreateMul(LHS: TIdY, RHS: TCntZ, Name: "", HasNUW: true, HasNSW: true);
1669 Value *TID = Builder.CreateAdd(LHS: Tmp0, RHS: Tmp1);
1670 TID = Builder.CreateAdd(LHS: TID, RHS: TIdZ);
1671
1672 LLVMContext &Context = Mod.getContext();
1673 Value *Indices[] = {Constant::getNullValue(Ty: Type::getInt32Ty(C&: Context)), TID};
1674
1675 Value *Offset = Builder.CreateInBoundsGEP(Ty: GVTy, Ptr: GV, IdxList: Indices);
1676 AA.Alloca->mutateType(Ty: Offset->getType());
1677 AA.Alloca->replaceAllUsesWith(V: Offset);
1678 AA.Alloca->eraseFromParent();
1679
1680 PointerType *NewPtrTy = PointerType::get(C&: Context, AddressSpace: AMDGPUAS::LOCAL_ADDRESS);
1681
1682 for (Value *V : AA.LDS.Worklist) {
1683 CallInst *Call = dyn_cast<CallInst>(Val: V);
1684 if (!Call) {
1685 if (ICmpInst *CI = dyn_cast<ICmpInst>(Val: V)) {
1686 Value *LHS = CI->getOperand(i_nocapture: 0);
1687 Value *RHS = CI->getOperand(i_nocapture: 1);
1688
1689 Type *NewTy = LHS->getType()->getWithNewType(EltTy: NewPtrTy);
1690 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: LHS))
1691 CI->setOperand(i_nocapture: 0, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1692
1693 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: RHS))
1694 CI->setOperand(i_nocapture: 1, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1695
1696 continue;
1697 }
1698
1699 // The operand's value should be corrected on its own and we don't want to
1700 // touch the users.
1701 if (isa<AddrSpaceCastInst>(Val: V))
1702 continue;
1703
1704 assert(V->getType()->isPtrOrPtrVectorTy());
1705
1706 Type *NewTy = V->getType()->getWithNewType(EltTy: NewPtrTy);
1707 V->mutateType(Ty: NewTy);
1708
1709 // Adjust the types of any constant operands.
1710 if (SelectInst *SI = dyn_cast<SelectInst>(Val: V)) {
1711 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: SI->getOperand(i_nocapture: 1)))
1712 SI->setOperand(i_nocapture: 1, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1713
1714 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: SI->getOperand(i_nocapture: 2)))
1715 SI->setOperand(i_nocapture: 2, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1716 } else if (PHINode *Phi = dyn_cast<PHINode>(Val: V)) {
1717 for (unsigned I = 0, E = Phi->getNumIncomingValues(); I != E; ++I) {
1718 if (isa<ConstantPointerNull, ConstantAggregateZero>(
1719 Val: Phi->getIncomingValue(i: I)))
1720 Phi->setIncomingValue(i: I, V: Constant::getNullValue(Ty: NewTy));
1721 }
1722 }
1723
1724 continue;
1725 }
1726
1727 IntrinsicInst *Intr = cast<IntrinsicInst>(Val: Call);
1728 Builder.SetInsertPoint(Intr);
1729 switch (Intr->getIntrinsicID()) {
1730 case Intrinsic::lifetime_start:
1731 case Intrinsic::lifetime_end:
1732 // These intrinsics are for address space 0 only
1733 Intr->eraseFromParent();
1734 continue;
1735 case Intrinsic::memcpy:
1736 case Intrinsic::memmove:
1737 // These have 2 pointer operands. In case if second pointer also needs
1738 // to be replaced we defer processing of these intrinsics until all
1739 // other values are processed.
1740 DeferredIntrs.insert(X: Intr);
1741 continue;
1742 case Intrinsic::memset: {
1743 MemSetInst *MemSet = cast<MemSetInst>(Val: Intr);
1744 Builder.CreateMemSet(Ptr: MemSet->getRawDest(), Val: MemSet->getValue(),
1745 Size: MemSet->getLength(), Align: MemSet->getDestAlign(),
1746 isVolatile: MemSet->isVolatile());
1747 Intr->eraseFromParent();
1748 continue;
1749 }
1750 case Intrinsic::invariant_start:
1751 case Intrinsic::invariant_end:
1752 case Intrinsic::launder_invariant_group:
1753 case Intrinsic::strip_invariant_group: {
1754 assert(Intr->getArgOperand(Intr->arg_size() - 1)->getType() == NewPtrTy &&
1755 "pointer operand should already have been promoted");
1756 Function *NewF = Intrinsic::getOrInsertDeclaration(
1757 M: Intr->getModule(), id: Intr->getIntrinsicID(), OverloadTys: NewPtrTy);
1758 Intr->mutateType(Ty: NewF->getReturnType());
1759 Intr->setCalledFunction(NewF);
1760 continue;
1761 }
1762 case Intrinsic::objectsize: {
1763 Value *Src = Intr->getOperand(i_nocapture: 0);
1764
1765 Value *NewCall = Builder.CreateIntrinsic(
1766 ID: Intrinsic::objectsize,
1767 OverloadTypes: {Intr->getType(), PointerType::get(C&: Context, AddressSpace: AMDGPUAS::LOCAL_ADDRESS)},
1768 Args: {Src, Intr->getOperand(i_nocapture: 1), Intr->getOperand(i_nocapture: 2), Intr->getOperand(i_nocapture: 3)});
1769 Intr->replaceAllUsesWith(V: NewCall);
1770 Intr->eraseFromParent();
1771 continue;
1772 }
1773 default:
1774 Intr->print(O&: errs());
1775 llvm_unreachable("Don't know how to promote alloca intrinsic use.");
1776 }
1777 }
1778
1779 return true;
1780}
1781
1782void AMDGPUPromoteAllocaImpl::finishDeferredAllocaToLDSPromotion(
1783 SetVector<IntrinsicInst *> &DeferredIntrs) {
1784
1785 for (IntrinsicInst *Intr : DeferredIntrs) {
1786 IRBuilder<> Builder(Intr);
1787 Builder.SetInsertPoint(Intr);
1788 Intrinsic::ID ID = Intr->getIntrinsicID();
1789 assert(ID == Intrinsic::memcpy || ID == Intrinsic::memmove);
1790
1791 MemTransferInst *MI = cast<MemTransferInst>(Val: Intr);
1792 auto *B = Builder.CreateMemTransferInst(
1793 IntrID: ID, Dst: MI->getRawDest(), DstAlign: MI->getDestAlign(), Src: MI->getRawSource(),
1794 SrcAlign: MI->getSourceAlign(), Size: MI->getLength(), isVolatile: MI->isVolatile());
1795
1796 for (unsigned I = 0; I != 2; ++I) {
1797 if (uint64_t Bytes = Intr->getParamDereferenceableBytes(i: I)) {
1798 B->addDereferenceableParamAttr(i: I, Bytes);
1799 }
1800 }
1801
1802 Intr->eraseFromParent();
1803 }
1804}
1805