1//===-- AMDGPUPromoteAlloca.cpp - Promote Allocas -------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Eliminates allocas by either converting them into vectors or by migrating
10// them to local address space.
11//
12// Two passes are exposed by this file:
13// - "promote-alloca-to-vector", which runs early in the pipeline and only
14// promotes to vector. Promotion to vector is almost always profitable
15// except when the alloca is too big and the promotion would result in
16// very high register pressure.
17// - "promote-alloca", which does both promotion to vector and LDS and runs
18// much later in the pipeline. This runs after SROA because promoting to
19// LDS is of course less profitable than getting rid of the alloca or
20// vectorizing it, thus we only want to do it when the only alternative is
21// lowering the alloca to stack.
22//
23// Note that both of them exist for the old and new PMs. The new PM passes are
24// declared in AMDGPU.h and the legacy PM ones are declared here.s
25//
26//===----------------------------------------------------------------------===//
27
28#include "AMDGPU.h"
29#include "GCNSubtarget.h"
30#include "Utils/AMDGPUBaseInfo.h"
31#include "llvm/ADT/STLExtras.h"
32#include "llvm/Analysis/CaptureTracking.h"
33#include "llvm/Analysis/InstSimplifyFolder.h"
34#include "llvm/Analysis/InstructionSimplify.h"
35#include "llvm/Analysis/LoopInfo.h"
36#include "llvm/Analysis/ValueTracking.h"
37#include "llvm/CodeGen/TargetPassConfig.h"
38#include "llvm/IR/IRBuilder.h"
39#include "llvm/IR/IntrinsicInst.h"
40#include "llvm/IR/IntrinsicsAMDGPU.h"
41#include "llvm/IR/IntrinsicsR600.h"
42#include "llvm/IR/PatternMatch.h"
43#include "llvm/InitializePasses.h"
44#include "llvm/Pass.h"
45#include "llvm/Support/MathExtras.h"
46#include "llvm/Target/TargetMachine.h"
47#include "llvm/Transforms/Utils/SSAUpdater.h"
48
49#define DEBUG_TYPE "amdgpu-promote-alloca"
50
51using namespace llvm;
52
53namespace {
54
55static cl::opt<bool>
56 DisablePromoteAllocaToVector("disable-promote-alloca-to-vector",
57 cl::desc("Disable promote alloca to vector"),
58 cl::init(Val: false));
59
60static cl::opt<bool>
61 DisablePromoteAllocaToLDS("disable-promote-alloca-to-lds",
62 cl::desc("Disable promote alloca to LDS"),
63 cl::init(Val: false));
64
65static cl::opt<unsigned> PromoteAllocaToVectorLimit(
66 "amdgpu-promote-alloca-to-vector-limit",
67 cl::desc("Maximum byte size to consider promote alloca to vector"),
68 cl::init(Val: 0));
69
70static cl::opt<unsigned> PromoteAllocaToVectorMaxRegs(
71 "amdgpu-promote-alloca-to-vector-max-regs",
72 cl::desc(
73 "Maximum vector size (in 32b registers) to use when promoting alloca"),
74 cl::init(Val: 32));
75
76// Use up to 1/4 of available register budget for vectorization.
77// FIXME: Increase the limit for whole function budgets? Perhaps x2?
78static cl::opt<unsigned> PromoteAllocaToVectorVGPRRatio(
79 "amdgpu-promote-alloca-to-vector-vgpr-ratio",
80 cl::desc("Ratio of VGPRs to budget for promoting alloca to vectors"),
81 cl::init(Val: 4));
82
83static cl::opt<unsigned>
84 LoopUserWeight("promote-alloca-vector-loop-user-weight",
85 cl::desc("The bonus weight of users of allocas within loop "
86 "when sorting profitable allocas"),
87 cl::init(Val: 4));
88
89// We support vector indices of the form ((A * stride) >> shift) + B
90// VarIndex is A, VarMul is stride, VarShift is shift and ConstIndex is B. All
91// parts are optional.
92struct GEPToVectorIndex {
93 WeakTrackingVH VarIndex = nullptr; // defaults to 0
94 ConstantInt *VarMul = nullptr; // defaults to 1
95 ConstantInt *VarShift = nullptr; // defaults to 0
96 ConstantInt *ConstIndex = nullptr; // defaults to 0
97 Value *Full = nullptr;
98};
99
100struct MemTransferInfo {
101 ConstantInt *SrcIndex = nullptr;
102 ConstantInt *DestIndex = nullptr;
103};
104
105// Analysis for planning the different strategies of alloca promotion.
106struct AllocaAnalysis {
107 AllocaInst *Alloca = nullptr;
108 DenseSet<Value *> Pointers;
109 SmallVector<Use *> Uses;
110 unsigned Score = 0;
111 bool HaveSelectOrPHI = false;
112 struct {
113 FixedVectorType *Ty = nullptr;
114 SmallVector<Instruction *> Worklist;
115 SmallVector<Instruction *> UsersToRemove;
116 MapVector<GetElementPtrInst *, GEPToVectorIndex> GEPVectorIdx;
117 MapVector<MemTransferInst *, MemTransferInfo> TransferInfo;
118 } Vector;
119 struct {
120 bool Enable = false;
121 SmallVector<User *> Worklist;
122 } LDS;
123
124 explicit AllocaAnalysis(AllocaInst *Alloca) : Alloca(Alloca) {}
125};
126
127// Shared implementation which can do both promotion to vector and to LDS.
128class AMDGPUPromoteAllocaImpl {
129private:
130 const TargetMachine &TM;
131 LoopInfo &LI;
132 Module &Mod;
133 const DataLayout &DL;
134
135 // FIXME: This should be per-kernel.
136 uint32_t LocalMemLimit = 0;
137 uint32_t CurrentLocalMemUsage = 0;
138 unsigned MaxVGPRs;
139 unsigned VGPRBudgetRatio;
140 unsigned MaxVectorRegs;
141
142 bool IsAMDGCN = false;
143 bool IsAMDHSA = false;
144
145 std::pair<Value *, Value *> getLocalSizeYZ(IRBuilder<> &Builder);
146 Value *getWorkitemID(IRBuilder<> &Builder, unsigned N);
147
148 bool collectAllocaUses(AllocaAnalysis &AA) const;
149
150 /// Val is a derived pointer from Alloca. OpIdx0/OpIdx1 are the operand
151 /// indices to an instruction with 2 pointer inputs (e.g. select, icmp).
152 /// Returns true if both operands are derived from the same alloca. Val should
153 /// be the same value as one of the input operands of UseInst.
154 bool binaryOpIsDerivedFromSameAlloca(Value *Alloca, Value *Val,
155 Instruction *UseInst, int OpIdx0,
156 int OpIdx1) const;
157
158 /// Check whether we have enough local memory for promotion.
159 bool hasSufficientLocalMem(const Function &F);
160
161 FixedVectorType *getVectorTypeForAlloca(Type *AllocaTy) const;
162 void analyzePromoteToVector(AllocaAnalysis &AA) const;
163 void promoteAllocaToVector(AllocaAnalysis &AA);
164 void analyzePromoteToLDS(AllocaAnalysis &AA) const;
165 bool tryPromoteAllocaToLDS(AllocaAnalysis &AA, bool SufficientLDS,
166 SetVector<IntrinsicInst *> &DeferredIntrs);
167 void
168 finishDeferredAllocaToLDSPromotion(SetVector<IntrinsicInst *> &DeferredIntrs);
169
170 void scoreAlloca(AllocaAnalysis &AA) const;
171
172 void setFunctionLimits(const Function &F);
173
174public:
175 AMDGPUPromoteAllocaImpl(TargetMachine &TM, Module &M, LoopInfo &LI)
176 : TM(TM), LI(LI), Mod(M), DL(M.getDataLayout()) {
177 const Triple &TT = M.getTargetTriple();
178 IsAMDGCN = TT.isAMDGCN();
179 IsAMDHSA = TT.getOS() == Triple::AMDHSA;
180 }
181
182 bool run(Function &F, bool PromoteToLDS);
183};
184
185// FIXME: This can create globals so should be a module pass.
186class AMDGPUPromoteAlloca : public FunctionPass {
187public:
188 static char ID;
189
190 AMDGPUPromoteAlloca() : FunctionPass(ID) {}
191
192 bool runOnFunction(Function &F) override {
193 if (skipFunction(F))
194 return false;
195 if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>())
196 return AMDGPUPromoteAllocaImpl(
197 TPC->getTM<TargetMachine>(), *F.getParent(),
198 getAnalysis<LoopInfoWrapperPass>().getLoopInfo())
199 .run(F, /*PromoteToLDS*/ true);
200 return false;
201 }
202
203 StringRef getPassName() const override { return "AMDGPU Promote Alloca"; }
204
205 void getAnalysisUsage(AnalysisUsage &AU) const override {
206 AU.setPreservesCFG();
207 AU.addRequired<LoopInfoWrapperPass>();
208 FunctionPass::getAnalysisUsage(AU);
209 }
210};
211
212static unsigned getMaxVGPRs(unsigned LDSBytes, const TargetMachine &TM,
213 const Function &F) {
214 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
215
216 unsigned DynamicVGPRBlockSize = AMDGPU::getDynamicVGPRBlockSize(F);
217 unsigned MaxVGPRs = ST.getMaxNumVGPRs(
218 WavesPerEU: ST.getWavesPerEU(FlatWorkGroupSizes: ST.getFlatWorkGroupSizes(F), LDSBytes, F).first,
219 DynamicVGPRBlockSize);
220
221 // A non-entry function has only 32 caller preserved registers.
222 // Do not promote alloca which will force spilling unless we know the function
223 // will be inlined.
224 if (!F.hasFnAttribute(Kind: Attribute::AlwaysInline) &&
225 !AMDGPU::isEntryFunctionCC(CC: F.getCallingConv()))
226 MaxVGPRs = std::min(a: MaxVGPRs, b: 32u);
227 return MaxVGPRs;
228}
229
230} // end anonymous namespace
231
232char AMDGPUPromoteAlloca::ID = 0;
233
234INITIALIZE_PASS_BEGIN(AMDGPUPromoteAlloca, DEBUG_TYPE,
235 "AMDGPU promote alloca to vector or LDS", false, false)
236// Move LDS uses from functions to kernels before promote alloca for accurate
237// estimation of LDS available
238INITIALIZE_PASS_DEPENDENCY(AMDGPULowerModuleLDSLegacy)
239INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
240INITIALIZE_PASS_END(AMDGPUPromoteAlloca, DEBUG_TYPE,
241 "AMDGPU promote alloca to vector or LDS", false, false)
242
243char &llvm::AMDGPUPromoteAllocaID = AMDGPUPromoteAlloca::ID;
244
245PreservedAnalyses AMDGPUPromoteAllocaPass::run(Function &F,
246 FunctionAnalysisManager &AM) {
247 auto &LI = AM.getResult<LoopAnalysis>(IR&: F);
248 bool Changed = AMDGPUPromoteAllocaImpl(TM, *F.getParent(), LI)
249 .run(F, /*PromoteToLDS=*/true);
250 if (Changed) {
251 PreservedAnalyses PA;
252 PA.preserveSet<CFGAnalyses>();
253 return PA;
254 }
255 return PreservedAnalyses::all();
256}
257
258PreservedAnalyses
259AMDGPUPromoteAllocaToVectorPass::run(Function &F, FunctionAnalysisManager &AM) {
260 auto &LI = AM.getResult<LoopAnalysis>(IR&: F);
261 bool Changed = AMDGPUPromoteAllocaImpl(TM, *F.getParent(), LI)
262 .run(F, /*PromoteToLDS=*/false);
263 if (Changed) {
264 PreservedAnalyses PA;
265 PA.preserveSet<CFGAnalyses>();
266 return PA;
267 }
268 return PreservedAnalyses::all();
269}
270
271FunctionPass *llvm::createAMDGPUPromoteAlloca() {
272 return new AMDGPUPromoteAlloca();
273}
274
275bool AMDGPUPromoteAllocaImpl::collectAllocaUses(AllocaAnalysis &AA) const {
276 const auto RejectUser = [&](Instruction *Inst, Twine Msg) {
277 LLVM_DEBUG(dbgs() << " Cannot promote alloca: " << Msg << "\n"
278 << " " << *Inst << "\n");
279 return false;
280 };
281
282 SmallVector<Instruction *, 4> WorkList({AA.Alloca});
283 while (!WorkList.empty()) {
284 auto *Cur = WorkList.pop_back_val();
285 if (find(Range&: AA.Pointers, Val: Cur) != AA.Pointers.end())
286 continue;
287 AA.Pointers.insert(V: Cur);
288 for (auto &U : Cur->uses()) {
289 auto *Inst = cast<Instruction>(Val: U.getUser());
290 if (isa<StoreInst>(Val: Inst)) {
291 if (U.getOperandNo() != StoreInst::getPointerOperandIndex()) {
292 return RejectUser(Inst, "pointer escapes via store");
293 }
294 }
295 AA.Uses.push_back(Elt: &U);
296
297 if (isa<GetElementPtrInst>(Val: U.getUser())) {
298 WorkList.push_back(Elt: Inst);
299 } else if (auto *SI = dyn_cast<SelectInst>(Val: Inst)) {
300 // Only promote a select if we know that the other select operand is
301 // from another pointer that will also be promoted.
302 if (!binaryOpIsDerivedFromSameAlloca(Alloca: AA.Alloca, Val: Cur, UseInst: SI, OpIdx0: 1, OpIdx1: 2))
303 return RejectUser(Inst, "select from mixed objects");
304 WorkList.push_back(Elt: Inst);
305 AA.HaveSelectOrPHI = true;
306 } else if (auto *Phi = dyn_cast<PHINode>(Val: Inst)) {
307 // Repeat for phis.
308
309 // TODO: Handle more complex cases. We should be able to replace loops
310 // over arrays.
311 switch (Phi->getNumIncomingValues()) {
312 case 1:
313 break;
314 case 2:
315 if (!binaryOpIsDerivedFromSameAlloca(Alloca: AA.Alloca, Val: Cur, UseInst: Phi, OpIdx0: 0, OpIdx1: 1))
316 return RejectUser(Inst, "phi from mixed objects");
317 break;
318 default:
319 return RejectUser(Inst, "phi with too many operands");
320 }
321
322 WorkList.push_back(Elt: Inst);
323 AA.HaveSelectOrPHI = true;
324 }
325 }
326 }
327 return true;
328}
329
330void AMDGPUPromoteAllocaImpl::scoreAlloca(AllocaAnalysis &AA) const {
331 LLVM_DEBUG(dbgs() << "Scoring: " << *AA.Alloca << "\n");
332 unsigned Score = 0;
333 // Increment score by one for each user + a bonus for users within loops.
334 for (auto *U : AA.Uses) {
335 Instruction *Inst = cast<Instruction>(Val: U->getUser());
336 if (isa<GetElementPtrInst>(Val: Inst) || isa<SelectInst>(Val: Inst) ||
337 isa<PHINode>(Val: Inst))
338 continue;
339 unsigned UserScore =
340 1 + (LoopUserWeight * LI.getLoopDepth(BB: Inst->getParent()));
341 LLVM_DEBUG(dbgs() << " [+" << UserScore << "]:\t" << *Inst << "\n");
342 Score += UserScore;
343 }
344 LLVM_DEBUG(dbgs() << " => Final Score:" << Score << "\n");
345 AA.Score = Score;
346}
347
348void AMDGPUPromoteAllocaImpl::setFunctionLimits(const Function &F) {
349 // Load per function limits, overriding with global options where appropriate.
350 // R600 register tuples/aliasing are fragile with large vector promotions so
351 // apply architecture specific limit here.
352 const int R600MaxVectorRegs = 16;
353 MaxVectorRegs = F.getFnAttributeAsParsedInteger(
354 Kind: "amdgpu-promote-alloca-to-vector-max-regs",
355 Default: IsAMDGCN ? PromoteAllocaToVectorMaxRegs : R600MaxVectorRegs);
356 if (PromoteAllocaToVectorMaxRegs.getNumOccurrences())
357 MaxVectorRegs = PromoteAllocaToVectorMaxRegs;
358 VGPRBudgetRatio = F.getFnAttributeAsParsedInteger(
359 Kind: "amdgpu-promote-alloca-to-vector-vgpr-ratio",
360 Default: PromoteAllocaToVectorVGPRRatio);
361 if (PromoteAllocaToVectorVGPRRatio.getNumOccurrences())
362 VGPRBudgetRatio = PromoteAllocaToVectorVGPRRatio;
363}
364
365bool AMDGPUPromoteAllocaImpl::run(Function &F, bool PromoteToLDS) {
366 if (DisablePromoteAllocaToLDS && DisablePromoteAllocaToVector)
367 return false;
368
369 bool SufficientLDS = PromoteToLDS && hasSufficientLocalMem(F);
370 MaxVGPRs = IsAMDGCN ? getMaxVGPRs(LDSBytes: CurrentLocalMemUsage, TM, F) : 128;
371 setFunctionLimits(F);
372
373 unsigned VectorizationBudget =
374 (PromoteAllocaToVectorLimit ? PromoteAllocaToVectorLimit * 8
375 : (MaxVGPRs * 32)) /
376 VGPRBudgetRatio;
377
378 std::vector<AllocaAnalysis> Allocas;
379 for (Instruction &I : F.getEntryBlock()) {
380 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val: &I)) {
381 // Array allocations are probably not worth handling, since an allocation
382 // of the array type is the canonical form.
383 if (!AI->isStaticAlloca() || AI->isArrayAllocation())
384 continue;
385
386 LLVM_DEBUG(dbgs() << "Analyzing: " << *AI << '\n');
387
388 AllocaAnalysis AA{AI};
389 if (collectAllocaUses(AA)) {
390 analyzePromoteToVector(AA);
391 if (PromoteToLDS)
392 analyzePromoteToLDS(AA);
393 if (AA.Vector.Ty || AA.LDS.Enable) {
394 scoreAlloca(AA);
395 Allocas.push_back(x: std::move(AA));
396 }
397 }
398 }
399 }
400
401 stable_sort(Range&: Allocas,
402 C: [](const auto &A, const auto &B) { return A.Score > B.Score; });
403
404 // clang-format off
405 LLVM_DEBUG(
406 dbgs() << "Sorted Worklist:\n";
407 for (const auto &AA : Allocas)
408 dbgs() << " " << *AA.Alloca << "\n";
409 );
410 // clang-format on
411
412 bool Changed = false;
413 SetVector<IntrinsicInst *> DeferredIntrs;
414 for (AllocaAnalysis &AA : Allocas) {
415 if (AA.Vector.Ty) {
416 std::optional<TypeSize> Size = AA.Alloca->getAllocationSize(DL);
417 assert(Size); // Expected to succeed on non-array alloca.
418 const unsigned AllocaCost = Size->getFixedValue() * 8;
419 // First, check if we have enough budget to vectorize this alloca.
420 if (AllocaCost <= VectorizationBudget) {
421 promoteAllocaToVector(AA);
422 Changed = true;
423 assert((VectorizationBudget - AllocaCost) < VectorizationBudget &&
424 "Underflow!");
425 VectorizationBudget -= AllocaCost;
426 LLVM_DEBUG(dbgs() << " Remaining vectorization budget:"
427 << VectorizationBudget << "\n");
428 continue;
429 } else {
430 LLVM_DEBUG(dbgs() << "Alloca too big for vectorization (size:"
431 << AllocaCost << ", budget:" << VectorizationBudget
432 << "): " << *AA.Alloca << "\n");
433 }
434 }
435
436 if (AA.LDS.Enable &&
437 tryPromoteAllocaToLDS(AA, SufficientLDS, DeferredIntrs))
438 Changed = true;
439 }
440 finishDeferredAllocaToLDSPromotion(DeferredIntrs);
441
442 // NOTE: tryPromoteAllocaToVector removes the alloca, so Allocas contains
443 // dangling pointers. If we want to reuse it past this point, the loop above
444 // would need to be updated to remove successfully promoted allocas.
445
446 return Changed;
447}
448
449// Checks if the instruction I is a memset user of the alloca AI that we can
450// deal with. Currently, only non-volatile memsets that affect the whole alloca
451// are handled.
452static bool isSupportedMemset(MemSetInst *I, AllocaInst *AI,
453 const DataLayout &DL) {
454 using namespace PatternMatch;
455 // For now we only care about non-volatile memsets that affect the whole type
456 // (start at index 0 and fill the whole alloca).
457 //
458 // TODO: Now that we moved to PromoteAlloca we could handle any memsets
459 // (except maybe volatile ones?) - we just need to use shufflevector if it
460 // only affects a subset of the vector.
461 const unsigned Size = DL.getTypeStoreSize(Ty: AI->getAllocatedType());
462 return I->getOperand(i_nocapture: 0) == AI &&
463 match(V: I->getOperand(i_nocapture: 2), P: m_SpecificInt(V: Size)) && !I->isVolatile();
464}
465
466static Value *calculateVectorIndex(Value *Ptr, AllocaAnalysis &AA) {
467 IRBuilder<> B(Ptr->getContext());
468
469 Ptr = Ptr->stripPointerCasts();
470 if (Ptr == AA.Alloca)
471 return B.getInt32(C: 0);
472
473 auto *GEP = cast<GetElementPtrInst>(Val: Ptr);
474 auto I = AA.Vector.GEPVectorIdx.find(Key: GEP);
475 assert(I != AA.Vector.GEPVectorIdx.end() && "Must have entry for GEP!");
476
477 if (!I->second.Full) {
478 Value *Result = nullptr;
479 B.SetInsertPoint(GEP);
480
481 if (I->second.VarIndex) {
482 Result = I->second.VarIndex;
483 Result = B.CreateSExtOrTrunc(V: Result, DestTy: B.getInt32Ty());
484
485 if (I->second.VarMul)
486 Result = B.CreateMul(LHS: Result, RHS: I->second.VarMul);
487
488 if (I->second.VarShift)
489 Result = B.CreateAShr(LHS: Result, RHS: I->second.VarShift, Name: "", /*isExact*/ true);
490 }
491
492 if (I->second.ConstIndex) {
493 if (Result)
494 Result = B.CreateAdd(LHS: Result, RHS: I->second.ConstIndex);
495 else
496 Result = I->second.ConstIndex;
497 }
498
499 if (!Result)
500 Result = B.getInt32(C: 0);
501
502 I->second.Full = Result;
503 }
504
505 return I->second.Full;
506}
507
508static std::optional<GEPToVectorIndex>
509computeGEPToVectorIndex(GetElementPtrInst *GEP, AllocaInst *Alloca,
510 Type *VecElemTy, const DataLayout &DL) {
511 // TODO: Extracting a "multiple of X" from a GEP might be a useful generic
512 // helper.
513 LLVMContext &Ctx = GEP->getContext();
514 unsigned BW = DL.getIndexTypeSizeInBits(Ty: GEP->getType());
515 SmallMapVector<Value *, APInt, 4> VarOffsets;
516 APInt ConstOffset(BW, 0);
517
518 // Walk backwards through nested GEPs to collect both constant and variable
519 // offsets, so that nested vector GEP chains can be lowered in one step.
520 //
521 // Given this IR fragment as input:
522 //
523 // %0 = alloca [10 x <2 x i32>], align 8, addrspace(5)
524 // %1 = getelementptr [10 x <2 x i32>], ptr addrspace(5) %0, i32 0, i32 %j
525 // %2 = getelementptr i8, ptr addrspace(5) %1, i32 4
526 // %3 = load i32, ptr addrspace(5) %2, align 4
527 //
528 // Combine both GEP operations in a single pass, producing:
529 // BasePtr = %0
530 // ConstOffset = 4
531 // VarOffsets = { %j -> element_size(<2 x i32>) }
532 //
533 // That lets us emit a single buffer_load directly into a VGPR, without ever
534 // allocating scratch memory for the intermediate pointer.
535 Value *CurPtr = GEP;
536 while (auto *CurGEP = dyn_cast<GetElementPtrInst>(Val: CurPtr)) {
537 if (!CurGEP->collectOffset(DL, BitWidth: BW, VariableOffsets&: VarOffsets, ConstantOffset&: ConstOffset))
538 return {};
539
540 // Move to the next outer pointer.
541 CurPtr = CurGEP->getPointerOperand();
542 }
543
544 assert(CurPtr == Alloca && "GEP not based on alloca");
545
546 int64_t VecElemSize = DL.getTypeAllocSize(Ty: VecElemTy);
547 if (VarOffsets.size() > 1)
548 return {};
549
550 // We support vector indices of the form ((VarIndex * stride) >> shift) + B.
551 // IndexQuot represents B. Check that the constant offset is a multiple
552 // of the vector element size.
553 if (ConstOffset.srem(RHS: VecElemSize) != 0)
554 return {};
555 APInt IndexQuot = ConstOffset.sdiv(RHS: VecElemSize);
556
557 GEPToVectorIndex Result;
558
559 if (!ConstOffset.isZero())
560 Result.ConstIndex = ConstantInt::get(Context&: Ctx, V: IndexQuot.sextOrTrunc(width: BW));
561
562 // If there are no variable offsets, only a constant offset, then we're done.
563 if (VarOffsets.empty())
564 return Result;
565
566 // Scale is the stride in the (A * stride) part. Check that there is only one
567 // variable offset and extract the scale factor.
568 const auto &VarOffset = VarOffsets.front();
569 auto ScaleOpt = VarOffset.second.tryZExtValue();
570 if (!ScaleOpt || *ScaleOpt == 0)
571 return {};
572
573 uint64_t Scale = *ScaleOpt;
574 Result.VarIndex = VarOffset.first;
575 auto *OffsetType = dyn_cast<IntegerType>(Val: Result.VarIndex->getType());
576 if (!OffsetType)
577 return {};
578
579 // The vector index for the variable part is: VarIndex * Scale / VecElemSize.
580 if (Scale >= (uint64_t)VecElemSize) {
581 if (Scale % VecElemSize != 0)
582 return {};
583
584 // Scale is a multiple of VecElemSize, so the index is just: VarIndex *
585 // (Scale / VecElemSize).
586 uint64_t VarMul = Scale / VecElemSize;
587 // Only the multiplier is needed.
588 if (VarMul != 1)
589 Result.VarMul = ConstantInt::get(Context&: Ctx, V: APInt(BW, VarMul));
590 } else {
591 if ((uint64_t)VecElemSize % Scale != 0)
592 return {};
593
594 // VecElemSize is a multiple of Scale, so the index is just: VarIndex /
595 // (VecElemSize / Scale).
596 uint64_t Divisor = VecElemSize / Scale;
597 // The divisor must be a power of 2 so we can use a right shift.
598 if (!isPowerOf2_64(Value: Divisor))
599 return {};
600
601 // VarIndex must be known to be divisible by that divisor.
602 KnownBits KB = computeKnownBits(V: VarOffset.first, DL);
603 if (KB.countMinTrailingZeros() < Log2_64(Value: Divisor))
604 return {};
605
606 Result.VarShift = ConstantInt::get(Context&: Ctx, V: APInt(BW, Log2_64(Value: Divisor)));
607 }
608
609 return Result;
610}
611
612/// Promotes a single user of the alloca to a vector form.
613///
614/// \param Inst Instruction to be promoted.
615/// \param DL Module Data Layout.
616/// \param AA Alloca Analysis.
617/// \param VecStoreSize Size of \p VectorTy in bytes.
618/// \param ElementSize Size of \p VectorTy element type in bytes.
619/// \param CurVal Current value of the vector (e.g. last stored value)
620/// \param[out] DeferredLoads \p Inst is added to this vector if it can't
621/// be promoted now. This happens when promoting requires \p
622/// CurVal, but \p CurVal is nullptr.
623/// \return the stored value if \p Inst would have written to the alloca, or
624/// nullptr otherwise.
625static Value *promoteAllocaUserToVector(Instruction *Inst, const DataLayout &DL,
626 AllocaAnalysis &AA,
627 unsigned VecStoreSize,
628 unsigned ElementSize,
629 function_ref<Value *()> GetCurVal) {
630 // Note: we use InstSimplifyFolder because it can leverage the DataLayout
631 // to do more folding, especially in the case of vector splats.
632 IRBuilder<InstSimplifyFolder> Builder(Inst->getContext(),
633 InstSimplifyFolder(DL));
634 Builder.SetInsertPoint(Inst);
635
636 Type *VecEltTy = AA.Vector.Ty->getElementType();
637
638 switch (Inst->getOpcode()) {
639 case Instruction::Load: {
640 Value *CurVal = GetCurVal();
641 Value *Index =
642 calculateVectorIndex(Ptr: cast<LoadInst>(Val: Inst)->getPointerOperand(), AA);
643
644 // We're loading the full vector.
645 Type *AccessTy = Inst->getType();
646 TypeSize AccessSize = DL.getTypeStoreSize(Ty: AccessTy);
647 if (Constant *CI = dyn_cast<Constant>(Val: Index)) {
648 if (CI->isNullValue() && AccessSize == VecStoreSize) {
649 Inst->replaceAllUsesWith(
650 V: Builder.CreateBitPreservingCastChain(DL, V: CurVal, NewTy: AccessTy));
651 return nullptr;
652 }
653 }
654
655 // Loading a subvector.
656 if (isa<FixedVectorType>(Val: AccessTy)) {
657 assert(AccessSize.isKnownMultipleOf(DL.getTypeStoreSize(VecEltTy)));
658 const unsigned NumLoadedElts = AccessSize / DL.getTypeStoreSize(Ty: VecEltTy);
659 auto *SubVecTy = FixedVectorType::get(ElementType: VecEltTy, NumElts: NumLoadedElts);
660 assert(DL.getTypeStoreSize(SubVecTy) == DL.getTypeStoreSize(AccessTy));
661
662 // If idx is dynamic, then sandwich load with bitcasts.
663 // ie. VectorTy SubVecTy AccessTy
664 // <64 x i8> -> <16 x i8> <8 x i16>
665 // <64 x i8> -> <4 x i128> -> i128 -> <8 x i16>
666 // Extracting subvector with dynamic index has very large expansion in
667 // the amdgpu backend. Limit to pow2.
668 FixedVectorType *VectorTy = AA.Vector.Ty;
669 TypeSize NumBits = DL.getTypeStoreSize(Ty: SubVecTy) * 8u;
670 uint64_t LoadAlign = cast<LoadInst>(Val: Inst)->getAlign().value();
671 bool IsAlignedLoad = NumBits <= (LoadAlign * 8u);
672 unsigned TotalNumElts = VectorTy->getNumElements();
673 bool IsProperlyDivisible = TotalNumElts % NumLoadedElts == 0;
674 if (!isa<ConstantInt>(Val: Index) &&
675 llvm::isPowerOf2_32(Value: SubVecTy->getNumElements()) &&
676 IsProperlyDivisible && IsAlignedLoad) {
677 IntegerType *NewElemTy = Builder.getIntNTy(N: NumBits);
678 const unsigned NewNumElts =
679 DL.getTypeStoreSize(Ty: VectorTy) * 8u / NumBits;
680 const unsigned LShrAmt = llvm::Log2_32(Value: SubVecTy->getNumElements());
681 FixedVectorType *BitCastTy =
682 FixedVectorType::get(ElementType: NewElemTy, NumElts: NewNumElts);
683 Value *BCVal =
684 Builder.CreateBitPreservingCastChain(DL, V: CurVal, NewTy: BitCastTy);
685 Value *NewIdx = Builder.CreateLShr(
686 LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: LShrAmt));
687 Value *ExtVal = Builder.CreateExtractElement(Vec: BCVal, Idx: NewIdx);
688 Value *BCOut =
689 Builder.CreateBitPreservingCastChain(DL, V: ExtVal, NewTy: AccessTy);
690 Inst->replaceAllUsesWith(V: BCOut);
691 return nullptr;
692 }
693
694 Value *SubVec = PoisonValue::get(T: SubVecTy);
695 for (unsigned K = 0; K < NumLoadedElts; ++K) {
696 Value *CurIdx =
697 Builder.CreateAdd(LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: K));
698 SubVec = Builder.CreateInsertElement(
699 Vec: SubVec, NewElt: Builder.CreateExtractElement(Vec: CurVal, Idx: CurIdx), Idx: K);
700 }
701
702 Inst->replaceAllUsesWith(
703 V: Builder.CreateBitPreservingCastChain(DL, V: SubVec, NewTy: AccessTy));
704 return nullptr;
705 }
706
707 // We're loading one element.
708 Value *ExtractElement = Builder.CreateExtractElement(Vec: CurVal, Idx: Index);
709 if (AccessTy != VecEltTy)
710 ExtractElement = Builder.CreateBitOrPointerCast(V: ExtractElement, DestTy: AccessTy);
711
712 Inst->replaceAllUsesWith(V: ExtractElement);
713 return nullptr;
714 }
715 case Instruction::Store: {
716 // For stores, it's a bit trickier and it depends on whether we're storing
717 // the full vector or not. If we're storing the full vector, we don't need
718 // to know the current value. If this is a store of a single element, we
719 // need to know the value.
720 StoreInst *SI = cast<StoreInst>(Val: Inst);
721 Value *Index = calculateVectorIndex(Ptr: SI->getPointerOperand(), AA);
722 Value *Val = SI->getValueOperand();
723
724 // We're storing the full vector, we can handle this without knowing CurVal.
725 Type *AccessTy = Val->getType();
726 TypeSize AccessSize = DL.getTypeStoreSize(Ty: AccessTy);
727 if (Constant *CI = dyn_cast<Constant>(Val: Index))
728 if (CI->isNullValue() && AccessSize == VecStoreSize)
729 return Builder.CreateBitPreservingCastChain(DL, V: Val, NewTy: AA.Vector.Ty);
730
731 // Storing a subvector.
732 if (isa<FixedVectorType>(Val: AccessTy)) {
733 assert(AccessSize.isKnownMultipleOf(DL.getTypeStoreSize(VecEltTy)));
734 const unsigned NumWrittenElts =
735 AccessSize / DL.getTypeStoreSize(Ty: VecEltTy);
736 const unsigned NumVecElts = AA.Vector.Ty->getNumElements();
737 auto *SubVecTy = FixedVectorType::get(ElementType: VecEltTy, NumElts: NumWrittenElts);
738 assert(DL.getTypeStoreSize(SubVecTy) == DL.getTypeStoreSize(AccessTy));
739
740 Val = Builder.CreateBitPreservingCastChain(DL, V: Val, NewTy: SubVecTy);
741 Value *CurVec = GetCurVal();
742 for (unsigned K = 0, NumElts = std::min(a: NumWrittenElts, b: NumVecElts);
743 K < NumElts; ++K) {
744 Value *CurIdx =
745 Builder.CreateAdd(LHS: Index, RHS: ConstantInt::get(Ty: Index->getType(), V: K));
746 CurVec = Builder.CreateInsertElement(
747 Vec: CurVec, NewElt: Builder.CreateExtractElement(Vec: Val, Idx: K), Idx: CurIdx);
748 }
749 return CurVec;
750 }
751
752 if (Val->getType() != VecEltTy)
753 Val = Builder.CreateBitOrPointerCast(V: Val, DestTy: VecEltTy);
754 return Builder.CreateInsertElement(Vec: GetCurVal(), NewElt: Val, Idx: Index);
755 }
756 case Instruction::Call: {
757 if (auto *MTI = dyn_cast<MemTransferInst>(Val: Inst)) {
758 // For memcpy, we need to know curval.
759 ConstantInt *Length = cast<ConstantInt>(Val: MTI->getLength());
760 unsigned NumCopied = Length->getZExtValue() / ElementSize;
761 MemTransferInfo *TI = &AA.Vector.TransferInfo[MTI];
762 unsigned SrcBegin = TI->SrcIndex->getZExtValue();
763 unsigned DestBegin = TI->DestIndex->getZExtValue();
764
765 SmallVector<int> Mask;
766 for (unsigned Idx = 0; Idx < AA.Vector.Ty->getNumElements(); ++Idx) {
767 if (Idx >= DestBegin && Idx < DestBegin + NumCopied) {
768 Mask.push_back(Elt: SrcBegin < AA.Vector.Ty->getNumElements()
769 ? SrcBegin++
770 : PoisonMaskElem);
771 } else {
772 Mask.push_back(Elt: Idx);
773 }
774 }
775
776 return Builder.CreateShuffleVector(V: GetCurVal(), Mask);
777 }
778
779 if (auto *MSI = dyn_cast<MemSetInst>(Val: Inst)) {
780 // For memset, we don't need to know the previous value because we
781 // currently only allow memsets that cover the whole alloca.
782 Value *Elt = MSI->getOperand(i_nocapture: 1);
783 const unsigned BytesPerElt = DL.getTypeStoreSize(Ty: VecEltTy);
784 if (BytesPerElt > 1) {
785 Value *EltBytes = Builder.CreateVectorSplat(NumElts: BytesPerElt, V: Elt);
786
787 // If the element type of the vector is a pointer, we need to first cast
788 // to an integer, then use a PtrCast.
789 if (VecEltTy->isPointerTy()) {
790 Type *PtrInt = Builder.getIntNTy(N: BytesPerElt * 8);
791 Elt = Builder.CreateBitCast(V: EltBytes, DestTy: PtrInt);
792 Elt = Builder.CreateIntToPtr(V: Elt, DestTy: VecEltTy);
793 } else
794 Elt = Builder.CreateBitCast(V: EltBytes, DestTy: VecEltTy);
795 }
796
797 return Builder.CreateVectorSplat(EC: AA.Vector.Ty->getElementCount(), V: Elt);
798 }
799
800 if (auto *Intr = dyn_cast<IntrinsicInst>(Val: Inst)) {
801 if (Intr->getIntrinsicID() == Intrinsic::objectsize) {
802 Intr->replaceAllUsesWith(
803 V: Builder.getIntN(N: Intr->getType()->getIntegerBitWidth(),
804 C: DL.getTypeAllocSize(Ty: AA.Vector.Ty)));
805 return nullptr;
806 }
807 }
808
809 llvm_unreachable("Unsupported call when promoting alloca to vector");
810 }
811
812 default:
813 llvm_unreachable("Inconsistency in instructions promotable to vector");
814 }
815
816 llvm_unreachable("Did not return after promoting instruction!");
817}
818
819static bool isSupportedAccessType(FixedVectorType *VecTy, Type *AccessTy,
820 const DataLayout &DL) {
821 // Access as a vector type can work if the size of the access vector is a
822 // multiple of the size of the alloca's vector element type.
823 //
824 // Examples:
825 // - VecTy = <8 x float>, AccessTy = <4 x float> -> OK
826 // - VecTy = <4 x double>, AccessTy = <2 x float> -> OK
827 // - VecTy = <4 x double>, AccessTy = <3 x float> -> NOT OK
828 // - 3*32 is not a multiple of 64
829 //
830 // We could handle more complicated cases, but it'd make things a lot more
831 // complicated.
832 if (isa<FixedVectorType>(Val: AccessTy)) {
833 TypeSize AccTS = DL.getTypeStoreSize(Ty: AccessTy);
834 // If the type size and the store size don't match, we would need to do more
835 // than just bitcast to translate between an extracted/insertable subvectors
836 // and the accessed value.
837 if (AccTS * 8 != DL.getTypeSizeInBits(Ty: AccessTy))
838 return false;
839 TypeSize VecTS = DL.getTypeStoreSize(Ty: VecTy->getElementType());
840 return AccTS.isKnownMultipleOf(RHS: VecTS);
841 }
842
843 return CastInst::isBitOrNoopPointerCastable(SrcTy: VecTy->getElementType(), DestTy: AccessTy,
844 DL);
845}
846
847/// Iterates over an instruction worklist that may contain multiple instructions
848/// from the same basic block, but in a different order.
849template <typename InstContainer>
850static void forEachWorkListItem(const InstContainer &WorkList,
851 std::function<void(Instruction *)> Fn) {
852 // Bucket up uses of the alloca by the block they occur in.
853 // This is important because we have to handle multiple defs/uses in a block
854 // ourselves: SSAUpdater is purely for cross-block references.
855 DenseMap<BasicBlock *, SmallDenseSet<Instruction *>> UsesByBlock;
856 for (Instruction *User : WorkList)
857 UsesByBlock[User->getParent()].insert(V: User);
858
859 for (Instruction *User : WorkList) {
860 BasicBlock *BB = User->getParent();
861 auto &BlockUses = UsesByBlock[BB];
862
863 // Already processed, skip.
864 if (BlockUses.empty())
865 continue;
866
867 // Only user in the block, directly process it.
868 if (BlockUses.size() == 1) {
869 Fn(User);
870 continue;
871 }
872
873 // Multiple users in the block, do a linear scan to see users in order.
874 for (Instruction &Inst : *BB) {
875 if (!BlockUses.contains(V: &Inst))
876 continue;
877
878 Fn(&Inst);
879 }
880
881 // Clear the block so we know it's been processed.
882 BlockUses.clear();
883 }
884}
885
886/// Find an insert point after an alloca, after all other allocas clustered at
887/// the start of the block.
888static BasicBlock::iterator skipToNonAllocaInsertPt(BasicBlock &BB,
889 BasicBlock::iterator I) {
890 for (BasicBlock::iterator E = BB.end(); I != E && isa<AllocaInst>(Val: *I); ++I)
891 ;
892 return I;
893}
894
895FixedVectorType *
896AMDGPUPromoteAllocaImpl::getVectorTypeForAlloca(Type *AllocaTy) const {
897 if (DisablePromoteAllocaToVector) {
898 LLVM_DEBUG(dbgs() << " Promote alloca to vectors is disabled\n");
899 return nullptr;
900 }
901
902 auto *VectorTy = dyn_cast<FixedVectorType>(Val: AllocaTy);
903 if (auto *ArrayTy = dyn_cast<ArrayType>(Val: AllocaTy)) {
904 uint64_t NumElems = 1;
905 Type *ElemTy;
906 do {
907 NumElems *= ArrayTy->getNumElements();
908 ElemTy = ArrayTy->getElementType();
909 } while ((ArrayTy = dyn_cast<ArrayType>(Val: ElemTy)));
910
911 // Check for array of vectors
912 auto *InnerVectorTy = dyn_cast<FixedVectorType>(Val: ElemTy);
913 if (InnerVectorTy) {
914 NumElems *= InnerVectorTy->getNumElements();
915 ElemTy = InnerVectorTy->getElementType();
916 }
917
918 if (VectorType::isValidElementType(ElemTy) && NumElems > 0) {
919 unsigned ElementSize = DL.getTypeSizeInBits(Ty: ElemTy) / 8;
920 if (ElementSize > 0) {
921 unsigned AllocaSize = DL.getTypeStoreSize(Ty: AllocaTy);
922 // Expand vector if required to match padding of inner type,
923 // i.e. odd size subvectors.
924 // Storage size of new vector must match that of alloca for correct
925 // behaviour of byte offsets and GEP computation.
926 if (NumElems * ElementSize != AllocaSize)
927 NumElems = AllocaSize / ElementSize;
928 if (NumElems > 0 && (AllocaSize % ElementSize) == 0)
929 VectorTy = FixedVectorType::get(ElementType: ElemTy, NumElts: NumElems);
930 }
931 }
932 }
933 if (!VectorTy) {
934 LLVM_DEBUG(dbgs() << " Cannot convert type to vector\n");
935 return nullptr;
936 }
937
938 const unsigned MaxElements =
939 (MaxVectorRegs * 32) / DL.getTypeSizeInBits(Ty: VectorTy->getElementType());
940
941 if (VectorTy->getNumElements() > MaxElements ||
942 VectorTy->getNumElements() < 2) {
943 LLVM_DEBUG(dbgs() << " " << *VectorTy
944 << " has an unsupported number of elements\n");
945 return nullptr;
946 }
947
948 Type *VecEltTy = VectorTy->getElementType();
949 unsigned ElementSizeInBits = DL.getTypeSizeInBits(Ty: VecEltTy);
950 if (ElementSizeInBits != DL.getTypeAllocSizeInBits(Ty: VecEltTy)) {
951 LLVM_DEBUG(dbgs() << " Cannot convert to vector if the allocation size "
952 "does not match the type's size\n");
953 return nullptr;
954 }
955
956 return VectorTy;
957}
958
959void AMDGPUPromoteAllocaImpl::analyzePromoteToVector(AllocaAnalysis &AA) const {
960 if (AA.HaveSelectOrPHI) {
961 LLVM_DEBUG(dbgs() << " Cannot convert to vector due to select or phi\n");
962 return;
963 }
964
965 Type *AllocaTy = AA.Alloca->getAllocatedType();
966 AA.Vector.Ty = getVectorTypeForAlloca(AllocaTy);
967 if (!AA.Vector.Ty)
968 return;
969
970 const auto RejectUser = [&](Instruction *Inst, Twine Msg) {
971 LLVM_DEBUG(dbgs() << " Cannot promote alloca to vector: " << Msg << "\n"
972 << " " << *Inst << "\n");
973 AA.Vector.Ty = nullptr;
974 };
975
976 Type *VecEltTy = AA.Vector.Ty->getElementType();
977 unsigned ElementSize = DL.getTypeSizeInBits(Ty: VecEltTy) / 8;
978 assert(ElementSize > 0);
979 for (auto *U : AA.Uses) {
980 Instruction *Inst = cast<Instruction>(Val: U->getUser());
981
982 if (Value *Ptr = getLoadStorePointerOperand(V: Inst)) {
983 assert(!isa<StoreInst>(Inst) ||
984 U->getOperandNo() == StoreInst::getPointerOperandIndex());
985
986 Type *AccessTy = getLoadStoreType(I: Inst);
987 if (AccessTy->isAggregateType())
988 return RejectUser(Inst, "unsupported load/store as aggregate");
989 assert(!AccessTy->isAggregateType() || AccessTy->isArrayTy());
990
991 // Check that this is a simple access of a vector element.
992 bool IsSimple = isa<LoadInst>(Val: Inst) ? cast<LoadInst>(Val: Inst)->isSimple()
993 : cast<StoreInst>(Val: Inst)->isSimple();
994 if (!IsSimple)
995 return RejectUser(Inst, "not a simple load or store");
996
997 Ptr = Ptr->stripPointerCasts();
998
999 // Alloca already accessed as vector.
1000 if (Ptr == AA.Alloca &&
1001 DL.getTypeStoreSize(Ty: AA.Alloca->getAllocatedType()) ==
1002 DL.getTypeStoreSize(Ty: AccessTy)) {
1003 AA.Vector.Worklist.push_back(Elt: Inst);
1004 continue;
1005 }
1006
1007 if (!isSupportedAccessType(VecTy: AA.Vector.Ty, AccessTy, DL))
1008 return RejectUser(Inst, "not a supported access type");
1009
1010 AA.Vector.Worklist.push_back(Elt: Inst);
1011 continue;
1012 }
1013
1014 if (auto *GEP = dyn_cast<GetElementPtrInst>(Val: Inst)) {
1015 // If we can't compute a vector index from this GEP, then we can't
1016 // promote this alloca to vector.
1017 auto Index = computeGEPToVectorIndex(GEP, Alloca: AA.Alloca, VecElemTy: VecEltTy, DL);
1018 if (!Index)
1019 return RejectUser(Inst, "cannot compute vector index for GEP");
1020
1021 AA.Vector.GEPVectorIdx[GEP] = std::move(Index.value());
1022 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1023 continue;
1024 }
1025
1026 if (MemSetInst *MSI = dyn_cast<MemSetInst>(Val: Inst);
1027 MSI && isSupportedMemset(I: MSI, AI: AA.Alloca, DL)) {
1028 AA.Vector.Worklist.push_back(Elt: Inst);
1029 continue;
1030 }
1031
1032 if (MemTransferInst *TransferInst = dyn_cast<MemTransferInst>(Val: Inst)) {
1033 if (TransferInst->isVolatile())
1034 return RejectUser(Inst, "mem transfer inst is volatile");
1035
1036 ConstantInt *Len = dyn_cast<ConstantInt>(Val: TransferInst->getLength());
1037 if (!Len || (Len->getZExtValue() % ElementSize))
1038 return RejectUser(Inst, "mem transfer inst length is non-constant or "
1039 "not a multiple of the vector element size");
1040
1041 auto getConstIndexIntoAlloca = [&](Value *Ptr) -> ConstantInt * {
1042 if (Ptr == AA.Alloca)
1043 return ConstantInt::get(Context&: Ptr->getContext(), V: APInt(32, 0));
1044
1045 GetElementPtrInst *GEP = cast<GetElementPtrInst>(Val: Ptr);
1046 const auto &GEPI = AA.Vector.GEPVectorIdx.find(Key: GEP)->second;
1047 if (GEPI.VarIndex)
1048 return nullptr;
1049 if (GEPI.ConstIndex)
1050 return GEPI.ConstIndex;
1051 return ConstantInt::get(Context&: Ptr->getContext(), V: APInt(32, 0));
1052 };
1053
1054 MemTransferInfo *TI =
1055 &AA.Vector.TransferInfo.try_emplace(Key: TransferInst).first->second;
1056 unsigned OpNum = U->getOperandNo();
1057 if (OpNum == 0) {
1058 Value *Dest = TransferInst->getDest();
1059 ConstantInt *Index = getConstIndexIntoAlloca(Dest);
1060 if (!Index)
1061 return RejectUser(Inst, "could not calculate constant dest index");
1062 TI->DestIndex = Index;
1063 } else {
1064 assert(OpNum == 1);
1065 Value *Src = TransferInst->getSource();
1066 ConstantInt *Index = getConstIndexIntoAlloca(Src);
1067 if (!Index)
1068 return RejectUser(Inst, "could not calculate constant src index");
1069 TI->SrcIndex = Index;
1070 }
1071 continue;
1072 }
1073
1074 if (auto *Intr = dyn_cast<IntrinsicInst>(Val: Inst)) {
1075 if (Intr->getIntrinsicID() == Intrinsic::objectsize) {
1076 AA.Vector.Worklist.push_back(Elt: Inst);
1077 continue;
1078 }
1079 }
1080
1081 // Ignore assume-like intrinsics and comparisons used in assumes.
1082 if (isAssumeLikeIntrinsic(I: Inst)) {
1083 if (!Inst->use_empty())
1084 return RejectUser(Inst, "assume-like intrinsic cannot have any users");
1085 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1086 continue;
1087 }
1088
1089 if (isa<ICmpInst>(Val: Inst) && all_of(Range: Inst->users(), P: [](User *U) {
1090 return isAssumeLikeIntrinsic(I: cast<Instruction>(Val: U));
1091 })) {
1092 AA.Vector.UsersToRemove.push_back(Elt: Inst);
1093 continue;
1094 }
1095
1096 return RejectUser(Inst, "unhandled alloca user");
1097 }
1098
1099 // Follow-up check to ensure we've seen both sides of all transfer insts.
1100 for (const auto &Entry : AA.Vector.TransferInfo) {
1101 const MemTransferInfo &TI = Entry.second;
1102 if (!TI.SrcIndex || !TI.DestIndex)
1103 return RejectUser(Entry.first,
1104 "mem transfer inst between different objects");
1105 AA.Vector.Worklist.push_back(Elt: Entry.first);
1106 }
1107}
1108
1109void AMDGPUPromoteAllocaImpl::promoteAllocaToVector(AllocaAnalysis &AA) {
1110 LLVM_DEBUG(dbgs() << "Promoting to vectors: " << *AA.Alloca << '\n');
1111 LLVM_DEBUG(dbgs() << " type conversion: " << *AA.Alloca->getAllocatedType()
1112 << " -> " << *AA.Vector.Ty << '\n');
1113 const unsigned VecStoreSize = DL.getTypeStoreSize(Ty: AA.Vector.Ty);
1114
1115 Type *VecEltTy = AA.Vector.Ty->getElementType();
1116 const unsigned ElementSize = DL.getTypeSizeInBits(Ty: VecEltTy) / 8;
1117
1118 // Alloca is uninitialized memory. Imitate that by making the first value
1119 // undef.
1120 SSAUpdater Updater;
1121 Updater.Initialize(Ty: AA.Vector.Ty, Name: "promotealloca");
1122
1123 BasicBlock *EntryBB = AA.Alloca->getParent();
1124 BasicBlock::iterator InitInsertPos =
1125 skipToNonAllocaInsertPt(BB&: *EntryBB, I: AA.Alloca->getIterator());
1126 IRBuilder<> Builder(&*InitInsertPos);
1127 Value *AllocaInitValue = Builder.CreateFreeze(V: PoisonValue::get(T: AA.Vector.Ty));
1128 AllocaInitValue->takeName(V: AA.Alloca);
1129
1130 Updater.AddAvailableValue(BB: AA.Alloca->getParent(), V: AllocaInitValue);
1131
1132 // First handle the initial worklist, in basic block order.
1133 //
1134 // Insert a placeholder whenever we need the vector value at the top of a
1135 // basic block.
1136 SmallSetVector<Instruction *, 8> Placeholders;
1137 forEachWorkListItem(WorkList: AA.Vector.Worklist, Fn: [&](Instruction *I) {
1138 BasicBlock *BB = I->getParent();
1139 auto GetCurVal = [&]() -> Value * {
1140 if (Value *CurVal = Updater.FindValueForBlock(BB))
1141 return CurVal;
1142
1143 if (!Placeholders.empty() && Placeholders.back()->getParent() == BB)
1144 return Placeholders.back();
1145
1146 // If the current value in the basic block is not yet known, insert a
1147 // placeholder that we will replace later.
1148 IRBuilder<> Builder(I);
1149 auto *Placeholder = cast<Instruction>(Val: Builder.CreateFreeze(
1150 V: PoisonValue::get(T: AA.Vector.Ty), Name: "promotealloca.placeholder"));
1151 Placeholders.insert(X: Placeholder);
1152 return Placeholders.back();
1153 };
1154
1155 Value *Result = promoteAllocaUserToVector(Inst: I, DL, AA, VecStoreSize,
1156 ElementSize, GetCurVal);
1157 // If the returned result is a placeholder, it means the instruction does
1158 // not really modify the alloca. So no need to make it being available value
1159 // to SSAUpdater.
1160 // This will stop placeholder being cached in SSAUpdater. The cached
1161 // placeholder may cause stale pointer being referenced when doing
1162 // placeholder replacement.
1163 if (Result && (!isa<Instruction>(Val: Result) ||
1164 !Placeholders.contains(key: cast<Instruction>(Val: Result))))
1165 Updater.AddAvailableValue(BB, V: Result);
1166 });
1167
1168 // Now fixup the placeholders.
1169 for (Instruction *Placeholder : Placeholders) {
1170 Placeholder->replaceAllUsesWith(
1171 V: Updater.GetValueInMiddleOfBlock(BB: Placeholder->getParent()));
1172 Placeholder->eraseFromParent();
1173 }
1174
1175 // Delete all instructions.
1176 for (Instruction *I : AA.Vector.Worklist) {
1177 assert(I->use_empty());
1178 I->eraseFromParent();
1179 }
1180
1181 // Delete all the users that are known to be removeable.
1182 for (Instruction *I : reverse(C&: AA.Vector.UsersToRemove)) {
1183 I->dropDroppableUses();
1184 assert(I->use_empty());
1185 I->eraseFromParent();
1186 }
1187
1188 // Alloca should now be dead too.
1189 assert(AA.Alloca->use_empty());
1190 AA.Alloca->eraseFromParent();
1191}
1192
1193std::pair<Value *, Value *>
1194AMDGPUPromoteAllocaImpl::getLocalSizeYZ(IRBuilder<> &Builder) {
1195 Function &F = *Builder.GetInsertBlock()->getParent();
1196 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F);
1197
1198 if (!IsAMDHSA) {
1199 CallInst *LocalSizeY = Builder.CreateIntrinsicWithoutFolding(
1200 ID: Intrinsic::r600_read_local_size_y, Args: {});
1201 CallInst *LocalSizeZ = Builder.CreateIntrinsicWithoutFolding(
1202 ID: Intrinsic::r600_read_local_size_z, Args: {});
1203
1204 ST.makeLIDRangeMetadata(I: LocalSizeY);
1205 ST.makeLIDRangeMetadata(I: LocalSizeZ);
1206
1207 return std::pair(LocalSizeY, LocalSizeZ);
1208 }
1209
1210 // We must read the size out of the dispatch pointer.
1211 assert(IsAMDGCN);
1212
1213 // We are indexing into this struct, and want to extract the workgroup_size_*
1214 // fields.
1215 //
1216 // typedef struct hsa_kernel_dispatch_packet_s {
1217 // uint16_t header;
1218 // uint16_t setup;
1219 // uint16_t workgroup_size_x ;
1220 // uint16_t workgroup_size_y;
1221 // uint16_t workgroup_size_z;
1222 // uint16_t reserved0;
1223 // uint32_t grid_size_x ;
1224 // uint32_t grid_size_y ;
1225 // uint32_t grid_size_z;
1226 //
1227 // uint32_t private_segment_size;
1228 // uint32_t group_segment_size;
1229 // uint64_t kernel_object;
1230 //
1231 // #ifdef HSA_LARGE_MODEL
1232 // void *kernarg_address;
1233 // #elif defined HSA_LITTLE_ENDIAN
1234 // void *kernarg_address;
1235 // uint32_t reserved1;
1236 // #else
1237 // uint32_t reserved1;
1238 // void *kernarg_address;
1239 // #endif
1240 // uint64_t reserved2;
1241 // hsa_signal_t completion_signal; // uint64_t wrapper
1242 // } hsa_kernel_dispatch_packet_t
1243 //
1244 CallInst *DispatchPtr =
1245 Builder.CreateIntrinsicWithoutFolding(ID: Intrinsic::amdgcn_dispatch_ptr, Args: {});
1246 DispatchPtr->addRetAttr(Kind: Attribute::NoAlias);
1247 DispatchPtr->addRetAttr(Kind: Attribute::NonNull);
1248 F.removeFnAttr(Kind: "amdgpu-no-dispatch-ptr");
1249
1250 // Size of the dispatch packet struct.
1251 DispatchPtr->addDereferenceableRetAttr(Bytes: 64);
1252
1253 Type *I32Ty = Type::getInt32Ty(C&: Mod.getContext());
1254
1255 // We could do a single 64-bit load here, but it's likely that the basic
1256 // 32-bit and extract sequence is already present, and it is probably easier
1257 // to CSE this. The loads should be mergeable later anyway.
1258 Value *GEPXY = Builder.CreateConstInBoundsGEP1_64(Ty: I32Ty, Ptr: DispatchPtr, Idx0: 1);
1259 LoadInst *LoadXY = Builder.CreateAlignedLoad(Ty: I32Ty, Ptr: GEPXY, Align: Align(4));
1260
1261 Value *GEPZU = Builder.CreateConstInBoundsGEP1_64(Ty: I32Ty, Ptr: DispatchPtr, Idx0: 2);
1262 LoadInst *LoadZU = Builder.CreateAlignedLoad(Ty: I32Ty, Ptr: GEPZU, Align: Align(4));
1263
1264 MDNode *MD = MDNode::get(Context&: Mod.getContext(), MDs: {});
1265 LoadXY->setMetadata(KindID: LLVMContext::MD_invariant_load, Node: MD);
1266 LoadZU->setMetadata(KindID: LLVMContext::MD_invariant_load, Node: MD);
1267 ST.makeLIDRangeMetadata(I: LoadZU);
1268
1269 // Extract y component. Upper half of LoadZU should be zero already.
1270 Value *Y = Builder.CreateLShr(LHS: LoadXY, RHS: 16);
1271
1272 return std::pair(Y, LoadZU);
1273}
1274
1275Value *AMDGPUPromoteAllocaImpl::getWorkitemID(IRBuilder<> &Builder,
1276 unsigned N) {
1277 Function *F = Builder.GetInsertBlock()->getParent();
1278 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F: *F);
1279 Intrinsic::ID IntrID = Intrinsic::not_intrinsic;
1280 StringRef AttrName;
1281
1282 switch (N) {
1283 case 0:
1284 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_x
1285 : (Intrinsic::ID)Intrinsic::r600_read_tidig_x;
1286 AttrName = "amdgpu-no-workitem-id-x";
1287 break;
1288 case 1:
1289 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_y
1290 : (Intrinsic::ID)Intrinsic::r600_read_tidig_y;
1291 AttrName = "amdgpu-no-workitem-id-y";
1292 break;
1293
1294 case 2:
1295 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_z
1296 : (Intrinsic::ID)Intrinsic::r600_read_tidig_z;
1297 AttrName = "amdgpu-no-workitem-id-z";
1298 break;
1299 default:
1300 llvm_unreachable("invalid dimension");
1301 }
1302
1303 Function *WorkitemIdFn = Intrinsic::getOrInsertDeclaration(M: &Mod, id: IntrID);
1304 CallInst *CI = Builder.CreateCall(Callee: WorkitemIdFn);
1305 ST.makeLIDRangeMetadata(I: CI);
1306 F->removeFnAttr(Kind: AttrName);
1307
1308 return CI;
1309}
1310
1311static bool isCallPromotable(CallInst *CI) {
1312 IntrinsicInst *II = dyn_cast<IntrinsicInst>(Val: CI);
1313 if (!II)
1314 return false;
1315
1316 switch (II->getIntrinsicID()) {
1317 case Intrinsic::memcpy:
1318 case Intrinsic::memmove:
1319 case Intrinsic::memset:
1320 case Intrinsic::lifetime_start:
1321 case Intrinsic::lifetime_end:
1322 case Intrinsic::invariant_start:
1323 case Intrinsic::invariant_end:
1324 case Intrinsic::launder_invariant_group:
1325 case Intrinsic::strip_invariant_group:
1326 case Intrinsic::objectsize:
1327 return true;
1328 default:
1329 return false;
1330 }
1331}
1332
1333bool AMDGPUPromoteAllocaImpl::binaryOpIsDerivedFromSameAlloca(
1334 Value *BaseAlloca, Value *Val, Instruction *Inst, int OpIdx0,
1335 int OpIdx1) const {
1336 // Figure out which operand is the one we might not be promoting.
1337 Value *OtherOp = Inst->getOperand(i: OpIdx0);
1338 if (Val == OtherOp)
1339 OtherOp = Inst->getOperand(i: OpIdx1);
1340
1341 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: OtherOp))
1342 return true;
1343
1344 // TODO: getUnderlyingObject will not work on a vector getelementptr
1345 Value *OtherObj = getUnderlyingObject(V: OtherOp);
1346 if (!isa<AllocaInst>(Val: OtherObj))
1347 return false;
1348
1349 // TODO: We should be able to replace undefs with the right pointer type.
1350
1351 // TODO: If we know the other base object is another promotable
1352 // alloca, not necessarily this alloca, we can do this. The
1353 // important part is both must have the same address space at
1354 // the end.
1355 if (OtherObj != BaseAlloca) {
1356 LLVM_DEBUG(
1357 dbgs() << "Found a binary instruction with another alloca object\n");
1358 return false;
1359 }
1360
1361 return true;
1362}
1363
1364void AMDGPUPromoteAllocaImpl::analyzePromoteToLDS(AllocaAnalysis &AA) const {
1365 if (DisablePromoteAllocaToLDS) {
1366 LLVM_DEBUG(dbgs() << " Promote alloca to LDS is disabled\n");
1367 return;
1368 }
1369
1370 // Don't promote the alloca to LDS for shader calling conventions as the work
1371 // item ID intrinsics are not supported for these calling conventions.
1372 // Furthermore not all LDS is available for some of the stages.
1373 const Function &ContainingFunction = *AA.Alloca->getFunction();
1374 CallingConv::ID CC = ContainingFunction.getCallingConv();
1375
1376 switch (CC) {
1377 case CallingConv::AMDGPU_KERNEL:
1378 case CallingConv::SPIR_KERNEL:
1379 break;
1380 default:
1381 LLVM_DEBUG(
1382 dbgs()
1383 << " promote alloca to LDS not supported with calling convention.\n");
1384 return;
1385 }
1386
1387 for (Use *Use : AA.Uses) {
1388 auto *User = Use->getUser();
1389
1390 if (CallInst *CI = dyn_cast<CallInst>(Val: User)) {
1391 if (!isCallPromotable(CI))
1392 return;
1393
1394 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1395 AA.LDS.Worklist.push_back(Elt: User);
1396 continue;
1397 }
1398
1399 Instruction *UseInst = cast<Instruction>(Val: User);
1400 if (UseInst->getOpcode() == Instruction::PtrToInt)
1401 return;
1402
1403 if (LoadInst *LI = dyn_cast<LoadInst>(Val: UseInst)) {
1404 if (LI->isVolatile())
1405 return;
1406 continue;
1407 }
1408
1409 if (StoreInst *SI = dyn_cast<StoreInst>(Val: UseInst)) {
1410 if (SI->isVolatile())
1411 return;
1412 continue;
1413 }
1414
1415 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Val: UseInst)) {
1416 if (RMW->isVolatile())
1417 return;
1418 continue;
1419 }
1420
1421 if (AtomicCmpXchgInst *CAS = dyn_cast<AtomicCmpXchgInst>(Val: UseInst)) {
1422 if (CAS->isVolatile())
1423 return;
1424 continue;
1425 }
1426
1427 // Only promote a select if we know that the other select operand
1428 // is from another pointer that will also be promoted.
1429 if (ICmpInst *ICmp = dyn_cast<ICmpInst>(Val: UseInst)) {
1430 if (!binaryOpIsDerivedFromSameAlloca(BaseAlloca: AA.Alloca, Val: Use->get(), Inst: ICmp, OpIdx0: 0, OpIdx1: 1))
1431 return;
1432
1433 // May need to rewrite constant operands.
1434 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1435 AA.LDS.Worklist.push_back(Elt: ICmp);
1436 continue;
1437 }
1438
1439 if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Val: UseInst)) {
1440 // Be conservative if an address could be computed outside the bounds of
1441 // the alloca.
1442 if (!GEP->isInBounds())
1443 return;
1444 } else if (!isa<ExtractElementInst, SelectInst, PHINode>(Val: User)) {
1445 // Do not promote vector/aggregate type instructions. It is hard to track
1446 // their users.
1447
1448 // Do not promote addrspacecast.
1449 //
1450 // TODO: If we know the address is only observed through flat pointers, we
1451 // could still promote.
1452 return;
1453 }
1454
1455 if (find(Range&: AA.LDS.Worklist, Val: User) == AA.LDS.Worklist.end())
1456 AA.LDS.Worklist.push_back(Elt: User);
1457 }
1458
1459 AA.LDS.Enable = true;
1460}
1461
1462bool AMDGPUPromoteAllocaImpl::hasSufficientLocalMem(const Function &F) {
1463
1464 FunctionType *FTy = F.getFunctionType();
1465 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F);
1466
1467 // If the function has any arguments in the local address space, then it's
1468 // possible these arguments require the entire local memory space, so
1469 // we cannot use local memory in the pass.
1470 for (Type *ParamTy : FTy->params()) {
1471 PointerType *PtrTy = dyn_cast<PointerType>(Val: ParamTy);
1472 if (PtrTy && PtrTy->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS) {
1473 LocalMemLimit = 0;
1474 LLVM_DEBUG(dbgs() << "Function has local memory argument. Promoting to "
1475 "local memory disabled.\n");
1476 return false;
1477 }
1478 }
1479
1480 LocalMemLimit = ST.getAddressableLocalMemorySize();
1481 if (LocalMemLimit == 0)
1482 return false;
1483
1484 SmallVector<const Constant *, 16> Stack;
1485 SmallPtrSet<const Constant *, 8> VisitedConstants;
1486 SmallPtrSet<const GlobalVariable *, 8> UsedLDS;
1487
1488 auto visitUsers = [&](const GlobalVariable *GV, const Constant *Val) -> bool {
1489 for (const User *U : Val->users()) {
1490 if (const Instruction *Use = dyn_cast<Instruction>(Val: U)) {
1491 if (Use->getFunction() == &F)
1492 return true;
1493 } else {
1494 const Constant *C = cast<Constant>(Val: U);
1495 if (VisitedConstants.insert(Ptr: C).second)
1496 Stack.push_back(Elt: C);
1497 }
1498 }
1499
1500 return false;
1501 };
1502
1503 for (GlobalVariable &GV : Mod.globals()) {
1504 if (GV.getAddressSpace() != AMDGPUAS::LOCAL_ADDRESS)
1505 continue;
1506
1507 if (visitUsers(&GV, &GV)) {
1508 UsedLDS.insert(Ptr: &GV);
1509 Stack.clear();
1510 continue;
1511 }
1512
1513 // For any ConstantExpr uses, we need to recursively search the users until
1514 // we see a function.
1515 while (!Stack.empty()) {
1516 const Constant *C = Stack.pop_back_val();
1517 if (visitUsers(&GV, C)) {
1518 UsedLDS.insert(Ptr: &GV);
1519 Stack.clear();
1520 break;
1521 }
1522 }
1523 }
1524
1525 SmallVector<std::pair<uint64_t, Align>, 16> AllocatedSizes;
1526 AllocatedSizes.reserve(N: UsedLDS.size());
1527
1528 for (const GlobalVariable *GV : UsedLDS) {
1529 Align Alignment =
1530 DL.getValueOrABITypeAlignment(Alignment: GV->getAlign(), Ty: GV->getValueType());
1531 uint64_t AllocSize = GV->getGlobalSize(DL);
1532
1533 // HIP uses an extern unsized array in local address space for dynamically
1534 // allocated shared memory. In that case, we have to disable the promotion.
1535 if (GV->hasExternalLinkage() && AllocSize == 0) {
1536 LocalMemLimit = 0;
1537 LLVM_DEBUG(dbgs() << "Function has a reference to externally allocated "
1538 "local memory. Promoting to local memory "
1539 "disabled.\n");
1540 return false;
1541 }
1542
1543 AllocatedSizes.emplace_back(Args&: AllocSize, Args&: Alignment);
1544 }
1545
1546 // Sort to try to estimate the worst case alignment padding
1547 //
1548 // FIXME: We should really do something to fix the addresses to a more optimal
1549 // value instead
1550 llvm::sort(C&: AllocatedSizes, Comp: llvm::less_second());
1551
1552 // Check how much local memory is being used by global objects
1553 CurrentLocalMemUsage = 0;
1554
1555 // FIXME: Try to account for padding here. The real padding and address is
1556 // currently determined from the inverse order of uses in the function when
1557 // legalizing, which could also potentially change. We try to estimate the
1558 // worst case here, but we probably should fix the addresses earlier.
1559 for (auto Alloc : AllocatedSizes) {
1560 CurrentLocalMemUsage = alignTo(Size: CurrentLocalMemUsage, A: Alloc.second);
1561 CurrentLocalMemUsage += Alloc.first;
1562 }
1563
1564 unsigned MaxOccupancy =
1565 ST.getWavesPerEU(FlatWorkGroupSizes: ST.getFlatWorkGroupSizes(F), LDSBytes: CurrentLocalMemUsage, F)
1566 .second;
1567
1568 // Round up to the next tier of usage.
1569 unsigned MaxSizeWithWaveCount =
1570 ST.getMaxLocalMemSizeWithWaveCount(WaveCount: MaxOccupancy, F);
1571
1572 // Program may already use more LDS than is usable at maximum occupancy.
1573 if (CurrentLocalMemUsage > MaxSizeWithWaveCount)
1574 return false;
1575
1576 LocalMemLimit = MaxSizeWithWaveCount;
1577
1578 LLVM_DEBUG(dbgs() << F.getName() << " uses " << CurrentLocalMemUsage
1579 << " bytes of LDS\n"
1580 << " Rounding size to " << MaxSizeWithWaveCount
1581 << " with a maximum occupancy of " << MaxOccupancy << '\n'
1582 << " and " << (LocalMemLimit - CurrentLocalMemUsage)
1583 << " available for promotion\n");
1584
1585 return true;
1586}
1587
1588// FIXME: Should try to pick the most likely to be profitable allocas first.
1589bool AMDGPUPromoteAllocaImpl::tryPromoteAllocaToLDS(
1590 AllocaAnalysis &AA, bool SufficientLDS,
1591 SetVector<IntrinsicInst *> &DeferredIntrs) {
1592 LLVM_DEBUG(dbgs() << "Trying to promote to LDS: " << *AA.Alloca << '\n');
1593
1594 // Not likely to have sufficient local memory for promotion.
1595 if (!SufficientLDS)
1596 return false;
1597
1598 IRBuilder<> Builder(AA.Alloca);
1599
1600 const Function &ContainingFunction = *AA.Alloca->getParent()->getParent();
1601 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F: ContainingFunction);
1602 unsigned WorkGroupSize = ST.getFlatWorkGroupSizes(F: ContainingFunction).second;
1603
1604 Align Alignment = AA.Alloca->getAlign();
1605
1606 // FIXME: This computed padding is likely wrong since it depends on inverse
1607 // usage order.
1608 //
1609 // FIXME: It is also possible that if we're allowed to use all of the memory
1610 // could end up using more than the maximum due to alignment padding.
1611
1612 uint32_t NewSize = alignTo(Size: CurrentLocalMemUsage, A: Alignment);
1613 std::optional<TypeSize> ElemSize = AA.Alloca->getAllocationSize(DL);
1614 if (!ElemSize || ElemSize->isScalable())
1615 return false;
1616 TypeSize AllocSize = WorkGroupSize * *ElemSize;
1617 NewSize += AllocSize.getFixedValue();
1618
1619 if (NewSize > LocalMemLimit) {
1620 LLVM_DEBUG(dbgs() << " " << AllocSize
1621 << " bytes of local memory not available to promote\n");
1622 return false;
1623 }
1624
1625 CurrentLocalMemUsage = NewSize;
1626
1627 LLVM_DEBUG(dbgs() << "Promoting alloca to local memory\n");
1628
1629 Function *F = AA.Alloca->getFunction();
1630
1631 Type *GVTy = ArrayType::get(ElementType: AA.Alloca->getAllocatedType(), NumElements: WorkGroupSize);
1632 GlobalVariable *GV = new GlobalVariable(
1633 Mod, GVTy, false, GlobalValue::InternalLinkage, PoisonValue::get(T: GVTy),
1634 Twine(F->getName()) + Twine('.') + AA.Alloca->getName(), nullptr,
1635 GlobalVariable::NotThreadLocal, AMDGPUAS::LOCAL_ADDRESS);
1636 GV->setUnnamedAddr(GlobalValue::UnnamedAddr::Global);
1637 GV->setAlignment(AA.Alloca->getAlign());
1638
1639 Value *TCntY, *TCntZ;
1640
1641 std::tie(args&: TCntY, args&: TCntZ) = getLocalSizeYZ(Builder);
1642 Value *TIdX = getWorkitemID(Builder, N: 0);
1643 Value *TIdY = getWorkitemID(Builder, N: 1);
1644 Value *TIdZ = getWorkitemID(Builder, N: 2);
1645
1646 Value *Tmp0 = Builder.CreateMul(LHS: TCntY, RHS: TCntZ, Name: "", HasNUW: true, HasNSW: true);
1647 Tmp0 = Builder.CreateMul(LHS: Tmp0, RHS: TIdX);
1648 Value *Tmp1 = Builder.CreateMul(LHS: TIdY, RHS: TCntZ, Name: "", HasNUW: true, HasNSW: true);
1649 Value *TID = Builder.CreateAdd(LHS: Tmp0, RHS: Tmp1);
1650 TID = Builder.CreateAdd(LHS: TID, RHS: TIdZ);
1651
1652 LLVMContext &Context = Mod.getContext();
1653 Value *Indices[] = {Constant::getNullValue(Ty: Type::getInt32Ty(C&: Context)), TID};
1654
1655 Value *Offset = Builder.CreateInBoundsGEP(Ty: GVTy, Ptr: GV, IdxList: Indices);
1656 AA.Alloca->mutateType(Ty: Offset->getType());
1657 AA.Alloca->replaceAllUsesWith(V: Offset);
1658 AA.Alloca->eraseFromParent();
1659
1660 PointerType *NewPtrTy = PointerType::get(C&: Context, AddressSpace: AMDGPUAS::LOCAL_ADDRESS);
1661
1662 for (Value *V : AA.LDS.Worklist) {
1663 CallInst *Call = dyn_cast<CallInst>(Val: V);
1664 if (!Call) {
1665 if (ICmpInst *CI = dyn_cast<ICmpInst>(Val: V)) {
1666 Value *LHS = CI->getOperand(i_nocapture: 0);
1667 Value *RHS = CI->getOperand(i_nocapture: 1);
1668
1669 Type *NewTy = LHS->getType()->getWithNewType(EltTy: NewPtrTy);
1670 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: LHS))
1671 CI->setOperand(i_nocapture: 0, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1672
1673 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: RHS))
1674 CI->setOperand(i_nocapture: 1, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1675
1676 continue;
1677 }
1678
1679 // The operand's value should be corrected on its own and we don't want to
1680 // touch the users.
1681 if (isa<AddrSpaceCastInst>(Val: V))
1682 continue;
1683
1684 assert(V->getType()->isPtrOrPtrVectorTy());
1685
1686 Type *NewTy = V->getType()->getWithNewType(EltTy: NewPtrTy);
1687 V->mutateType(Ty: NewTy);
1688
1689 // Adjust the types of any constant operands.
1690 if (SelectInst *SI = dyn_cast<SelectInst>(Val: V)) {
1691 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: SI->getOperand(i_nocapture: 1)))
1692 SI->setOperand(i_nocapture: 1, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1693
1694 if (isa<ConstantPointerNull, ConstantAggregateZero>(Val: SI->getOperand(i_nocapture: 2)))
1695 SI->setOperand(i_nocapture: 2, Val_nocapture: Constant::getNullValue(Ty: NewTy));
1696 } else if (PHINode *Phi = dyn_cast<PHINode>(Val: V)) {
1697 for (unsigned I = 0, E = Phi->getNumIncomingValues(); I != E; ++I) {
1698 if (isa<ConstantPointerNull, ConstantAggregateZero>(
1699 Val: Phi->getIncomingValue(i: I)))
1700 Phi->setIncomingValue(i: I, V: Constant::getNullValue(Ty: NewTy));
1701 }
1702 }
1703
1704 continue;
1705 }
1706
1707 IntrinsicInst *Intr = cast<IntrinsicInst>(Val: Call);
1708 Builder.SetInsertPoint(Intr);
1709 switch (Intr->getIntrinsicID()) {
1710 case Intrinsic::lifetime_start:
1711 case Intrinsic::lifetime_end:
1712 // These intrinsics are for address space 0 only
1713 Intr->eraseFromParent();
1714 continue;
1715 case Intrinsic::memcpy:
1716 case Intrinsic::memmove:
1717 // These have 2 pointer operands. In case if second pointer also needs
1718 // to be replaced we defer processing of these intrinsics until all
1719 // other values are processed.
1720 DeferredIntrs.insert(X: Intr);
1721 continue;
1722 case Intrinsic::memset: {
1723 MemSetInst *MemSet = cast<MemSetInst>(Val: Intr);
1724 Builder.CreateMemSet(Ptr: MemSet->getRawDest(), Val: MemSet->getValue(),
1725 Size: MemSet->getLength(), Align: MemSet->getDestAlign(),
1726 isVolatile: MemSet->isVolatile());
1727 Intr->eraseFromParent();
1728 continue;
1729 }
1730 case Intrinsic::invariant_start:
1731 case Intrinsic::invariant_end:
1732 case Intrinsic::launder_invariant_group:
1733 case Intrinsic::strip_invariant_group: {
1734 assert(Intr->getArgOperand(Intr->arg_size() - 1)->getType() == NewPtrTy &&
1735 "pointer operand should already have been promoted");
1736 Function *NewF = Intrinsic::getOrInsertDeclaration(
1737 M: Intr->getModule(), id: Intr->getIntrinsicID(), OverloadTys: NewPtrTy);
1738 Intr->mutateType(Ty: NewF->getReturnType());
1739 Intr->setCalledFunction(NewF);
1740 continue;
1741 }
1742 case Intrinsic::objectsize: {
1743 Value *Src = Intr->getOperand(i_nocapture: 0);
1744
1745 Value *NewCall = Builder.CreateIntrinsic(
1746 ID: Intrinsic::objectsize,
1747 OverloadTypes: {Intr->getType(), PointerType::get(C&: Context, AddressSpace: AMDGPUAS::LOCAL_ADDRESS)},
1748 Args: {Src, Intr->getOperand(i_nocapture: 1), Intr->getOperand(i_nocapture: 2), Intr->getOperand(i_nocapture: 3)});
1749 Intr->replaceAllUsesWith(V: NewCall);
1750 Intr->eraseFromParent();
1751 continue;
1752 }
1753 default:
1754 Intr->print(O&: errs());
1755 llvm_unreachable("Don't know how to promote alloca intrinsic use.");
1756 }
1757 }
1758
1759 return true;
1760}
1761
1762void AMDGPUPromoteAllocaImpl::finishDeferredAllocaToLDSPromotion(
1763 SetVector<IntrinsicInst *> &DeferredIntrs) {
1764
1765 for (IntrinsicInst *Intr : DeferredIntrs) {
1766 IRBuilder<> Builder(Intr);
1767 Builder.SetInsertPoint(Intr);
1768 Intrinsic::ID ID = Intr->getIntrinsicID();
1769 assert(ID == Intrinsic::memcpy || ID == Intrinsic::memmove);
1770
1771 MemTransferInst *MI = cast<MemTransferInst>(Val: Intr);
1772 auto *B = Builder.CreateMemTransferInst(
1773 IntrID: ID, Dst: MI->getRawDest(), DstAlign: MI->getDestAlign(), Src: MI->getRawSource(),
1774 SrcAlign: MI->getSourceAlign(), Size: MI->getLength(), isVolatile: MI->isVolatile());
1775
1776 for (unsigned I = 0; I != 2; ++I) {
1777 if (uint64_t Bytes = Intr->getParamDereferenceableBytes(i: I)) {
1778 B->addDereferenceableParamAttr(i: I, Bytes);
1779 }
1780 }
1781
1782 Intr->eraseFromParent();
1783 }
1784}
1785