1//===- ThumbRegisterInfo.h - Thumb Register Information Impl -*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Thumb implementation of the TargetRegisterInfo
10// class. With the exception of emitLoadConstPool Thumb2 tracks
11// ARMBaseRegisterInfo, Thumb1 overloads the functions below.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
16#define LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
17
18#include "ARMBaseRegisterInfo.h"
19#include "llvm/CodeGen/TargetRegisterInfo.h"
20
21namespace llvm {
22 class ARMSubtarget;
23 class ARMBaseInstrInfo;
24
25struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
26private:
27 const bool IsThumb1Only;
28
29public:
30 explicit ThumbRegisterInfo(const ARMSubtarget &STI);
31
32 const TargetRegisterClass *
33 getLargestLegalSuperClass(const TargetRegisterClass *RC,
34 const MachineFunction &MF) const override;
35
36 const TargetRegisterClass *
37 getPointerRegClass(unsigned Kind = 0) const override;
38
39 /// emitLoadConstPool - Emits a load from constpool to materialize the
40 /// specified immediate.
41 void
42 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
43 const DebugLoc &dl, Register DestReg, unsigned SubIdx,
44 int Val, ARMCC::CondCodes Pred = ARMCC::AL,
45 Register PredReg = Register(),
46 unsigned MIFlags = MachineInstr::NoFlags) const override;
47
48 // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
49 // however much remains to be handled. Return 'true' if no further
50 // work is required.
51 bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
52 Register FrameReg, int &Offset,
53 const ARMBaseInstrInfo &TII) const;
54 void resolveFrameIndex(MachineInstr &MI, Register BaseReg,
55 int64_t Offset) const override;
56 bool eliminateFrameIndex(MachineBasicBlock::iterator II,
57 int SPAdj, unsigned FIOperandNum,
58 RegScavenger *RS = nullptr) const override;
59 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
60};
61}
62
63#endif
64