1//===- MipsSetMachineRegisterFlags.cpp - Set Machine Register Flags -------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass sets machine register flags for MIPS backend.
10//
11//===----------------------------------------------------------------------===//
12
13#include "Mips.h"
14#include "MipsInstrInfo.h"
15#include "MipsSubtarget.h"
16#include "llvm/CodeGen/MachineBasicBlock.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineFunctionPass.h"
19#include "llvm/CodeGen/MachineInstr.h"
20#include "llvm/CodeGen/MachineRegisterInfo.h"
21#include "llvm/Support/Debug.h"
22
23#define DEBUG_TYPE "mips-set-machine-register-flags"
24
25using namespace llvm;
26
27namespace {
28
29class MipsSetMachineRegisterFlags : public MachineFunctionPass {
30public:
31 MipsSetMachineRegisterFlags() : MachineFunctionPass(ID) {}
32
33 StringRef getPassName() const override {
34 return "Mips Set Machine Register Flags";
35 }
36
37 bool runOnMachineFunction(MachineFunction &MF) override;
38
39 static char ID;
40
41private:
42 bool processBasicBlock(MachineBasicBlock &MBB, const MipsInstrInfo &MipsII,
43 const MachineRegisterInfo &RegInfo);
44};
45
46} // namespace
47
48INITIALIZE_PASS(MipsSetMachineRegisterFlags, DEBUG_TYPE,
49 "Mips Set Machine Register Flags", false, false)
50
51char MipsSetMachineRegisterFlags::ID = 0;
52
53bool MipsSetMachineRegisterFlags::runOnMachineFunction(MachineFunction &MF) {
54 const MipsInstrInfo &MipsII =
55 *static_cast<const MipsInstrInfo *>(MF.getSubtarget().getInstrInfo());
56 const MachineRegisterInfo &RegInfo = MF.getRegInfo();
57
58 bool Modified = false;
59
60 for (auto &MBB : MF)
61 Modified |= processBasicBlock(MBB, MipsII, RegInfo);
62
63 return Modified;
64}
65
66bool MipsSetMachineRegisterFlags::processBasicBlock(
67 MachineBasicBlock &MBB, const MipsInstrInfo &MipsII,
68 const MachineRegisterInfo &RegInfo) {
69 bool Modified = false;
70
71 // Iterate through the instructions in the basic block
72 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); MII != E;
73 ++MII) {
74 MachineInstr &MI = *MII;
75
76 LLVM_DEBUG(dbgs() << "Processing instruction: " << MI << "\n");
77
78 unsigned Opcode = MI.getOpcode();
79 if (Opcode >= Mips::CMP_AF_D_MMR6 && Opcode <= Mips::CMP_UN_S_MMR6) {
80 MachineOperand &DestOperand = MI.getOperand(i: 0);
81 assert(DestOperand.isReg());
82 Register Dest = DestOperand.getReg();
83 if (Dest.isVirtual() &&
84 RegInfo.getRegClassOrNull(Reg: Dest) == &Mips::FGR64CCRegClass) {
85 MI.setFlag(MachineInstr::MIFlag::NoSWrap);
86 }
87 } else if (Opcode == Mips::COPY) {
88 MachineOperand &SrcOperand = MI.getOperand(i: 1);
89 assert(SrcOperand.isReg());
90 Register Src = SrcOperand.getReg();
91 if (Src.isVirtual() &&
92 RegInfo.getRegClassOrNull(Reg: Src) == &Mips::FGR64CCRegClass) {
93 MI.setFlag(MachineInstr::MIFlag::NoSWrap);
94 }
95 } else if (Opcode == Mips::INSERT_SUBREG) {
96 MachineOperand &SrcOperand = MI.getOperand(i: 2);
97 assert(SrcOperand.isReg());
98 Register Src = SrcOperand.getReg();
99 if (Src.isVirtual() &&
100 RegInfo.getRegClassOrNull(Reg: Src) == &Mips::FGR64CCRegClass) {
101 MI.setFlag(MachineInstr::MIFlag::NoSWrap);
102 }
103 }
104 }
105
106 return Modified;
107}
108
109FunctionPass *llvm::createMipsSetMachineRegisterFlagsPass() {
110 return new MipsSetMachineRegisterFlags();
111}
112