1//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to PowerPC assembly language. This printer is
11// the output mechanism used by `llc'.
12//
13// Documentation at http://developer.apple.com/documentation/DeveloperTools/
14// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
15//
16//===----------------------------------------------------------------------===//
17
18#include "MCTargetDesc/PPCInstPrinter.h"
19#include "MCTargetDesc/PPCMCAsmInfo.h"
20#include "MCTargetDesc/PPCMCTargetDesc.h"
21#include "MCTargetDesc/PPCPredicates.h"
22#include "MCTargetDesc/PPCTargetStreamer.h"
23#include "PPC.h"
24#include "PPCInstrInfo.h"
25#include "PPCMachineFunctionInfo.h"
26#include "PPCSubtarget.h"
27#include "PPCTargetMachine.h"
28#include "TargetInfo/PowerPCTargetInfo.h"
29#include "llvm/ADT/MapVector.h"
30#include "llvm/ADT/SetVector.h"
31#include "llvm/ADT/Statistic.h"
32#include "llvm/ADT/StringExtras.h"
33#include "llvm/ADT/StringRef.h"
34#include "llvm/ADT/Twine.h"
35#include "llvm/BinaryFormat/ELF.h"
36#include "llvm/CodeGen/AsmPrinter.h"
37#include "llvm/CodeGen/MachineBasicBlock.h"
38#include "llvm/CodeGen/MachineFrameInfo.h"
39#include "llvm/CodeGen/MachineFunction.h"
40#include "llvm/CodeGen/MachineInstr.h"
41#include "llvm/CodeGen/MachineModuleInfoImpls.h"
42#include "llvm/CodeGen/MachineOperand.h"
43#include "llvm/CodeGen/MachineRegisterInfo.h"
44#include "llvm/CodeGen/StackMaps.h"
45#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
46#include "llvm/IR/DataLayout.h"
47#include "llvm/IR/GlobalValue.h"
48#include "llvm/IR/GlobalVariable.h"
49#include "llvm/IR/Module.h"
50#include "llvm/IR/PatternMatch.h"
51#include "llvm/MC/MCAsmInfo.h"
52#include "llvm/MC/MCContext.h"
53#include "llvm/MC/MCDirectives.h"
54#include "llvm/MC/MCExpr.h"
55#include "llvm/MC/MCInst.h"
56#include "llvm/MC/MCInstBuilder.h"
57#include "llvm/MC/MCSectionELF.h"
58#include "llvm/MC/MCSectionXCOFF.h"
59#include "llvm/MC/MCStreamer.h"
60#include "llvm/MC/MCSymbol.h"
61#include "llvm/MC/MCSymbolELF.h"
62#include "llvm/MC/MCSymbolXCOFF.h"
63#include "llvm/MC/SectionKind.h"
64#include "llvm/MC/TargetRegistry.h"
65#include "llvm/Support/Casting.h"
66#include "llvm/Support/CodeGen.h"
67#include "llvm/Support/Compiler.h"
68#include "llvm/Support/Debug.h"
69#include "llvm/Support/Error.h"
70#include "llvm/Support/ErrorHandling.h"
71#include "llvm/Support/MathExtras.h"
72#include "llvm/Support/Process.h"
73#include "llvm/Support/Threading.h"
74#include "llvm/Support/raw_ostream.h"
75#include "llvm/Target/TargetMachine.h"
76#include "llvm/TargetParser/PPCTargetParser.h"
77#include "llvm/TargetParser/Triple.h"
78#include "llvm/Transforms/Utils/ModuleUtils.h"
79#include <cassert>
80#include <cstdint>
81#include <memory>
82#include <new>
83
84using namespace llvm;
85using namespace llvm::XCOFF;
86using namespace PatternMatch;
87
88#define DEBUG_TYPE "asmprinter"
89
90STATISTIC(NumTOCEntries, "Number of Total TOC Entries Emitted.");
91STATISTIC(NumTOCConstPool, "Number of Constant Pool TOC Entries.");
92STATISTIC(NumTOCGlobalInternal,
93 "Number of Internal Linkage Global TOC Entries.");
94STATISTIC(NumTOCGlobalExternal,
95 "Number of External Linkage Global TOC Entries.");
96STATISTIC(NumTOCJumpTable, "Number of Jump Table TOC Entries.");
97STATISTIC(NumTOCThreadLocal, "Number of Thread Local TOC Entries.");
98STATISTIC(NumTOCBlockAddress, "Number of Block Address TOC Entries.");
99STATISTIC(NumTOCEHBlock, "Number of EH Block TOC Entries.");
100
101static cl::opt<bool> EnableSSPCanaryBitInTB(
102 "aix-ssp-tb-bit", cl::init(Val: false),
103 cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden);
104
105static cl::opt<bool> IFuncLocalIfProven(
106 "ifunc-local-if-proven", cl::init(Val: false),
107 cl::desc("During ifunc lowering, the compiler assumes the resolver returns "
108 "dso-local functions and bails out if non-local functions are "
109 "detected; this flag flips the assumption: resolver returns "
110 "preemptible functions unless the compiler can prove all paths "
111 "return local functions."),
112 cl::Hidden);
113
114// this flag is used for testing only as it might generate bad code.
115static cl::opt<bool> IFuncWarnInsteadOfError("test-ifunc-warn-noerror",
116 cl::init(Val: false), cl::ReallyHidden);
117
118// Specialize DenseMapInfo to allow
119// std::pair<const MCSymbol *, PPCMCExpr::Specifier> in DenseMap.
120// This specialization is needed here because that type is used as keys in the
121// map representing TOC entries.
122namespace llvm {
123template <>
124struct DenseMapInfo<std::pair<const MCSymbol *, PPCMCExpr::Specifier>> {
125 using TOCKey = std::pair<const MCSymbol *, PPCMCExpr::Specifier>;
126
127 static inline TOCKey getEmptyKey() { return {nullptr, PPC::S_None}; }
128 static inline TOCKey getTombstoneKey() {
129 return {(const MCSymbol *)1, PPC::S_None};
130 }
131 static unsigned getHashValue(const TOCKey &PairVal) {
132 return detail::combineHashValue(
133 a: DenseMapInfo<const MCSymbol *>::getHashValue(PtrVal: PairVal.first),
134 b: DenseMapInfo<int>::getHashValue(Val: PairVal.second));
135 }
136 static bool isEqual(const TOCKey &A, const TOCKey &B) { return A == B; }
137};
138} // end namespace llvm
139
140namespace {
141
142enum {
143 // GNU attribute tags for PowerPC ABI
144 Tag_GNU_Power_ABI_FP = 4,
145 Tag_GNU_Power_ABI_Vector = 8,
146 Tag_GNU_Power_ABI_Struct_Return = 12,
147
148 // GNU attribute values for PowerPC float ABI, as combination of two parts
149 Val_GNU_Power_ABI_NoFloat = 0b00,
150 Val_GNU_Power_ABI_HardFloat_DP = 0b01,
151 Val_GNU_Power_ABI_SoftFloat_DP = 0b10,
152 Val_GNU_Power_ABI_HardFloat_SP = 0b11,
153
154 Val_GNU_Power_ABI_LDBL_IBM128 = 0b0100,
155 Val_GNU_Power_ABI_LDBL_64 = 0b1000,
156 Val_GNU_Power_ABI_LDBL_IEEE128 = 0b1100,
157};
158
159class PPCAsmPrinter : public AsmPrinter {
160protected:
161 // For TLS on AIX, we need to be able to identify TOC entries of specific
162 // specifier so we can add the right relocations when we generate the
163 // entries. So each entry is represented by a pair of MCSymbol and
164 // VariantKind. For example, we need to be able to identify the following
165 // entry as a TLSGD entry so we can add the @m relocation:
166 // .tc .i[TC],i[TL]@m
167 // By default, 0 is used for the specifier.
168 MapVector<std::pair<const MCSymbol *, PPCMCExpr::Specifier>, MCSymbol *> TOC;
169 const PPCSubtarget *Subtarget = nullptr;
170
171 // Keep track of the number of TLS variables and their corresponding
172 // addresses, which is then used for the assembly printing of
173 // non-TOC-based local-exec variables.
174 MapVector<const GlobalValue *, uint64_t> TLSVarsToAddressMapping;
175
176public:
177 explicit PPCAsmPrinter(TargetMachine &TM,
178 std::unique_ptr<MCStreamer> Streamer, char &ID)
179 : AsmPrinter(TM, std::move(Streamer), ID) {}
180
181 StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
182
183 enum TOCEntryType {
184 TOCType_ConstantPool,
185 TOCType_GlobalExternal,
186 TOCType_GlobalInternal,
187 TOCType_JumpTable,
188 TOCType_ThreadLocal,
189 TOCType_BlockAddress,
190 TOCType_EHBlock
191 };
192
193 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym, TOCEntryType Type,
194 PPCMCExpr::Specifier Kind = PPC::S_None);
195
196 bool doInitialization(Module &M) override {
197 if (!TOC.empty())
198 TOC.clear();
199 return AsmPrinter::doInitialization(M);
200 }
201
202 const MCExpr *symbolWithSpecifier(const MCSymbol *S,
203 PPCMCExpr::Specifier Kind);
204 void emitInstruction(const MachineInstr *MI) override;
205
206 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
207 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
208 /// The \p MI would be INLINEASM ONLY.
209 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
210
211 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
212 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
213 const char *ExtraCode, raw_ostream &O) override;
214 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
215 const char *ExtraCode, raw_ostream &O) override;
216
217 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
218 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
219 void emitTlsCall(const MachineInstr *MI, PPCMCExpr::Specifier VK);
220 void EmitAIXTlsCallHelper(const MachineInstr *MI);
221 const MCExpr *getAdjustedFasterLocalExpr(const MachineOperand &MO,
222 int64_t Offset);
223 bool runOnMachineFunction(MachineFunction &MF) override {
224 Subtarget = &MF.getSubtarget<PPCSubtarget>();
225 bool Changed = AsmPrinter::runOnMachineFunction(MF);
226 emitXRayTable();
227 return Changed;
228 }
229};
230
231/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
232class PPCLinuxAsmPrinter : public PPCAsmPrinter {
233public:
234 static char ID;
235
236 explicit PPCLinuxAsmPrinter(TargetMachine &TM,
237 std::unique_ptr<MCStreamer> Streamer)
238 : PPCAsmPrinter(TM, std::move(Streamer), ID) {}
239
240 StringRef getPassName() const override {
241 return "Linux PPC Assembly Printer";
242 }
243
244 void emitGNUAttributes(Module &M);
245
246 void emitStartOfAsmFile(Module &M) override;
247 void emitEndOfAsmFile(Module &) override;
248
249 void emitFunctionEntryLabel() override;
250
251 void emitFunctionBodyStart() override;
252 void emitFunctionBodyEnd() override;
253 void emitInstruction(const MachineInstr *MI) override;
254};
255
256class PPCAIXAsmPrinter : public PPCAsmPrinter {
257private:
258 /// Symbols lowered from ExternalSymbolSDNodes, we will need to emit extern
259 /// linkage for them in AIX.
260 SmallSetVector<MCSymbol *, 8> ExtSymSDNodeSymbols;
261
262 /// A format indicator and unique trailing identifier to form part of the
263 /// sinit/sterm function names.
264 std::string FormatIndicatorAndUniqueModId;
265
266 // Record a list of GlobalAlias associated with a GlobalObject.
267 // This is used for AIX's extra-label-at-definition aliasing strategy.
268 DenseMap<const GlobalObject *, SmallVector<const GlobalAlias *, 1>>
269 GOAliasMap;
270
271 uint16_t getNumberOfVRSaved();
272 void emitTracebackTable();
273
274 SmallVector<const GlobalVariable *, 8> TOCDataGlobalVars;
275
276 void emitGlobalVariableHelper(const GlobalVariable *);
277
278 // Get the offset of an alias based on its AliaseeObject.
279 uint64_t getAliasOffset(const Constant *C);
280
281public:
282 static char ID;
283
284 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
285 : PPCAsmPrinter(TM, std::move(Streamer), ID) {
286 if (MAI->isLittleEndian())
287 report_fatal_error(
288 reason: "cannot create AIX PPC Assembly Printer for a little-endian target");
289 }
290
291 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }
292
293 bool doInitialization(Module &M) override;
294
295 void emitXXStructorList(const DataLayout &DL, const Constant *List,
296 bool IsCtor) override;
297
298 void SetupMachineFunction(MachineFunction &MF) override;
299
300 void emitGlobalVariable(const GlobalVariable *GV) override;
301
302 void emitFunctionDescriptor() override;
303
304 void emitFunctionEntryLabel() override;
305
306 void emitFunctionBodyEnd() override;
307
308 void emitPGORefs(Module &M);
309
310 void emitGCOVRefs();
311
312 void emitEndOfAsmFile(Module &) override;
313
314 void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override;
315
316 void emitInstruction(const MachineInstr *MI) override;
317
318 bool doFinalization(Module &M) override;
319
320 void emitTTypeReference(const GlobalValue *GV, unsigned Encoding) override;
321
322 void emitModuleCommandLines(Module &M) override;
323
324 void emitRefMetadata(const GlobalObject *);
325
326 void emitGlobalIFunc(Module &M, const GlobalIFunc &GI) override;
327};
328
329} // end anonymous namespace
330
331void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
332 raw_ostream &O) {
333 // Computing the address of a global symbol, not calling it.
334 const GlobalValue *GV = MO.getGlobal();
335 getSymbol(GV)->print(OS&: O, MAI);
336 printOffset(Offset: MO.getOffset(), OS&: O);
337}
338
339void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
340 raw_ostream &O) {
341 const DataLayout &DL = getDataLayout();
342 const MachineOperand &MO = MI->getOperand(i: OpNo);
343
344 switch (MO.getType()) {
345 case MachineOperand::MO_Register: {
346 // The MI is INLINEASM ONLY and UseVSXReg is always false.
347 const char *RegName = PPCInstPrinter::getRegisterName(Reg: MO.getReg());
348
349 // Linux assembler (Others?) does not take register mnemonics.
350 // FIXME - What about special registers used in mfspr/mtspr?
351 O << PPC::stripRegisterPrefix(RegName);
352 return;
353 }
354 case MachineOperand::MO_Immediate:
355 O << MO.getImm();
356 return;
357
358 case MachineOperand::MO_MachineBasicBlock:
359 MO.getMBB()->getSymbol()->print(OS&: O, MAI);
360 return;
361 case MachineOperand::MO_ConstantPoolIndex:
362 O << DL.getInternalSymbolPrefix() << "CPI" << getFunctionNumber() << '_'
363 << MO.getIndex();
364 return;
365 case MachineOperand::MO_BlockAddress:
366 GetBlockAddressSymbol(BA: MO.getBlockAddress())->print(OS&: O, MAI);
367 return;
368 case MachineOperand::MO_GlobalAddress: {
369 PrintSymbolOperand(MO, O);
370 return;
371 }
372
373 default:
374 O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
375 return;
376 }
377}
378
379/// PrintAsmOperand - Print out an operand for an inline asm expression.
380///
381bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
382 const char *ExtraCode, raw_ostream &O) {
383 // Does this asm operand have a single letter operand modifier?
384 if (ExtraCode && ExtraCode[0]) {
385 if (ExtraCode[1] != 0) return true; // Unknown modifier.
386
387 switch (ExtraCode[0]) {
388 default:
389 // See if this is a generic print operand
390 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS&: O);
391 case 'L': // Write second word of DImode reference.
392 // Verify that this operand has two consecutive registers.
393 if (!MI->getOperand(i: OpNo).isReg() ||
394 OpNo+1 == MI->getNumOperands() ||
395 !MI->getOperand(i: OpNo+1).isReg())
396 return true;
397 ++OpNo; // Return the high-part.
398 break;
399 case 'I':
400 // Write 'i' if an integer constant, otherwise nothing. Used to print
401 // addi vs add, etc.
402 if (MI->getOperand(i: OpNo).isImm())
403 O << "i";
404 return false;
405 case 'x':
406 if(!MI->getOperand(i: OpNo).isReg())
407 return true;
408 // This operand uses VSX numbering.
409 // If the operand is a VMX register, convert it to a VSX register.
410 Register Reg = MI->getOperand(i: OpNo).getReg();
411 if (PPC::isVRRegister(Reg))
412 Reg = PPC::VSX32 + (Reg - PPC::V0);
413 else if (PPC::isVFRegister(Reg))
414 Reg = PPC::VSX32 + (Reg - PPC::VF0);
415 const char *RegName;
416 RegName = PPCInstPrinter::getRegisterName(Reg);
417 RegName = PPC::stripRegisterPrefix(RegName);
418 O << RegName;
419 return false;
420 }
421 }
422
423 printOperand(MI, OpNo, O);
424 return false;
425}
426
427// At the moment, all inline asm memory operands are a single register.
428// In any case, the output of this routine should always be just one
429// assembler operand.
430bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
431 const char *ExtraCode,
432 raw_ostream &O) {
433 if (ExtraCode && ExtraCode[0]) {
434 if (ExtraCode[1] != 0) return true; // Unknown modifier.
435
436 switch (ExtraCode[0]) {
437 default: return true; // Unknown modifier.
438 case 'L': // A memory reference to the upper word of a double word op.
439 O << getDataLayout().getPointerSize() << "(";
440 printOperand(MI, OpNo, O);
441 O << ")";
442 return false;
443 case 'y': // A memory reference for an X-form instruction
444 O << "0, ";
445 printOperand(MI, OpNo, O);
446 return false;
447 case 'I':
448 // Write 'i' if an integer constant, otherwise nothing. Used to print
449 // addi vs add, etc.
450 if (MI->getOperand(i: OpNo).isImm())
451 O << "i";
452 return false;
453 case 'U': // Print 'u' for update form.
454 case 'X': // Print 'x' for indexed form.
455 // FIXME: Currently for PowerPC memory operands are always loaded
456 // into a register, so we never get an update or indexed form.
457 // This is bad even for offset forms, since even if we know we
458 // have a value in -16(r1), we will generate a load into r<n>
459 // and then load from 0(r<n>). Until that issue is fixed,
460 // tolerate 'U' and 'X' but don't output anything.
461 assert(MI->getOperand(OpNo).isReg());
462 return false;
463 }
464 }
465
466 assert(MI->getOperand(OpNo).isReg());
467 O << "0(";
468 printOperand(MI, OpNo, O);
469 O << ")";
470 return false;
471}
472
473static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type) {
474 ++NumTOCEntries;
475 switch (Type) {
476 case PPCAsmPrinter::TOCType_ConstantPool:
477 ++NumTOCConstPool;
478 break;
479 case PPCAsmPrinter::TOCType_GlobalInternal:
480 ++NumTOCGlobalInternal;
481 break;
482 case PPCAsmPrinter::TOCType_GlobalExternal:
483 ++NumTOCGlobalExternal;
484 break;
485 case PPCAsmPrinter::TOCType_JumpTable:
486 ++NumTOCJumpTable;
487 break;
488 case PPCAsmPrinter::TOCType_ThreadLocal:
489 ++NumTOCThreadLocal;
490 break;
491 case PPCAsmPrinter::TOCType_BlockAddress:
492 ++NumTOCBlockAddress;
493 break;
494 case PPCAsmPrinter::TOCType_EHBlock:
495 ++NumTOCEHBlock;
496 break;
497 }
498}
499
500static CodeModel::Model getCodeModel(const PPCSubtarget &S,
501 const TargetMachine &TM,
502 const MachineOperand &MO) {
503 CodeModel::Model ModuleModel = TM.getCodeModel();
504
505 // If the operand is not a global address then there is no
506 // global variable to carry an attribute.
507 if (!(MO.getType() == MachineOperand::MO_GlobalAddress))
508 return ModuleModel;
509
510 const GlobalValue *GV = MO.getGlobal();
511 assert(GV && "expected global for MO_GlobalAddress");
512
513 return S.getCodeModel(TM, GV);
514}
515
516static void setOptionalCodeModel(MCSymbolXCOFF *XSym, CodeModel::Model CM) {
517 switch (CM) {
518 case CodeModel::Large:
519 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Large);
520 return;
521 case CodeModel::Small:
522 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Small);
523 return;
524 default:
525 report_fatal_error(reason: "Invalid code model for AIX");
526 }
527}
528
529/// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
530/// exists for it. If not, create one. Then return a symbol that references
531/// the TOC entry.
532MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym,
533 TOCEntryType Type,
534 PPCMCExpr::Specifier Spec) {
535 // If this is a new TOC entry add statistics about it.
536 auto [It, Inserted] = TOC.try_emplace(Key: {Sym, Spec});
537 if (Inserted)
538 collectTOCStats(Type);
539
540 MCSymbol *&TOCEntry = It->second;
541 if (!TOCEntry)
542 TOCEntry = createTempSymbol(Name: "C");
543 return TOCEntry;
544}
545
546void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
547 unsigned NumNOPBytes = MI.getOperand(i: 1).getImm();
548
549 auto &Ctx = OutStreamer->getContext();
550 MCSymbol *MILabel = Ctx.createTempSymbol();
551 OutStreamer->emitLabel(Symbol: MILabel);
552
553 SM.recordStackMap(L: *MILabel, MI);
554 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
555
556 // Scan ahead to trim the shadow.
557 const MachineBasicBlock &MBB = *MI.getParent();
558 MachineBasicBlock::const_iterator MII(MI);
559 ++MII;
560 while (NumNOPBytes > 0) {
561 if (MII == MBB.end() || MII->isCall() ||
562 MII->getOpcode() == PPC::DBG_VALUE ||
563 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
564 MII->getOpcode() == TargetOpcode::STACKMAP)
565 break;
566 ++MII;
567 NumNOPBytes -= 4;
568 }
569
570 // Emit nops.
571 for (unsigned i = 0; i < NumNOPBytes; i += 4)
572 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::NOP));
573}
574
575// Lower a patchpoint of the form:
576// [<def>], <id>, <numBytes>, <target>, <numArgs>
577void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
578 auto &Ctx = OutStreamer->getContext();
579 MCSymbol *MILabel = Ctx.createTempSymbol();
580 OutStreamer->emitLabel(Symbol: MILabel);
581
582 SM.recordPatchPoint(L: *MILabel, MI);
583 PatchPointOpers Opers(&MI);
584
585 unsigned EncodedBytes = 0;
586 const MachineOperand &CalleeMO = Opers.getCallTarget();
587
588 if (CalleeMO.isImm()) {
589 int64_t CallTarget = CalleeMO.getImm();
590 if (CallTarget) {
591 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
592 "High 16 bits of call target should be zero.");
593 Register ScratchReg = MI.getOperand(i: Opers.getNextScratchIdx()).getReg();
594 EncodedBytes = 0;
595 // Materialize the jump address:
596 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LI8)
597 .addReg(Reg: ScratchReg)
598 .addImm(Val: (CallTarget >> 32) & 0xFFFF));
599 ++EncodedBytes;
600
601 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::RLDIC)
602 .addReg(Reg: ScratchReg)
603 .addReg(Reg: ScratchReg)
604 .addImm(Val: 32).addImm(Val: 16));
605 ++EncodedBytes;
606
607 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ORIS8)
608 .addReg(Reg: ScratchReg)
609 .addReg(Reg: ScratchReg)
610 .addImm(Val: (CallTarget >> 16) & 0xFFFF));
611 ++EncodedBytes;
612
613 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ORI8)
614 .addReg(Reg: ScratchReg)
615 .addReg(Reg: ScratchReg)
616 .addImm(Val: CallTarget & 0xFFFF));
617 ++EncodedBytes;
618
619 // Save the current TOC pointer before the remote call.
620 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
621 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::STD)
622 .addReg(Reg: PPC::X2)
623 .addImm(Val: TOCSaveOffset)
624 .addReg(Reg: PPC::X1));
625 ++EncodedBytes;
626
627 // If we're on ELFv1, then we need to load the actual function pointer
628 // from the function descriptor.
629 if (!Subtarget->isELFv2ABI()) {
630 // Load the new TOC pointer and the function address, but not r11
631 // (needing this is rare, and loading it here would prevent passing it
632 // via a 'nest' parameter.
633 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LD)
634 .addReg(Reg: PPC::X2)
635 .addImm(Val: 8)
636 .addReg(Reg: ScratchReg));
637 ++EncodedBytes;
638
639 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LD)
640 .addReg(Reg: ScratchReg)
641 .addImm(Val: 0)
642 .addReg(Reg: ScratchReg));
643 ++EncodedBytes;
644 }
645
646 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MTCTR8)
647 .addReg(Reg: ScratchReg));
648 ++EncodedBytes;
649
650 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::BCTRL8));
651 ++EncodedBytes;
652
653 // Restore the TOC pointer after the call.
654 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LD)
655 .addReg(Reg: PPC::X2)
656 .addImm(Val: TOCSaveOffset)
657 .addReg(Reg: PPC::X1));
658 ++EncodedBytes;
659 }
660 } else if (CalleeMO.isGlobal()) {
661 const GlobalValue *GValue = CalleeMO.getGlobal();
662 MCSymbol *MOSymbol = getSymbol(GV: GValue);
663 const MCExpr *SymVar = MCSymbolRefExpr::create(Symbol: MOSymbol, Ctx&: OutContext);
664
665 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::BL8_NOP)
666 .addExpr(Val: SymVar));
667 EncodedBytes += 2;
668 }
669
670 // Each instruction is 4 bytes.
671 EncodedBytes *= 4;
672
673 // Emit padding.
674 unsigned NumBytes = Opers.getNumPatchBytes();
675 if (NumBytes < EncodedBytes)
676 reportFatalUsageError(
677 reason: "Patchpoint can't request size less than the length of a call.");
678
679 assert((NumBytes - EncodedBytes) % 4 == 0 &&
680 "Invalid number of NOP bytes requested!");
681 for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
682 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::NOP));
683}
684
685/// This helper function creates the TlsGetAddr/TlsGetMod MCSymbol for AIX. We
686/// will create the csect and use the qual-name symbol instead of creating just
687/// the external symbol.
688static MCSymbol *createMCSymbolForTlsGetAddr(MCContext &Ctx, unsigned MIOpc) {
689 StringRef SymName;
690 switch (MIOpc) {
691 default:
692 SymName = ".__tls_get_addr";
693 break;
694 case PPC::GETtlsTpointer32AIX:
695 SymName = ".__get_tpointer";
696 break;
697 case PPC::GETtlsMOD32AIX:
698 case PPC::GETtlsMOD64AIX:
699 SymName = ".__tls_get_mod";
700 break;
701 }
702 return Ctx
703 .getXCOFFSection(Section: SymName, K: SectionKind::getText(),
704 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_PR, XCOFF::XTY_ER))
705 ->getQualNameSymbol();
706}
707
708void PPCAsmPrinter::EmitAIXTlsCallHelper(const MachineInstr *MI) {
709 assert(Subtarget->isAIXABI() &&
710 "Only expecting to emit calls to get the thread pointer on AIX!");
711
712 MCSymbol *TlsCall = createMCSymbolForTlsGetAddr(Ctx&: OutContext, MIOpc: MI->getOpcode());
713 const MCExpr *TlsRef = MCSymbolRefExpr::create(Symbol: TlsCall, Ctx&: OutContext);
714 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::BLA).addExpr(Val: TlsRef));
715}
716
717/// Given a GETtls[ld]ADDR[32] instruction, print a call to __tls_get_addr to
718/// the current output stream.
719void PPCAsmPrinter::emitTlsCall(const MachineInstr *MI,
720 PPCMCExpr::Specifier VK) {
721 PPCMCExpr::Specifier Kind = PPC::S_None;
722 unsigned Opcode = PPC::BL8_NOP_TLS;
723
724 assert(MI->getNumOperands() >= 3 && "Expecting at least 3 operands from MI");
725 if (MI->getOperand(i: 2).getTargetFlags() == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
726 MI->getOperand(i: 2).getTargetFlags() == PPCII::MO_GOT_TLSLD_PCREL_FLAG) {
727 Kind = PPC::S_NOTOC;
728 Opcode = PPC::BL8_NOTOC_TLS;
729 }
730 const Module *M = MF->getFunction().getParent();
731
732 assert(MI->getOperand(0).isReg() &&
733 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
734 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
735 "GETtls[ld]ADDR[32] must define GPR3");
736 assert(MI->getOperand(1).isReg() &&
737 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
738 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
739 "GETtls[ld]ADDR[32] must read GPR3");
740
741 if (Subtarget->isAIXABI()) {
742 // For TLSGD, the variable offset should already be in R4 and the region
743 // handle should already be in R3. We generate an absolute branch to
744 // .__tls_get_addr. For TLSLD, the module handle should already be in R3.
745 // We generate an absolute branch to .__tls_get_mod.
746 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
747 (void)VarOffsetReg;
748 assert((MI->getOpcode() == PPC::GETtlsMOD32AIX ||
749 MI->getOpcode() == PPC::GETtlsMOD64AIX ||
750 (MI->getOperand(2).isReg() &&
751 MI->getOperand(2).getReg() == VarOffsetReg)) &&
752 "GETtls[ld]ADDR[32] must read GPR4");
753 EmitAIXTlsCallHelper(MI);
754 return;
755 }
756
757 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name: "__tls_get_addr");
758
759 if (Subtarget->is32BitELFABI() && isPositionIndependent())
760 Kind = PPC::S_PLT;
761
762 const MCExpr *TlsRef = MCSymbolRefExpr::create(Symbol: TlsGetAddr, specifier: Kind, Ctx&: OutContext);
763
764 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
765 if (Kind == PPC::S_PLT && Subtarget->isSecurePlt() &&
766 M->getPICLevel() == PICLevel::BigPIC)
767 TlsRef = MCBinaryExpr::createAdd(
768 LHS: TlsRef, RHS: MCConstantExpr::create(Value: 32768, Ctx&: OutContext), Ctx&: OutContext);
769 const MachineOperand &MO = MI->getOperand(i: 2);
770 const GlobalValue *GValue = MO.getGlobal();
771 MCSymbol *MOSymbol = getSymbol(GV: GValue);
772 const MCExpr *SymVar = MCSymbolRefExpr::create(Symbol: MOSymbol, specifier: VK, Ctx&: OutContext);
773 EmitToStreamer(S&: *OutStreamer,
774 Inst: MCInstBuilder(Subtarget->isPPC64() ? Opcode
775 : (unsigned)PPC::BL_TLS)
776 .addExpr(Val: TlsRef)
777 .addExpr(Val: SymVar));
778}
779
780/// Map a machine operand for a TOC pseudo-machine instruction to its
781/// corresponding MCSymbol.
782static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO,
783 AsmPrinter &AP) {
784 switch (MO.getType()) {
785 case MachineOperand::MO_GlobalAddress:
786 return AP.getSymbol(GV: MO.getGlobal());
787 case MachineOperand::MO_ConstantPoolIndex:
788 return AP.GetCPISymbol(CPID: MO.getIndex());
789 case MachineOperand::MO_JumpTableIndex:
790 return AP.GetJTISymbol(JTID: MO.getIndex());
791 case MachineOperand::MO_BlockAddress:
792 return AP.GetBlockAddressSymbol(BA: MO.getBlockAddress());
793 default:
794 llvm_unreachable("Unexpected operand type to get symbol.");
795 }
796}
797
798static PPCAsmPrinter::TOCEntryType
799getTOCEntryTypeForLinkage(GlobalValue::LinkageTypes Linkage) {
800 if (Linkage == GlobalValue::ExternalLinkage ||
801 Linkage == GlobalValue::AvailableExternallyLinkage ||
802 Linkage == GlobalValue::ExternalWeakLinkage)
803 return PPCAsmPrinter::TOCType_GlobalExternal;
804
805 return PPCAsmPrinter::TOCType_GlobalInternal;
806}
807
808static PPCAsmPrinter::TOCEntryType
809getTOCEntryTypeForMO(const MachineOperand &MO) {
810 // Use the target flags to determine if this MO is Thread Local.
811 // If we don't do this it comes out as Global.
812 if (PPCInstrInfo::hasTLSFlag(TF: MO.getTargetFlags()))
813 return PPCAsmPrinter::TOCType_ThreadLocal;
814
815 switch (MO.getType()) {
816 case MachineOperand::MO_GlobalAddress: {
817 const GlobalValue *GlobalV = MO.getGlobal();
818 return getTOCEntryTypeForLinkage(Linkage: GlobalV->getLinkage());
819 }
820 case MachineOperand::MO_ConstantPoolIndex:
821 return PPCAsmPrinter::TOCType_ConstantPool;
822 case MachineOperand::MO_JumpTableIndex:
823 return PPCAsmPrinter::TOCType_JumpTable;
824 case MachineOperand::MO_BlockAddress:
825 return PPCAsmPrinter::TOCType_BlockAddress;
826 default:
827 llvm_unreachable("Unexpected operand type to get TOC type.");
828 }
829}
830
831const MCExpr *PPCAsmPrinter::symbolWithSpecifier(const MCSymbol *S,
832 PPCMCExpr::Specifier Spec) {
833 return MCSymbolRefExpr::create(Symbol: S, specifier: Spec, Ctx&: OutContext);
834}
835
836/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
837/// the current output stream.
838///
839void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
840 PPC_MC::verifyInstructionPredicates(Opcode: MI->getOpcode(),
841 Features: getSubtargetInfo().getFeatureBits());
842
843 MCInst TmpInst;
844 const bool IsPPC64 = Subtarget->isPPC64();
845 const bool IsAIX = Subtarget->isAIXABI();
846 const bool HasAIXSmallLocalTLS = Subtarget->hasAIXSmallLocalExecTLS() ||
847 Subtarget->hasAIXSmallLocalDynamicTLS();
848 const Module *M = MF->getFunction().getParent();
849 PICLevel::Level PL = M->getPICLevel();
850
851#ifndef NDEBUG
852 // Validate that SPE and FPU are mutually exclusive in codegen
853 if (!MI->isInlineAsm()) {
854 for (const MachineOperand &MO: MI->operands()) {
855 if (MO.isReg()) {
856 Register Reg = MO.getReg();
857 if (Subtarget->hasSPE()) {
858 if (PPC::F4RCRegClass.contains(Reg) ||
859 PPC::F8RCRegClass.contains(Reg) ||
860 PPC::VFRCRegClass.contains(Reg) ||
861 PPC::VRRCRegClass.contains(Reg) ||
862 PPC::VSFRCRegClass.contains(Reg) ||
863 PPC::VSSRCRegClass.contains(Reg)
864 )
865 llvm_unreachable("SPE targets cannot have FPRegs!");
866 } else {
867 if (PPC::SPERCRegClass.contains(Reg))
868 llvm_unreachable("SPE register found in FPU-targeted code!");
869 }
870 }
871 }
872 }
873#endif
874
875 auto getTOCRelocAdjustedExprForXCOFF = [this](const MCExpr *Expr,
876 ptrdiff_t OriginalOffset) {
877 // Apply an offset to the TOC-based expression such that the adjusted
878 // notional offset from the TOC base (to be encoded into the instruction's D
879 // or DS field) is the signed 16-bit truncation of the original notional
880 // offset from the TOC base.
881 // This is consistent with the treatment used both by XL C/C++ and
882 // by AIX ld -r.
883 ptrdiff_t Adjustment =
884 OriginalOffset - llvm::SignExtend32<16>(X: OriginalOffset);
885 return MCBinaryExpr::createAdd(
886 LHS: Expr, RHS: MCConstantExpr::create(Value: -Adjustment, Ctx&: OutContext), Ctx&: OutContext);
887 };
888
889 auto getTOCEntryLoadingExprForXCOFF =
890 [IsPPC64, getTOCRelocAdjustedExprForXCOFF,
891 this](const MCSymbol *MOSymbol, const MCExpr *Expr,
892 PPCMCExpr::Specifier VK = PPC::S_None) -> const MCExpr * {
893 const unsigned EntryByteSize = IsPPC64 ? 8 : 4;
894 const auto TOCEntryIter = TOC.find(Key: {MOSymbol, VK});
895 assert(TOCEntryIter != TOC.end() &&
896 "Could not find the TOC entry for this symbol.");
897 const ptrdiff_t EntryDistanceFromTOCBase =
898 (TOCEntryIter - TOC.begin()) * EntryByteSize;
899 constexpr int16_t PositiveTOCRange = INT16_MAX;
900
901 if (EntryDistanceFromTOCBase > PositiveTOCRange)
902 return getTOCRelocAdjustedExprForXCOFF(Expr, EntryDistanceFromTOCBase);
903
904 return Expr;
905 };
906 auto getSpecifier = [&](const MachineOperand &MO) {
907 // For TLS initial-exec and local-exec accesses on AIX, we have one TOC
908 // entry for the symbol (with the variable offset), which is differentiated
909 // by MO_TPREL_FLAG.
910 unsigned Flag = MO.getTargetFlags();
911 if (Flag == PPCII::MO_TPREL_FLAG ||
912 Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
913 Flag == PPCII::MO_TPREL_PCREL_FLAG) {
914 assert(MO.isGlobal() && "Only expecting a global MachineOperand here!\n");
915 TLSModel::Model Model = TM.getTLSModel(GV: MO.getGlobal());
916 if (Model == TLSModel::LocalExec)
917 return PPC::S_AIX_TLSLE;
918 if (Model == TLSModel::InitialExec)
919 return PPC::S_AIX_TLSIE;
920 // On AIX, TLS model opt may have turned local-dynamic accesses into
921 // initial-exec accesses.
922 PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
923 if (Model == TLSModel::LocalDynamic &&
924 FuncInfo->isAIXFuncUseTLSIEForLD()) {
925 LLVM_DEBUG(
926 dbgs() << "Current function uses IE access for default LD vars.\n");
927 return PPC::S_AIX_TLSIE;
928 }
929 llvm_unreachable("Only expecting local-exec or initial-exec accesses!");
930 }
931 // For GD TLS access on AIX, we have two TOC entries for the symbol (one for
932 // the variable offset and the other for the region handle). They are
933 // differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG.
934 if (Flag == PPCII::MO_TLSGDM_FLAG)
935 return PPC::S_AIX_TLSGDM;
936 if (Flag == PPCII::MO_TLSGD_FLAG || Flag == PPCII::MO_GOT_TLSGD_PCREL_FLAG)
937 return PPC::S_AIX_TLSGD;
938 // For local-dynamic TLS access on AIX, we have one TOC entry for the symbol
939 // (the variable offset) and one shared TOC entry for the module handle.
940 // They are differentiated by MO_TLSLD_FLAG and MO_TLSLDM_FLAG.
941 if (Flag == PPCII::MO_TLSLD_FLAG && IsAIX)
942 return PPC::S_AIX_TLSLD;
943 if (Flag == PPCII::MO_TLSLDM_FLAG && IsAIX)
944 return PPC::S_AIX_TLSML;
945 return PPC::S_None;
946 };
947
948 // Lower multi-instruction pseudo operations.
949 switch (MI->getOpcode()) {
950 default: break;
951 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
952 assert(!Subtarget->isAIXABI() &&
953 "AIX does not support patchable function entry!");
954 const Function &F = MF->getFunction();
955 unsigned Num = 0;
956 (void)F.getFnAttribute(Kind: "patchable-function-entry")
957 .getValueAsString()
958 .getAsInteger(Radix: 10, Result&: Num);
959 if (!Num)
960 return;
961 emitNops(N: Num);
962 return;
963 }
964 case TargetOpcode::DBG_VALUE:
965 llvm_unreachable("Should be handled target independently");
966 case TargetOpcode::STACKMAP:
967 return LowerSTACKMAP(SM, MI: *MI);
968 case TargetOpcode::PATCHPOINT:
969 return LowerPATCHPOINT(SM, MI: *MI);
970
971 case PPC::MoveGOTtoLR: {
972 // Transform %lr = MoveGOTtoLR
973 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
974 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
975 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
976 // blrl
977 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
978 MCSymbol *GOTSymbol =
979 OutContext.getOrCreateSymbol(Name: StringRef("_GLOBAL_OFFSET_TABLE_"));
980 const MCExpr *OffsExpr = MCBinaryExpr::createSub(
981 LHS: MCSymbolRefExpr::create(Symbol: GOTSymbol, specifier: PPC::S_LOCAL, Ctx&: OutContext),
982 RHS: MCConstantExpr::create(Value: 4, Ctx&: OutContext), Ctx&: OutContext);
983
984 // Emit the 'bl'.
985 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::BL).addExpr(Val: OffsExpr));
986 return;
987 }
988 case PPC::MovePCtoLR:
989 case PPC::MovePCtoLR8: {
990 // Transform %lr = MovePCtoLR
991 // Into this, where the label is the PIC base:
992 // bl L1$pb
993 // L1$pb:
994 MCSymbol *PICBase = MF->getPICBaseSymbol();
995
996 // Emit 'bcl 20,31,.+4' so the link stack is not corrupted.
997 EmitToStreamer(S&: *OutStreamer,
998 Inst: MCInstBuilder(PPC::BCLalways)
999 // FIXME: We would like an efficient form for this, so we
1000 // don't have to do a lot of extra uniquing.
1001 .addExpr(Val: MCSymbolRefExpr::create(Symbol: PICBase, Ctx&: OutContext)));
1002
1003 // Emit the label.
1004 OutStreamer->emitLabel(Symbol: PICBase);
1005 return;
1006 }
1007 case PPC::UpdateGBR: {
1008 // Transform %rd = UpdateGBR(%rt, %ri)
1009 // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
1010 // add %rd, %rt, %ri
1011 // or into (if secure plt mode is on):
1012 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
1013 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
1014 // Get the offset from the GOT Base Register to the GOT
1015 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1016 if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
1017 MCRegister PICR = TmpInst.getOperand(i: 0).getReg();
1018 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
1019 Name: M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
1020 : ".LTOC");
1021 const MCExpr *PB =
1022 MCSymbolRefExpr::create(Symbol: MF->getPICBaseSymbol(), Ctx&: OutContext);
1023
1024 const MCExpr *DeltaExpr = MCBinaryExpr::createSub(
1025 LHS: MCSymbolRefExpr::create(Symbol: BaseSymbol, Ctx&: OutContext), RHS: PB, Ctx&: OutContext);
1026
1027 const MCExpr *DeltaHi =
1028 MCSpecifierExpr::create(Expr: DeltaExpr, S: PPC::S_HA, Ctx&: OutContext);
1029 EmitToStreamer(
1030 S&: *OutStreamer,
1031 Inst: MCInstBuilder(PPC::ADDIS).addReg(Reg: PICR).addReg(Reg: PICR).addExpr(Val: DeltaHi));
1032
1033 const MCExpr *DeltaLo =
1034 MCSpecifierExpr::create(Expr: DeltaExpr, S: PPC::S_LO, Ctx&: OutContext);
1035 EmitToStreamer(
1036 S&: *OutStreamer,
1037 Inst: MCInstBuilder(PPC::ADDI).addReg(Reg: PICR).addReg(Reg: PICR).addExpr(Val: DeltaLo));
1038 return;
1039 } else {
1040 MCSymbol *PICOffset =
1041 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(MF&: *MF);
1042 TmpInst.setOpcode(PPC::LWZ);
1043 const MCExpr *Exp = MCSymbolRefExpr::create(Symbol: PICOffset, Ctx&: OutContext);
1044 const MCExpr *PB =
1045 MCSymbolRefExpr::create(Symbol: MF->getPICBaseSymbol(),
1046 Ctx&: OutContext);
1047 const MCOperand TR = TmpInst.getOperand(i: 1);
1048 const MCOperand PICR = TmpInst.getOperand(i: 0);
1049
1050 // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
1051 TmpInst.getOperand(i: 1) =
1052 MCOperand::createExpr(Val: MCBinaryExpr::createSub(LHS: Exp, RHS: PB, Ctx&: OutContext));
1053 TmpInst.getOperand(i: 0) = TR;
1054 TmpInst.getOperand(i: 2) = PICR;
1055 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1056
1057 TmpInst.setOpcode(PPC::ADD4);
1058 TmpInst.getOperand(i: 0) = PICR;
1059 TmpInst.getOperand(i: 1) = TR;
1060 TmpInst.getOperand(i: 2) = PICR;
1061 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1062 return;
1063 }
1064 }
1065 case PPC::LWZtoc: {
1066 // Transform %rN = LWZtoc @op1, %r2
1067 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1068
1069 // Change the opcode to LWZ.
1070 TmpInst.setOpcode(PPC::LWZ);
1071
1072 const MachineOperand &MO = MI->getOperand(i: 1);
1073 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1074 "Invalid operand for LWZtoc.");
1075
1076 // Map the operand to its corresponding MCSymbol.
1077 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1078
1079 // Create a reference to the GOT entry for the symbol. The GOT entry will be
1080 // synthesized later.
1081 if (PL == PICLevel::SmallPIC && !IsAIX) {
1082 const MCExpr *Exp = symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_GOT);
1083 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1084 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1085 return;
1086 }
1087
1088 PPCMCExpr::Specifier VK = getSpecifier(MO);
1089
1090 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the
1091 // storage allocated in the TOC which contains the address of
1092 // 'MOSymbol'. Said TOC entry will be synthesized later.
1093 MCSymbol *TOCEntry =
1094 lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1095 const MCExpr *Exp = MCSymbolRefExpr::create(Symbol: TOCEntry, Ctx&: OutContext);
1096
1097 // AIX uses the label directly as the lwz displacement operand for
1098 // references into the toc section. The displacement value will be generated
1099 // relative to the toc-base.
1100 if (IsAIX) {
1101 assert(
1102 getCodeModel(*Subtarget, TM, MO) == CodeModel::Small &&
1103 "This pseudo should only be selected for 32-bit small code model.");
1104 Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
1105 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1106
1107 // Print MO for better readability
1108 if (isVerbose())
1109 OutStreamer->getCommentOS() << MO << '\n';
1110 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1111 return;
1112 }
1113
1114 // Create an explicit subtract expression between the local symbol and
1115 // '.LTOC' to manifest the toc-relative offset.
1116 const MCExpr *PB = MCSymbolRefExpr::create(
1117 Symbol: OutContext.getOrCreateSymbol(Name: Twine(".LTOC")), Ctx&: OutContext);
1118 Exp = MCBinaryExpr::createSub(LHS: Exp, RHS: PB, Ctx&: OutContext);
1119 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1120 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1121 return;
1122 }
1123 case PPC::ADDItoc:
1124 case PPC::ADDItoc8: {
1125 assert(IsAIX && TM.getCodeModel() == CodeModel::Small &&
1126 "PseudoOp only valid for small code model AIX");
1127
1128 // Transform %rN = ADDItoc/8 %r2, @op1.
1129 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1130
1131 // Change the opcode to load address.
1132 TmpInst.setOpcode((!IsPPC64) ? (PPC::LA) : (PPC::LA8));
1133
1134 const MachineOperand &MO = MI->getOperand(i: 2);
1135 assert(MO.isGlobal() && "Invalid operand for ADDItoc[8].");
1136
1137 // Map the operand to its corresponding MCSymbol.
1138 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1139
1140 const MCExpr *Exp = MCSymbolRefExpr::create(Symbol: MOSymbol, Ctx&: OutContext);
1141
1142 TmpInst.getOperand(i: 2) = MCOperand::createExpr(Val: Exp);
1143 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1144 return;
1145 }
1146 case PPC::LDtocJTI:
1147 case PPC::LDtocCPT:
1148 case PPC::LDtocBA:
1149 case PPC::LDtoc: {
1150 // Transform %x3 = LDtoc @min1, %x2
1151 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1152
1153 // Change the opcode to LD.
1154 TmpInst.setOpcode(PPC::LD);
1155
1156 const MachineOperand &MO = MI->getOperand(i: 1);
1157 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1158 "Invalid operand!");
1159
1160 // Map the operand to its corresponding MCSymbol.
1161 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1162
1163 PPCMCExpr::Specifier VK = getSpecifier(MO);
1164
1165 // Map the machine operand to its corresponding MCSymbol, then map the
1166 // global address operand to be a reference to the TOC entry we will
1167 // synthesize later.
1168 MCSymbol *TOCEntry =
1169 lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1170
1171 PPCMCExpr::Specifier VKExpr = IsAIX ? PPC::S_None : PPC::S_TOC;
1172 const MCExpr *Exp = symbolWithSpecifier(S: TOCEntry, Spec: VKExpr);
1173 TmpInst.getOperand(i: 1) = MCOperand::createExpr(
1174 Val: IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp);
1175
1176 // Print MO for better readability
1177 if (isVerbose() && IsAIX)
1178 OutStreamer->getCommentOS() << MO << '\n';
1179 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1180 return;
1181 }
1182 case PPC::ADDIStocHA: {
1183 const MachineOperand &MO = MI->getOperand(i: 2);
1184
1185 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1186 "Invalid operand for ADDIStocHA.");
1187 assert((IsAIX && !IsPPC64 &&
1188 getCodeModel(*Subtarget, TM, MO) == CodeModel::Large) &&
1189 "This pseudo should only be selected for 32-bit large code model on"
1190 " AIX.");
1191
1192 // Transform %rd = ADDIStocHA %rA, @sym(%r2)
1193 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1194
1195 // Change the opcode to ADDIS.
1196 TmpInst.setOpcode(PPC::ADDIS);
1197
1198 // Map the machine operand to its corresponding MCSymbol.
1199 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1200
1201 PPCMCExpr::Specifier VK = getSpecifier(MO);
1202
1203 // Map the global address operand to be a reference to the TOC entry we
1204 // will synthesize later. 'TOCEntry' is a label used to reference the
1205 // storage allocated in the TOC which contains the address of 'MOSymbol'.
1206 // If the symbol does not have the toc-data attribute, then we create the
1207 // TOC entry on AIX. If the toc-data attribute is used, the TOC entry
1208 // contains the data rather than the address of the MOSymbol.
1209 if (![](const MachineOperand &MO) {
1210 if (!MO.isGlobal())
1211 return false;
1212
1213 const GlobalVariable *GV = dyn_cast<GlobalVariable>(Val: MO.getGlobal());
1214 if (!GV)
1215 return false;
1216 return GV->hasAttribute(Kind: "toc-data");
1217 }(MO)) {
1218 MOSymbol = lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1219 }
1220
1221 const MCExpr *Exp = symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_U);
1222 TmpInst.getOperand(i: 2) = MCOperand::createExpr(Val: Exp);
1223 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1224 return;
1225 }
1226 case PPC::LWZtocL: {
1227 const MachineOperand &MO = MI->getOperand(i: 1);
1228
1229 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1230 "Invalid operand for LWZtocL.");
1231 assert(IsAIX && !IsPPC64 &&
1232 getCodeModel(*Subtarget, TM, MO) == CodeModel::Large &&
1233 "This pseudo should only be selected for 32-bit large code model on"
1234 " AIX.");
1235
1236 // Transform %rd = LWZtocL @sym, %rs.
1237 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1238
1239 // Change the opcode to lwz.
1240 TmpInst.setOpcode(PPC::LWZ);
1241
1242 // Map the machine operand to its corresponding MCSymbol.
1243 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1244
1245 PPCMCExpr::Specifier VK = getSpecifier(MO);
1246
1247 // Always use TOC on AIX. Map the global address operand to be a reference
1248 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
1249 // reference the storage allocated in the TOC which contains the address of
1250 // 'MOSymbol'.
1251 MCSymbol *TOCEntry =
1252 lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1253 const MCExpr *Exp = symbolWithSpecifier(S: TOCEntry, Spec: PPC::S_L);
1254 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1255 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1256 return;
1257 }
1258 case PPC::ADDIStocHA8: {
1259 // Transform %xd = ADDIStocHA8 %x2, @sym
1260 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1261
1262 // Change the opcode to ADDIS8. If the global address is the address of
1263 // an external symbol, is a jump table address, is a block address, or is a
1264 // constant pool index with large code model enabled, then generate a TOC
1265 // entry and reference that. Otherwise, reference the symbol directly.
1266 TmpInst.setOpcode(PPC::ADDIS8);
1267
1268 const MachineOperand &MO = MI->getOperand(i: 2);
1269 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
1270 "Invalid operand for ADDIStocHA8!");
1271
1272 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1273
1274 PPCMCExpr::Specifier VK = getSpecifier(MO);
1275
1276 const bool GlobalToc =
1277 MO.isGlobal() && Subtarget->isGVIndirectSymbol(GV: MO.getGlobal());
1278
1279 const CodeModel::Model CM =
1280 IsAIX ? getCodeModel(S: *Subtarget, TM, MO) : TM.getCodeModel();
1281
1282 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
1283 (MO.isCPI() && CM == CodeModel::Large))
1284 MOSymbol = lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1285
1286 VK = IsAIX ? PPC::S_U : PPC::S_TOC_HA;
1287
1288 const MCExpr *Exp = symbolWithSpecifier(S: MOSymbol, Spec: VK);
1289
1290 if (!MO.isJTI() && MO.getOffset())
1291 Exp = MCBinaryExpr::createAdd(LHS: Exp,
1292 RHS: MCConstantExpr::create(Value: MO.getOffset(),
1293 Ctx&: OutContext),
1294 Ctx&: OutContext);
1295
1296 TmpInst.getOperand(i: 2) = MCOperand::createExpr(Val: Exp);
1297 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1298 return;
1299 }
1300 case PPC::LDtocL: {
1301 // Transform %xd = LDtocL @sym, %xs
1302 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1303
1304 // Change the opcode to LD. If the global address is the address of
1305 // an external symbol, is a jump table address, is a block address, or is
1306 // a constant pool index with large code model enabled, then generate a
1307 // TOC entry and reference that. Otherwise, reference the symbol directly.
1308 TmpInst.setOpcode(PPC::LD);
1309
1310 const MachineOperand &MO = MI->getOperand(i: 1);
1311 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
1312 MO.isBlockAddress()) &&
1313 "Invalid operand for LDtocL!");
1314
1315 LLVM_DEBUG(assert(
1316 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1317 "LDtocL used on symbol that could be accessed directly is "
1318 "invalid. Must match ADDIStocHA8."));
1319
1320 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1321
1322 PPCMCExpr::Specifier VK = getSpecifier(MO);
1323 CodeModel::Model CM =
1324 IsAIX ? getCodeModel(S: *Subtarget, TM, MO) : TM.getCodeModel();
1325 if (!MO.isCPI() || CM == CodeModel::Large)
1326 MOSymbol = lookUpOrCreateTOCEntry(Sym: MOSymbol, Type: getTOCEntryTypeForMO(MO), Spec: VK);
1327
1328 VK = IsAIX ? PPC::S_L : PPC::S_TOC_LO;
1329 const MCExpr *Exp = symbolWithSpecifier(S: MOSymbol, Spec: VK);
1330 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1331 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1332 return;
1333 }
1334 case PPC::ADDItocL:
1335 case PPC::ADDItocL8: {
1336 // Transform %xd = ADDItocL %xs, @sym
1337 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1338
1339 unsigned Op = MI->getOpcode();
1340
1341 // Change the opcode to load address for toc-data.
1342 // ADDItocL is only used for 32-bit toc-data on AIX and will always use LA.
1343 TmpInst.setOpcode(Op == PPC::ADDItocL8 ? (IsAIX ? PPC::LA8 : PPC::ADDI8)
1344 : PPC::LA);
1345
1346 const MachineOperand &MO = MI->getOperand(i: 2);
1347 assert((Op == PPC::ADDItocL8)
1348 ? (MO.isGlobal() || MO.isCPI())
1349 : MO.isGlobal() && "Invalid operand for ADDItocL8.");
1350 assert(!(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1351 "Interposable definitions must use indirect accesses.");
1352
1353 // Map the operand to its corresponding MCSymbol.
1354 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, AP&: *this);
1355
1356 const MCExpr *Exp = MCSymbolRefExpr::create(
1357 Symbol: MOSymbol, specifier: IsAIX ? PPC::S_L : PPC::S_TOC_LO, Ctx&: OutContext);
1358
1359 TmpInst.getOperand(i: 2) = MCOperand::createExpr(Val: Exp);
1360 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1361 return;
1362 }
1363 case PPC::ADDISgotTprelHA: {
1364 // Transform: %xd = ADDISgotTprelHA %x2, @sym
1365 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1366 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1367 const MachineOperand &MO = MI->getOperand(i: 2);
1368 const GlobalValue *GValue = MO.getGlobal();
1369 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1370 const MCExpr *SymGotTprel =
1371 symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_GOT_TPREL_HA);
1372 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDIS8)
1373 .addReg(Reg: MI->getOperand(i: 0).getReg())
1374 .addReg(Reg: MI->getOperand(i: 1).getReg())
1375 .addExpr(Val: SymGotTprel));
1376 return;
1377 }
1378 case PPC::LDgotTprelL:
1379 case PPC::LDgotTprelL32: {
1380 // Transform %xd = LDgotTprelL @sym, %xs
1381 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1382
1383 // Change the opcode to LD.
1384 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ);
1385 const MachineOperand &MO = MI->getOperand(i: 1);
1386 const GlobalValue *GValue = MO.getGlobal();
1387 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1388 const MCExpr *Exp = symbolWithSpecifier(
1389 S: MOSymbol, Spec: IsPPC64 ? PPC::S_GOT_TPREL_LO : PPC::S_GOT_TPREL);
1390 TmpInst.getOperand(i: 1) = MCOperand::createExpr(Val: Exp);
1391 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1392 return;
1393 }
1394
1395 case PPC::PPC32PICGOT: {
1396 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(Name: StringRef("_GLOBAL_OFFSET_TABLE_"));
1397 MCSymbol *GOTRef = OutContext.createTempSymbol();
1398 MCSymbol *NextInstr = OutContext.createTempSymbol();
1399
1400 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::BL)
1401 // FIXME: We would like an efficient form for this, so we don't have to do
1402 // a lot of extra uniquing.
1403 .addExpr(Val: MCSymbolRefExpr::create(Symbol: NextInstr, Ctx&: OutContext)));
1404 const MCExpr *OffsExpr =
1405 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: GOTSymbol, Ctx&: OutContext),
1406 RHS: MCSymbolRefExpr::create(Symbol: GOTRef, Ctx&: OutContext),
1407 Ctx&: OutContext);
1408 OutStreamer->emitLabel(Symbol: GOTRef);
1409 OutStreamer->emitValue(Value: OffsExpr, Size: 4);
1410 OutStreamer->emitLabel(Symbol: NextInstr);
1411 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MFLR)
1412 .addReg(Reg: MI->getOperand(i: 0).getReg()));
1413 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LWZ)
1414 .addReg(Reg: MI->getOperand(i: 1).getReg())
1415 .addImm(Val: 0)
1416 .addReg(Reg: MI->getOperand(i: 0).getReg()));
1417 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADD4)
1418 .addReg(Reg: MI->getOperand(i: 0).getReg())
1419 .addReg(Reg: MI->getOperand(i: 1).getReg())
1420 .addReg(Reg: MI->getOperand(i: 0).getReg()));
1421 return;
1422 }
1423 case PPC::PPC32GOT: {
1424 MCSymbol *GOTSymbol =
1425 OutContext.getOrCreateSymbol(Name: StringRef("_GLOBAL_OFFSET_TABLE_"));
1426 const MCExpr *SymGotTlsL =
1427 MCSpecifierExpr::create(Sym: GOTSymbol, S: PPC::S_LO, Ctx&: OutContext);
1428 const MCExpr *SymGotTlsHA =
1429 MCSpecifierExpr::create(Sym: GOTSymbol, S: PPC::S_HA, Ctx&: OutContext);
1430 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LI)
1431 .addReg(Reg: MI->getOperand(i: 0).getReg())
1432 .addExpr(Val: SymGotTlsL));
1433 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDIS)
1434 .addReg(Reg: MI->getOperand(i: 0).getReg())
1435 .addReg(Reg: MI->getOperand(i: 0).getReg())
1436 .addExpr(Val: SymGotTlsHA));
1437 return;
1438 }
1439 case PPC::ADDIStlsgdHA: {
1440 // Transform: %xd = ADDIStlsgdHA %x2, @sym
1441 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1442 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1443 const MachineOperand &MO = MI->getOperand(i: 2);
1444 const GlobalValue *GValue = MO.getGlobal();
1445 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1446 const MCExpr *SymGotTlsGD =
1447 symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_GOT_TLSGD_HA);
1448 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDIS8)
1449 .addReg(Reg: MI->getOperand(i: 0).getReg())
1450 .addReg(Reg: MI->getOperand(i: 1).getReg())
1451 .addExpr(Val: SymGotTlsGD));
1452 return;
1453 }
1454 case PPC::ADDItlsgdL:
1455 // Transform: %xd = ADDItlsgdL %xs, @sym
1456 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
1457 case PPC::ADDItlsgdL32: {
1458 // Transform: %rd = ADDItlsgdL32 %rs, @sym
1459 // Into: %rd = ADDI %rs, sym@got@tlsgd
1460 const MachineOperand &MO = MI->getOperand(i: 2);
1461 const GlobalValue *GValue = MO.getGlobal();
1462 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1463 const MCExpr *SymGotTlsGD = symbolWithSpecifier(
1464 S: MOSymbol, Spec: IsPPC64 ? PPC::S_GOT_TLSGD_LO : PPC::S_GOT_TLSGD);
1465 EmitToStreamer(S&: *OutStreamer,
1466 Inst: MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1467 .addReg(Reg: MI->getOperand(i: 0).getReg())
1468 .addReg(Reg: MI->getOperand(i: 1).getReg())
1469 .addExpr(Val: SymGotTlsGD));
1470 return;
1471 }
1472 case PPC::GETtlsMOD32AIX:
1473 case PPC::GETtlsMOD64AIX:
1474 // Transform: %r3 = GETtlsMODNNAIX %r3 (for NN == 32/64).
1475 // Into: BLA .__tls_get_mod()
1476 // Input parameter is a module handle (_$TLSML[TC]@ml) for all variables.
1477 case PPC::GETtlsADDR:
1478 // Transform: %x3 = GETtlsADDR %x3, @sym
1479 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
1480 case PPC::GETtlsADDRPCREL:
1481 case PPC::GETtlsADDR32AIX:
1482 case PPC::GETtlsADDR64AIX:
1483 // Transform: %r3 = GETtlsADDRNNAIX %r3, %r4 (for NN == 32/64).
1484 // Into: BLA .__tls_get_addr()
1485 // Unlike on Linux, there is no symbol or relocation needed for this call.
1486 case PPC::GETtlsADDR32: {
1487 // Transform: %r3 = GETtlsADDR32 %r3, @sym
1488 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
1489 emitTlsCall(MI, VK: PPC::S_TLSGD);
1490 return;
1491 }
1492 case PPC::GETtlsTpointer32AIX: {
1493 // Transform: %r3 = GETtlsTpointer32AIX
1494 // Into: BLA .__get_tpointer()
1495 EmitAIXTlsCallHelper(MI);
1496 return;
1497 }
1498 case PPC::ADDIStlsldHA: {
1499 // Transform: %xd = ADDIStlsldHA %x2, @sym
1500 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
1501 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1502 const MachineOperand &MO = MI->getOperand(i: 2);
1503 const GlobalValue *GValue = MO.getGlobal();
1504 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1505 const MCExpr *SymGotTlsLD =
1506 symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_GOT_TLSLD_HA);
1507 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDIS8)
1508 .addReg(Reg: MI->getOperand(i: 0).getReg())
1509 .addReg(Reg: MI->getOperand(i: 1).getReg())
1510 .addExpr(Val: SymGotTlsLD));
1511 return;
1512 }
1513 case PPC::ADDItlsldL:
1514 // Transform: %xd = ADDItlsldL %xs, @sym
1515 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
1516 case PPC::ADDItlsldL32: {
1517 // Transform: %rd = ADDItlsldL32 %rs, @sym
1518 // Into: %rd = ADDI %rs, sym@got@tlsld
1519 const MachineOperand &MO = MI->getOperand(i: 2);
1520 const GlobalValue *GValue = MO.getGlobal();
1521 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1522 const MCExpr *SymGotTlsLD = symbolWithSpecifier(
1523 S: MOSymbol, Spec: IsPPC64 ? PPC::S_GOT_TLSLD_LO : PPC::S_GOT_TLSLD);
1524 EmitToStreamer(S&: *OutStreamer,
1525 Inst: MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1526 .addReg(Reg: MI->getOperand(i: 0).getReg())
1527 .addReg(Reg: MI->getOperand(i: 1).getReg())
1528 .addExpr(Val: SymGotTlsLD));
1529 return;
1530 }
1531 case PPC::GETtlsldADDR:
1532 // Transform: %x3 = GETtlsldADDR %x3, @sym
1533 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
1534 case PPC::GETtlsldADDRPCREL:
1535 case PPC::GETtlsldADDR32: {
1536 // Transform: %r3 = GETtlsldADDR32 %r3, @sym
1537 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
1538 emitTlsCall(MI, VK: PPC::S_TLSLD);
1539 return;
1540 }
1541 case PPC::ADDISdtprelHA:
1542 // Transform: %xd = ADDISdtprelHA %xs, @sym
1543 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
1544 case PPC::ADDISdtprelHA32: {
1545 // Transform: %rd = ADDISdtprelHA32 %rs, @sym
1546 // Into: %rd = ADDIS %rs, sym@dtprel@ha
1547 const MachineOperand &MO = MI->getOperand(i: 2);
1548 const GlobalValue *GValue = MO.getGlobal();
1549 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1550 const MCExpr *SymDtprel = symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_DTPREL_HA);
1551 EmitToStreamer(
1552 S&: *OutStreamer,
1553 Inst: MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS)
1554 .addReg(Reg: MI->getOperand(i: 0).getReg())
1555 .addReg(Reg: MI->getOperand(i: 1).getReg())
1556 .addExpr(Val: SymDtprel));
1557 return;
1558 }
1559 case PPC::PADDIdtprel: {
1560 // Transform: %rd = PADDIdtprel %rs, @sym
1561 // Into: %rd = PADDI8 %rs, sym@dtprel
1562 const MachineOperand &MO = MI->getOperand(i: 2);
1563 const GlobalValue *GValue = MO.getGlobal();
1564 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1565 const MCExpr *SymDtprel = symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_DTPREL);
1566 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::PADDI8)
1567 .addReg(Reg: MI->getOperand(i: 0).getReg())
1568 .addReg(Reg: MI->getOperand(i: 1).getReg())
1569 .addExpr(Val: SymDtprel));
1570 return;
1571 }
1572
1573 case PPC::ADDIdtprelL:
1574 // Transform: %xd = ADDIdtprelL %xs, @sym
1575 // Into: %xd = ADDI8 %xs, sym@dtprel@l
1576 case PPC::ADDIdtprelL32: {
1577 // Transform: %rd = ADDIdtprelL32 %rs, @sym
1578 // Into: %rd = ADDI %rs, sym@dtprel@l
1579 const MachineOperand &MO = MI->getOperand(i: 2);
1580 const GlobalValue *GValue = MO.getGlobal();
1581 MCSymbol *MOSymbol = getSymbol(GV: GValue);
1582 const MCExpr *SymDtprel = symbolWithSpecifier(S: MOSymbol, Spec: PPC::S_DTPREL_LO);
1583 EmitToStreamer(S&: *OutStreamer,
1584 Inst: MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1585 .addReg(Reg: MI->getOperand(i: 0).getReg())
1586 .addReg(Reg: MI->getOperand(i: 1).getReg())
1587 .addExpr(Val: SymDtprel));
1588 return;
1589 }
1590 case PPC::MFOCRF:
1591 case PPC::MFOCRF8:
1592 if (!Subtarget->hasMFOCRF()) {
1593 // Transform: %r3 = MFOCRF %cr7
1594 // Into: %r3 = MFCR ;; cr7
1595 unsigned NewOpcode =
1596 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1597 OutStreamer->AddComment(T: PPCInstPrinter::
1598 getRegisterName(Reg: MI->getOperand(i: 1).getReg()));
1599 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(NewOpcode)
1600 .addReg(Reg: MI->getOperand(i: 0).getReg()));
1601 return;
1602 }
1603 break;
1604 case PPC::MTOCRF:
1605 case PPC::MTOCRF8:
1606 if (!Subtarget->hasMFOCRF()) {
1607 // Transform: %cr7 = MTOCRF %r3
1608 // Into: MTCRF mask, %r3 ;; cr7
1609 unsigned NewOpcode =
1610 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1611 unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1612 ->getEncodingValue(Reg: MI->getOperand(i: 0).getReg());
1613 OutStreamer->AddComment(T: PPCInstPrinter::
1614 getRegisterName(Reg: MI->getOperand(i: 0).getReg()));
1615 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(NewOpcode)
1616 .addImm(Val: Mask)
1617 .addReg(Reg: MI->getOperand(i: 1).getReg()));
1618 return;
1619 }
1620 break;
1621 case PPC::LD:
1622 case PPC::STD:
1623 case PPC::LWA_32:
1624 case PPC::LWA: {
1625 // Verify alignment is legal, so we don't create relocations
1626 // that can't be supported.
1627 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1628 // For non-TOC-based local-exec TLS accesses with non-zero offsets, the
1629 // machine operand (which is a TargetGlobalTLSAddress) is expected to be
1630 // the same operand for both loads and stores.
1631 for (const MachineOperand &TempMO : MI->operands()) {
1632 if (((TempMO.getTargetFlags() == PPCII::MO_TPREL_FLAG ||
1633 TempMO.getTargetFlags() == PPCII::MO_TLSLD_FLAG)) &&
1634 TempMO.getOperandNo() == 1)
1635 OpNum = 1;
1636 }
1637 const MachineOperand &MO = MI->getOperand(i: OpNum);
1638 if (MO.isGlobal()) {
1639 const DataLayout &DL = MO.getGlobal()->getDataLayout();
1640 if (MO.getGlobal()->getPointerAlignment(DL) < 4)
1641 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1642 }
1643 // As these load/stores share common code with the following load/stores,
1644 // fall through to the subsequent cases in order to either process the
1645 // non-TOC-based local-exec sequence or to process the instruction normally.
1646 [[fallthrough]];
1647 }
1648 case PPC::LBZ:
1649 case PPC::LBZ8:
1650 case PPC::LHA:
1651 case PPC::LHA8:
1652 case PPC::LHZ:
1653 case PPC::LHZ8:
1654 case PPC::LWZ:
1655 case PPC::LWZ8:
1656 case PPC::STB:
1657 case PPC::STB8:
1658 case PPC::STH:
1659 case PPC::STH8:
1660 case PPC::STW:
1661 case PPC::STW8:
1662 case PPC::LFS:
1663 case PPC::STFS:
1664 case PPC::LFD:
1665 case PPC::STFD:
1666 case PPC::ADDI8: {
1667 // A faster non-TOC-based local-[exec|dynamic] sequence is represented by
1668 // `addi` or a load/store instruction (that directly loads or stores off of
1669 // the thread pointer) with an immediate operand having the
1670 // [MO_TPREL_FLAG|MO_TLSLD_FLAG]. Such instructions do not otherwise arise.
1671 if (!HasAIXSmallLocalTLS)
1672 break;
1673 bool IsMIADDI8 = MI->getOpcode() == PPC::ADDI8;
1674 unsigned OpNum = IsMIADDI8 ? 2 : 1;
1675 const MachineOperand &MO = MI->getOperand(i: OpNum);
1676 unsigned Flag = MO.getTargetFlags();
1677 if (Flag == PPCII::MO_TPREL_FLAG ||
1678 Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG ||
1679 Flag == PPCII::MO_TPREL_PCREL_FLAG || Flag == PPCII::MO_TLSLD_FLAG) {
1680 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1681
1682 const MCExpr *Expr = getAdjustedFasterLocalExpr(MO, Offset: MO.getOffset());
1683 if (Expr)
1684 TmpInst.getOperand(i: OpNum) = MCOperand::createExpr(Val: Expr);
1685
1686 // Change the opcode to load address if the original opcode is an `addi`.
1687 if (IsMIADDI8)
1688 TmpInst.setOpcode(PPC::LA8);
1689
1690 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1691 return;
1692 }
1693 // Now process the instruction normally.
1694 break;
1695 }
1696 case PPC::PseudoEIEIO: {
1697 EmitToStreamer(
1698 S&: *OutStreamer,
1699 Inst: MCInstBuilder(PPC::ORI).addReg(Reg: PPC::X2).addReg(Reg: PPC::X2).addImm(Val: 0));
1700 EmitToStreamer(
1701 S&: *OutStreamer,
1702 Inst: MCInstBuilder(PPC::ORI).addReg(Reg: PPC::X2).addReg(Reg: PPC::X2).addImm(Val: 0));
1703 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::EnforceIEIO));
1704 return;
1705 }
1706 case PPC::BL8:
1707 case PPC::BL8_NOP: {
1708 const MachineOperand &MO = MI->getOperand(i: 0);
1709 if (MO.isSymbol()) {
1710 StringRef Name = MO.getSymbolName();
1711 Name.consume_front(Prefix: ".");
1712 Name.consume_back(Suffix: "[PR]");
1713 bool IsLWAT = Name == "__lwat_csne_pseudo";
1714 bool IsLDAT = Name == "__ldat_csne_pseudo";
1715 if (IsLWAT || IsLDAT) {
1716 EmitToStreamer(S&: *OutStreamer,
1717 Inst: MCInstBuilder(IsLWAT ? PPC::LWAT : PPC::LDAT)
1718 .addReg(Reg: PPC::X3)
1719 .addReg(Reg: PPC::X3)
1720 .addReg(Reg: PPC::X6)
1721 .addImm(Val: 16));
1722 return;
1723 }
1724 }
1725 break;
1726 }
1727 }
1728
1729 LowerPPCMachineInstrToMCInst(MI, OutMI&: TmpInst, AP&: *this);
1730 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
1731}
1732
1733// For non-TOC-based local-[exec|dynamic] variables that have a non-zero offset,
1734// we need to create a new MCExpr that adds the non-zero offset to the address
1735// of the local-[exec|dynamic] variable that will be used in either an addi,
1736// load or store. However, the final displacement for these instructions must be
1737// between [-32768, 32768), so if the TLS address + its non-zero offset is
1738// greater than 32KB, a new MCExpr is produced to accommodate this situation.
1739const MCExpr *
1740PPCAsmPrinter::getAdjustedFasterLocalExpr(const MachineOperand &MO,
1741 int64_t Offset) {
1742 // Non-zero offsets (for loads, stores or `addi`) require additional handling.
1743 // When the offset is zero, there is no need to create an adjusted MCExpr.
1744 if (!Offset)
1745 return nullptr;
1746
1747 assert(MO.isGlobal() && "Only expecting a global MachineOperand here!");
1748 const GlobalValue *GValue = MO.getGlobal();
1749 TLSModel::Model Model = TM.getTLSModel(GV: GValue);
1750 assert((Model == TLSModel::LocalExec || Model == TLSModel::LocalDynamic) &&
1751 "Only local-[exec|dynamic] accesses are handled!");
1752
1753 bool IsGlobalADeclaration = GValue->isDeclarationForLinker();
1754 // Find the GlobalVariable that corresponds to the particular TLS variable
1755 // in the TLS variable-to-address mapping. All TLS variables should exist
1756 // within this map, with the exception of TLS variables marked as extern.
1757 const auto TLSVarsMapEntryIter = TLSVarsToAddressMapping.find(Key: GValue);
1758 if (TLSVarsMapEntryIter == TLSVarsToAddressMapping.end())
1759 assert(IsGlobalADeclaration &&
1760 "Only expecting to find extern TLS variables not present in the TLS "
1761 "variable-to-address map!");
1762
1763 unsigned TLSVarAddress =
1764 IsGlobalADeclaration ? 0 : TLSVarsMapEntryIter->second;
1765 ptrdiff_t FinalAddress = (TLSVarAddress + Offset);
1766 // If the address of the TLS variable + the offset is less than 32KB,
1767 // or if the TLS variable is extern, we simply produce an MCExpr to add the
1768 // non-zero offset to the TLS variable address.
1769 // For when TLS variables are extern, this is safe to do because we can
1770 // assume that the address of extern TLS variables are zero.
1771 const MCExpr *Expr = MCSymbolRefExpr::create(
1772 Symbol: getSymbol(GV: GValue),
1773 specifier: (Model == TLSModel::LocalExec ? PPC::S_AIX_TLSLE : PPC::S_AIX_TLSLD),
1774 Ctx&: OutContext);
1775 Expr = MCBinaryExpr::createAdd(
1776 LHS: Expr, RHS: MCConstantExpr::create(Value: Offset, Ctx&: OutContext), Ctx&: OutContext);
1777 if (FinalAddress >= 32768) {
1778 // Handle the written offset for cases where:
1779 // TLS variable address + Offset > 32KB.
1780
1781 // The assembly that is printed will look like:
1782 // TLSVar@le + Offset - Delta
1783 // where Delta is a multiple of 64KB: ((FinalAddress + 32768) & ~0xFFFF).
1784 ptrdiff_t Delta = ((FinalAddress + 32768) & ~0xFFFF);
1785 // Check that the total instruction displacement fits within [-32768,32768).
1786 [[maybe_unused]] ptrdiff_t InstDisp = TLSVarAddress + Offset - Delta;
1787 assert(
1788 ((InstDisp < 32768) && (InstDisp >= -32768)) &&
1789 "Expecting the instruction displacement for local-[exec|dynamic] TLS "
1790 "variables to be between [-32768, 32768)!");
1791 Expr = MCBinaryExpr::createAdd(
1792 LHS: Expr, RHS: MCConstantExpr::create(Value: -Delta, Ctx&: OutContext), Ctx&: OutContext);
1793 }
1794
1795 return Expr;
1796}
1797
1798void PPCLinuxAsmPrinter::emitGNUAttributes(Module &M) {
1799 // Emit float ABI into GNU attribute
1800 Metadata *MD = M.getModuleFlag(Key: "float-abi");
1801 MDString *FloatABI = dyn_cast_or_null<MDString>(Val: MD);
1802 if (!FloatABI)
1803 return;
1804 StringRef flt = FloatABI->getString();
1805 // TODO: Support emitting soft-fp and hard double/single attributes.
1806 if (flt == "doubledouble")
1807 OutStreamer->emitGNUAttribute(Tag: Tag_GNU_Power_ABI_FP,
1808 Value: Val_GNU_Power_ABI_HardFloat_DP |
1809 Val_GNU_Power_ABI_LDBL_IBM128);
1810 else if (flt == "ieeequad")
1811 OutStreamer->emitGNUAttribute(Tag: Tag_GNU_Power_ABI_FP,
1812 Value: Val_GNU_Power_ABI_HardFloat_DP |
1813 Val_GNU_Power_ABI_LDBL_IEEE128);
1814 else if (flt == "ieeedouble")
1815 OutStreamer->emitGNUAttribute(Tag: Tag_GNU_Power_ABI_FP,
1816 Value: Val_GNU_Power_ABI_HardFloat_DP |
1817 Val_GNU_Power_ABI_LDBL_64);
1818}
1819
1820void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
1821 if (!Subtarget->isPPC64())
1822 return PPCAsmPrinter::emitInstruction(MI);
1823
1824 switch (MI->getOpcode()) {
1825 default:
1826 break;
1827 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1828 // .begin:
1829 // b .end # lis 0, FuncId[16..32]
1830 // nop # li 0, FuncId[0..15]
1831 // std 0, -8(1)
1832 // mflr 0
1833 // bl __xray_FunctionEntry
1834 // mtlr 0
1835 // .end:
1836 //
1837 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1838 // of instructions change.
1839 // XRAY is only supported on PPC Linux little endian.
1840 const Function &F = MF->getFunction();
1841 unsigned Num = 0;
1842 (void)F.getFnAttribute(Kind: "patchable-function-entry")
1843 .getValueAsString()
1844 .getAsInteger(Radix: 10, Result&: Num);
1845
1846 if (!MAI->isLittleEndian() || Num)
1847 break;
1848 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1849 MCSymbol *EndOfSled = OutContext.createTempSymbol();
1850 OutStreamer->emitLabel(Symbol: BeginOfSled);
1851 EmitToStreamer(S&: *OutStreamer,
1852 Inst: MCInstBuilder(PPC::B).addExpr(
1853 Val: MCSymbolRefExpr::create(Symbol: EndOfSled, Ctx&: OutContext)));
1854 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::NOP));
1855 EmitToStreamer(
1856 S&: *OutStreamer,
1857 Inst: MCInstBuilder(PPC::STD).addReg(Reg: PPC::X0).addImm(Val: -8).addReg(Reg: PPC::X1));
1858 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MFLR8).addReg(Reg: PPC::X0));
1859 EmitToStreamer(S&: *OutStreamer,
1860 Inst: MCInstBuilder(PPC::BL8_NOP)
1861 .addExpr(Val: MCSymbolRefExpr::create(
1862 Symbol: OutContext.getOrCreateSymbol(Name: "__xray_FunctionEntry"),
1863 Ctx&: OutContext)));
1864 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MTLR8).addReg(Reg: PPC::X0));
1865 OutStreamer->emitLabel(Symbol: EndOfSled);
1866 recordSled(Sled: BeginOfSled, MI: *MI, Kind: SledKind::FUNCTION_ENTER, Version: 2);
1867 break;
1868 }
1869 case TargetOpcode::PATCHABLE_RET: {
1870 unsigned RetOpcode = MI->getOperand(i: 0).getImm();
1871 MCInst RetInst;
1872 RetInst.setOpcode(RetOpcode);
1873 for (const auto &MO : llvm::drop_begin(RangeOrContainer: MI->operands())) {
1874 MCOperand MCOp;
1875 if (LowerPPCMachineOperandToMCOperand(MO, OutMO&: MCOp, AP&: *this))
1876 RetInst.addOperand(Op: MCOp);
1877 }
1878
1879 bool IsConditional;
1880 if (RetOpcode == PPC::BCCLR) {
1881 IsConditional = true;
1882 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1883 RetOpcode == PPC::TCRETURNai8) {
1884 break;
1885 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1886 IsConditional = false;
1887 } else {
1888 EmitToStreamer(S&: *OutStreamer, Inst: RetInst);
1889 return;
1890 }
1891
1892 MCSymbol *FallthroughLabel;
1893 if (IsConditional) {
1894 // Before:
1895 // bgtlr cr0
1896 //
1897 // After:
1898 // ble cr0, .end
1899 // .p2align 3
1900 // .begin:
1901 // blr # lis 0, FuncId[16..32]
1902 // nop # li 0, FuncId[0..15]
1903 // std 0, -8(1)
1904 // mflr 0
1905 // bl __xray_FunctionExit
1906 // mtlr 0
1907 // blr
1908 // .end:
1909 //
1910 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1911 // of instructions change.
1912 FallthroughLabel = OutContext.createTempSymbol();
1913 EmitToStreamer(
1914 S&: *OutStreamer,
1915 Inst: MCInstBuilder(PPC::BCC)
1916 .addImm(Val: PPC::InvertPredicate(
1917 Opcode: static_cast<PPC::Predicate>(MI->getOperand(i: 1).getImm())))
1918 .addReg(Reg: MI->getOperand(i: 2).getReg())
1919 .addExpr(Val: MCSymbolRefExpr::create(Symbol: FallthroughLabel, Ctx&: OutContext)));
1920 RetInst = MCInst();
1921 RetInst.setOpcode(PPC::BLR8);
1922 }
1923 // .p2align 3
1924 // .begin:
1925 // b(lr)? # lis 0, FuncId[16..32]
1926 // nop # li 0, FuncId[0..15]
1927 // std 0, -8(1)
1928 // mflr 0
1929 // bl __xray_FunctionExit
1930 // mtlr 0
1931 // b(lr)?
1932 //
1933 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1934 // of instructions change.
1935 OutStreamer->emitCodeAlignment(Alignment: Align(8), STI: &getSubtargetInfo());
1936 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1937 OutStreamer->emitLabel(Symbol: BeginOfSled);
1938 EmitToStreamer(S&: *OutStreamer, Inst: RetInst);
1939 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::NOP));
1940 EmitToStreamer(
1941 S&: *OutStreamer,
1942 Inst: MCInstBuilder(PPC::STD).addReg(Reg: PPC::X0).addImm(Val: -8).addReg(Reg: PPC::X1));
1943 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MFLR8).addReg(Reg: PPC::X0));
1944 EmitToStreamer(S&: *OutStreamer,
1945 Inst: MCInstBuilder(PPC::BL8_NOP)
1946 .addExpr(Val: MCSymbolRefExpr::create(
1947 Symbol: OutContext.getOrCreateSymbol(Name: "__xray_FunctionExit"),
1948 Ctx&: OutContext)));
1949 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::MTLR8).addReg(Reg: PPC::X0));
1950 EmitToStreamer(S&: *OutStreamer, Inst: RetInst);
1951 if (IsConditional)
1952 OutStreamer->emitLabel(Symbol: FallthroughLabel);
1953 recordSled(Sled: BeginOfSled, MI: *MI, Kind: SledKind::FUNCTION_EXIT, Version: 2);
1954 return;
1955 }
1956 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1957 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1958 case TargetOpcode::PATCHABLE_TAIL_CALL:
1959 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1960 // normal function exit from a tail exit.
1961 llvm_unreachable("Tail call is handled in the normal case. See comments "
1962 "around this assert.");
1963 }
1964 return PPCAsmPrinter::emitInstruction(MI);
1965}
1966
1967void PPCLinuxAsmPrinter::emitStartOfAsmFile(Module &M) {
1968 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1969 PPCTargetStreamer *TS =
1970 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1971 TS->emitAbiVersion(AbiVersion: 2);
1972 }
1973
1974 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1975 !isPositionIndependent())
1976 return AsmPrinter::emitStartOfAsmFile(M);
1977
1978 if (M.getPICLevel() == PICLevel::SmallPIC)
1979 return AsmPrinter::emitStartOfAsmFile(M);
1980
1981 OutStreamer->switchSection(Section: OutContext.getELFSection(
1982 Section: ".got2", Type: ELF::SHT_PROGBITS, Flags: ELF::SHF_WRITE | ELF::SHF_ALLOC));
1983
1984 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Name: Twine(".LTOC"));
1985 MCSymbol *CurrentPos = OutContext.createTempSymbol();
1986
1987 OutStreamer->emitLabel(Symbol: CurrentPos);
1988
1989 // The GOT pointer points to the middle of the GOT, in order to reference the
1990 // entire 64kB range. 0x8000 is the midpoint.
1991 const MCExpr *tocExpr =
1992 MCBinaryExpr::createAdd(LHS: MCSymbolRefExpr::create(Symbol: CurrentPos, Ctx&: OutContext),
1993 RHS: MCConstantExpr::create(Value: 0x8000, Ctx&: OutContext),
1994 Ctx&: OutContext);
1995
1996 OutStreamer->emitAssignment(Symbol: TOCSym, Value: tocExpr);
1997
1998 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
1999}
2000
2001void PPCLinuxAsmPrinter::emitFunctionEntryLabel() {
2002 // linux/ppc32 - Normal entry label.
2003 if (!Subtarget->isPPC64() &&
2004 (!isPositionIndependent() ||
2005 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
2006 return AsmPrinter::emitFunctionEntryLabel();
2007
2008 if (!Subtarget->isPPC64()) {
2009 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2010 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
2011 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(MF&: *MF);
2012 MCSymbol *PICBase = MF->getPICBaseSymbol();
2013 OutStreamer->emitLabel(Symbol: RelocSymbol);
2014
2015 const MCExpr *OffsExpr =
2016 MCBinaryExpr::createSub(
2017 LHS: MCSymbolRefExpr::create(Symbol: OutContext.getOrCreateSymbol(Name: Twine(".LTOC")),
2018 Ctx&: OutContext),
2019 RHS: MCSymbolRefExpr::create(Symbol: PICBase, Ctx&: OutContext),
2020 Ctx&: OutContext);
2021 OutStreamer->emitValue(Value: OffsExpr, Size: 4);
2022 OutStreamer->emitLabel(Symbol: CurrentFnSym);
2023 return;
2024 } else
2025 return AsmPrinter::emitFunctionEntryLabel();
2026 }
2027
2028 // ELFv2 ABI - Normal entry label.
2029 if (Subtarget->isELFv2ABI()) {
2030 // In the Large code model, we allow arbitrary displacements between
2031 // the text section and its associated TOC section. We place the
2032 // full 8-byte offset to the TOC in memory immediately preceding
2033 // the function global entry point.
2034 if (TM.getCodeModel() == CodeModel::Large
2035 && !MF->getRegInfo().use_empty(RegNo: PPC::X2)) {
2036 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2037
2038 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(Name: StringRef(".TOC."));
2039 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(MF&: *MF);
2040 const MCExpr *TOCDeltaExpr =
2041 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: TOCSymbol, Ctx&: OutContext),
2042 RHS: MCSymbolRefExpr::create(Symbol: GlobalEPSymbol,
2043 Ctx&: OutContext),
2044 Ctx&: OutContext);
2045
2046 OutStreamer->emitLabel(Symbol: PPCFI->getTOCOffsetSymbol(MF&: *MF));
2047 OutStreamer->emitValue(Value: TOCDeltaExpr, Size: 8);
2048 }
2049 return AsmPrinter::emitFunctionEntryLabel();
2050 }
2051
2052 // Emit an official procedure descriptor.
2053 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2054 MCSectionELF *Section = OutStreamer->getContext().getELFSection(
2055 Section: ".opd", Type: ELF::SHT_PROGBITS, Flags: ELF::SHF_WRITE | ELF::SHF_ALLOC);
2056 OutStreamer->switchSection(Section);
2057 OutStreamer->emitLabel(Symbol: CurrentFnSym);
2058 OutStreamer->emitValueToAlignment(Alignment: Align(8));
2059 MCSymbol *Symbol1 = CurrentFnSymForSize;
2060 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
2061 // entry point.
2062 OutStreamer->emitValue(Value: MCSymbolRefExpr::create(Symbol: Symbol1, Ctx&: OutContext),
2063 Size: 8 /*size*/);
2064 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(Name: StringRef(".TOC."));
2065 // Generates a R_PPC64_TOC relocation for TOC base insertion.
2066 OutStreamer->emitValue(
2067 Value: MCSymbolRefExpr::create(Symbol: Symbol2, specifier: PPC::S_TOCBASE, Ctx&: OutContext), Size: 8 /*size*/);
2068 // Emit a null environment pointer.
2069 OutStreamer->emitIntValue(Value: 0, Size: 8 /* size */);
2070 OutStreamer->switchSection(Section: Current.first, Subsec: Current.second);
2071}
2072
2073void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) {
2074 const DataLayout &DL = getDataLayout();
2075
2076 bool isPPC64 = DL.getPointerSizeInBits() == 64;
2077
2078 PPCTargetStreamer *TS =
2079 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2080
2081 // If we are using any values provided by Glibc at fixed addresses,
2082 // we need to ensure that the Glibc used at link time actually provides
2083 // those values. All versions of Glibc that do will define the symbol
2084 // named "__parse_hwcap_and_convert_at_platform".
2085 if (static_cast<const PPCTargetMachine &>(TM).hasGlibcHWCAPAccess())
2086 OutStreamer->emitSymbolValue(
2087 Sym: GetExternalSymbolSymbol(Sym: "__parse_hwcap_and_convert_at_platform"),
2088 Size: MAI->getCodePointerSize());
2089 emitGNUAttributes(M);
2090
2091 if (!TOC.empty()) {
2092 const char *Name = isPPC64 ? ".toc" : ".got2";
2093 MCSectionELF *Section = OutContext.getELFSection(
2094 Section: Name, Type: ELF::SHT_PROGBITS, Flags: ELF::SHF_WRITE | ELF::SHF_ALLOC);
2095 OutStreamer->switchSection(Section);
2096 if (!isPPC64)
2097 OutStreamer->emitValueToAlignment(Alignment: Align(4));
2098
2099 for (const auto &TOCMapPair : TOC) {
2100 const MCSymbol *const TOCEntryTarget = TOCMapPair.first.first;
2101 MCSymbol *const TOCEntryLabel = TOCMapPair.second;
2102
2103 OutStreamer->emitLabel(Symbol: TOCEntryLabel);
2104 if (isPPC64)
2105 TS->emitTCEntry(S: *TOCEntryTarget, Kind: TOCMapPair.first.second);
2106 else
2107 OutStreamer->emitSymbolValue(Sym: TOCEntryTarget, Size: 4);
2108 }
2109 }
2110
2111 PPCAsmPrinter::emitEndOfAsmFile(M);
2112}
2113
2114/// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
2115void PPCLinuxAsmPrinter::emitFunctionBodyStart() {
2116 // In the ELFv2 ABI, in functions that use the TOC register, we need to
2117 // provide two entry points. The ABI guarantees that when calling the
2118 // local entry point, r2 is set up by the caller to contain the TOC base
2119 // for this function, and when calling the global entry point, r12 is set
2120 // up by the caller to hold the address of the global entry point. We
2121 // thus emit a prefix sequence along the following lines:
2122 //
2123 // func:
2124 // .Lfunc_gepNN:
2125 // # global entry point
2126 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
2127 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
2128 // .Lfunc_lepNN:
2129 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2130 // # local entry point, followed by function body
2131 //
2132 // For the Large code model, we create
2133 //
2134 // .Lfunc_tocNN:
2135 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
2136 // func:
2137 // .Lfunc_gepNN:
2138 // # global entry point
2139 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
2140 // add r2,r2,r12
2141 // .Lfunc_lepNN:
2142 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2143 // # local entry point, followed by function body
2144 //
2145 // This ensures we have r2 set up correctly while executing the function
2146 // body, no matter which entry point is called.
2147 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2148 const bool UsesX2OrR2 = !MF->getRegInfo().use_empty(RegNo: PPC::X2) ||
2149 !MF->getRegInfo().use_empty(RegNo: PPC::R2);
2150 const bool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() &&
2151 UsesX2OrR2 && PPCFI->usesTOCBasePtr();
2152 const bool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() &&
2153 Subtarget->isELFv2ABI() && UsesX2OrR2;
2154
2155 // Only do all that if the function uses R2 as the TOC pointer
2156 // in the first place. We don't need the global entry point if the
2157 // function uses R2 as an allocatable register.
2158 if (NonPCrelGEPRequired || PCrelGEPRequired) {
2159 // Note: The logic here must be synchronized with the code in the
2160 // branch-selection pass which sets the offset of the first block in the
2161 // function. This matters because it affects the alignment.
2162 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(MF&: *MF);
2163 OutStreamer->emitLabel(Symbol: GlobalEntryLabel);
2164 const MCSymbolRefExpr *GlobalEntryLabelExp =
2165 MCSymbolRefExpr::create(Symbol: GlobalEntryLabel, Ctx&: OutContext);
2166
2167 if (TM.getCodeModel() != CodeModel::Large) {
2168 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(Name: StringRef(".TOC."));
2169 const MCExpr *TOCDeltaExpr =
2170 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: TOCSymbol, Ctx&: OutContext),
2171 RHS: GlobalEntryLabelExp, Ctx&: OutContext);
2172
2173 const MCExpr *TOCDeltaHi =
2174 MCSpecifierExpr::create(Expr: TOCDeltaExpr, S: PPC::S_HA, Ctx&: OutContext);
2175 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDIS)
2176 .addReg(Reg: PPC::X2)
2177 .addReg(Reg: PPC::X12)
2178 .addExpr(Val: TOCDeltaHi));
2179
2180 const MCExpr *TOCDeltaLo =
2181 MCSpecifierExpr::create(Expr: TOCDeltaExpr, S: PPC::S_LO, Ctx&: OutContext);
2182 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADDI)
2183 .addReg(Reg: PPC::X2)
2184 .addReg(Reg: PPC::X2)
2185 .addExpr(Val: TOCDeltaLo));
2186 } else {
2187 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(MF&: *MF);
2188 const MCExpr *TOCOffsetDeltaExpr =
2189 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: TOCOffset, Ctx&: OutContext),
2190 RHS: GlobalEntryLabelExp, Ctx&: OutContext);
2191
2192 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::LD)
2193 .addReg(Reg: PPC::X2)
2194 .addExpr(Val: TOCOffsetDeltaExpr)
2195 .addReg(Reg: PPC::X12));
2196 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(PPC::ADD8)
2197 .addReg(Reg: PPC::X2)
2198 .addReg(Reg: PPC::X2)
2199 .addReg(Reg: PPC::X12));
2200 }
2201
2202 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(MF&: *MF);
2203 OutStreamer->emitLabel(Symbol: LocalEntryLabel);
2204 const MCSymbolRefExpr *LocalEntryLabelExp =
2205 MCSymbolRefExpr::create(Symbol: LocalEntryLabel, Ctx&: OutContext);
2206 const MCExpr *LocalOffsetExp =
2207 MCBinaryExpr::createSub(LHS: LocalEntryLabelExp,
2208 RHS: GlobalEntryLabelExp, Ctx&: OutContext);
2209
2210 PPCTargetStreamer *TS =
2211 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2212 TS->emitLocalEntry(S: static_cast<MCSymbolELF *>(CurrentFnSym),
2213 LocalOffset: LocalOffsetExp);
2214 } else if (Subtarget->isUsingPCRelativeCalls()) {
2215 // When generating the entry point for a function we have a few scenarios
2216 // based on whether or not that function uses R2 and whether or not that
2217 // function makes calls (or is a leaf function).
2218 // 1) A leaf function that does not use R2 (or treats it as callee-saved
2219 // and preserves it). In this case st_other=0 and both
2220 // the local and global entry points for the function are the same.
2221 // No special entry point code is required.
2222 // 2) A function uses the TOC pointer R2. This function may or may not have
2223 // calls. In this case st_other=[2,6] and the global and local entry
2224 // points are different. Code to correctly setup the TOC pointer in R2
2225 // is put between the global and local entry points. This case is
2226 // covered by the if statatement above.
2227 // 3) A function does not use the TOC pointer R2 but does have calls.
2228 // In this case st_other=1 since we do not know whether or not any
2229 // of the callees clobber R2. This case is dealt with in this else if
2230 // block. Tail calls are considered calls and the st_other should also
2231 // be set to 1 in that case as well.
2232 // 4) The function does not use the TOC pointer but R2 is used inside
2233 // the function. In this case st_other=1 once again.
2234 // 5) This function uses inline asm. We mark R2 as reserved if the function
2235 // has inline asm as we have to assume that it may be used.
2236 if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() ||
2237 MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) {
2238 PPCTargetStreamer *TS =
2239 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2240 TS->emitLocalEntry(S: static_cast<MCSymbolELF *>(CurrentFnSym),
2241 LocalOffset: MCConstantExpr::create(Value: 1, Ctx&: OutContext));
2242 }
2243 }
2244}
2245
2246/// EmitFunctionBodyEnd - Print the traceback table before the .size
2247/// directive.
2248///
2249void PPCLinuxAsmPrinter::emitFunctionBodyEnd() {
2250 // Only the 64-bit target requires a traceback table. For now,
2251 // we only emit the word of zeroes that GDB requires to find
2252 // the end of the function, and zeroes for the eight-byte
2253 // mandatory fields.
2254 // FIXME: We should fill in the eight-byte mandatory fields as described in
2255 // the PPC64 ELF ABI (this is a low-priority item because GDB does not
2256 // currently make use of these fields).
2257 if (Subtarget->isPPC64()) {
2258 OutStreamer->emitIntValue(Value: 0, Size: 4/*size*/);
2259 OutStreamer->emitIntValue(Value: 0, Size: 8/*size*/);
2260 }
2261}
2262
2263char PPCLinuxAsmPrinter::ID = 0;
2264
2265INITIALIZE_PASS(PPCLinuxAsmPrinter, "ppc-linux-asm-printer",
2266 "Linux PPC Assembly Printer", false, false)
2267
2268void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
2269 MCSymbol *GVSym) const {
2270 MCSymbolAttr LinkageAttr = MCSA_Invalid;
2271 switch (GV->getLinkage()) {
2272 case GlobalValue::ExternalLinkage:
2273 LinkageAttr = GV->isDeclaration() ? MCSA_Extern : MCSA_Global;
2274 break;
2275 case GlobalValue::LinkOnceAnyLinkage:
2276 case GlobalValue::LinkOnceODRLinkage:
2277 case GlobalValue::WeakAnyLinkage:
2278 case GlobalValue::WeakODRLinkage:
2279 case GlobalValue::ExternalWeakLinkage:
2280 LinkageAttr = MCSA_Weak;
2281 break;
2282 case GlobalValue::AvailableExternallyLinkage:
2283 LinkageAttr = MCSA_Extern;
2284 break;
2285 case GlobalValue::PrivateLinkage:
2286 return;
2287 case GlobalValue::InternalLinkage:
2288 assert(GV->getVisibility() == GlobalValue::DefaultVisibility &&
2289 "InternalLinkage should not have other visibility setting.");
2290 LinkageAttr = MCSA_LGlobal;
2291 break;
2292 case GlobalValue::AppendingLinkage:
2293 llvm_unreachable("Should never emit this");
2294 case GlobalValue::CommonLinkage:
2295 llvm_unreachable("CommonLinkage of XCOFF should not come to this path");
2296 }
2297
2298 assert(LinkageAttr != MCSA_Invalid && "LinkageAttr should not MCSA_Invalid.");
2299
2300 MCSymbolAttr VisibilityAttr = MCSA_Invalid;
2301 if (!TM.getIgnoreXCOFFVisibility()) {
2302 if (GV->hasDLLExportStorageClass() && !GV->hasDefaultVisibility())
2303 report_fatal_error(
2304 reason: "Cannot not be both dllexport and non-default visibility");
2305 switch (GV->getVisibility()) {
2306
2307 // TODO: "internal" Visibility needs to go here.
2308 case GlobalValue::DefaultVisibility:
2309 if (GV->hasDLLExportStorageClass())
2310 VisibilityAttr = MAI->getExportedVisibilityAttr();
2311 break;
2312 case GlobalValue::HiddenVisibility:
2313 VisibilityAttr = MAI->getHiddenVisibilityAttr();
2314 break;
2315 case GlobalValue::ProtectedVisibility:
2316 VisibilityAttr = MAI->getProtectedVisibilityAttr();
2317 break;
2318 }
2319 }
2320
2321 // Do not emit the _$TLSML symbol.
2322 if (GV->getThreadLocalMode() == GlobalVariable::LocalDynamicTLSModel &&
2323 GV->hasName() && GV->getName() == "_$TLSML")
2324 return;
2325
2326 OutStreamer->emitXCOFFSymbolLinkageWithVisibility(Symbol: GVSym, Linkage: LinkageAttr,
2327 Visibility: VisibilityAttr);
2328}
2329
2330void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {
2331 // Setup CurrentFnDescSym and its containing csect.
2332 auto *FnDescSec = static_cast<MCSectionXCOFF *>(
2333 getObjFileLowering().getSectionForFunctionDescriptor(F: &MF.getFunction(),
2334 TM));
2335 FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4));
2336
2337 CurrentFnDescSym = FnDescSec->getQualNameSymbol();
2338
2339 return AsmPrinter::SetupMachineFunction(MF);
2340}
2341
2342uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() {
2343 // Calculate the number of VRs be saved.
2344 // Vector registers 20 through 31 are marked as reserved and cannot be used
2345 // in the default ABI.
2346 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
2347 if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&
2348 TM.getAIXExtendedAltivecABI()) {
2349 const MachineRegisterInfo &MRI = MF->getRegInfo();
2350 for (unsigned Reg = PPC::V20; Reg <= PPC::V31; ++Reg)
2351 if (MRI.isPhysRegModified(PhysReg: Reg))
2352 // Number of VRs saved.
2353 return PPC::V31 - Reg + 1;
2354 }
2355 return 0;
2356}
2357
2358void PPCAIXAsmPrinter::emitFunctionBodyEnd() {
2359
2360 if (!TM.getXCOFFTracebackTable())
2361 return;
2362
2363 emitTracebackTable();
2364
2365 // If ShouldEmitEHBlock returns true, then the eh info table
2366 // will be emitted via `AIXException::endFunction`. Otherwise, we
2367 // need to emit a dumy eh info table when VRs are saved. We could not
2368 // consolidate these two places into one because there is no easy way
2369 // to access register information in `AIXException` class.
2370 if (!TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) &&
2371 (getNumberOfVRSaved() > 0)) {
2372 // Emit dummy EH Info Table.
2373 OutStreamer->switchSection(Section: getObjFileLowering().getCompactUnwindSection());
2374 MCSymbol *EHInfoLabel =
2375 TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF);
2376 OutStreamer->emitLabel(Symbol: EHInfoLabel);
2377
2378 // Version number.
2379 OutStreamer->emitInt32(Value: 0);
2380
2381 const DataLayout &DL = MMI->getModule()->getDataLayout();
2382 const unsigned PointerSize = DL.getPointerSize();
2383 // Add necessary paddings in 64 bit mode.
2384 OutStreamer->emitValueToAlignment(Alignment: Align(PointerSize));
2385
2386 OutStreamer->emitIntValue(Value: 0, Size: PointerSize);
2387 OutStreamer->emitIntValue(Value: 0, Size: PointerSize);
2388 OutStreamer->switchSection(Section: MF->getSection());
2389 }
2390}
2391
2392void PPCAIXAsmPrinter::emitTracebackTable() {
2393
2394 // Create a symbol for the end of function.
2395 MCSymbol *FuncEnd = createTempSymbol(Name: MF->getName());
2396 OutStreamer->emitLabel(Symbol: FuncEnd);
2397
2398 OutStreamer->AddComment(T: "Traceback table begin");
2399 // Begin with a fullword of zero.
2400 OutStreamer->emitIntValueInHexWithPadding(Value: 0, Size: 4 /*size*/);
2401
2402 SmallString<128> CommentString;
2403 raw_svector_ostream CommentOS(CommentString);
2404
2405 auto EmitComment = [&]() {
2406 OutStreamer->AddComment(T: CommentOS.str());
2407 CommentString.clear();
2408 };
2409
2410 auto EmitCommentAndValue = [&](uint64_t Value, int Size) {
2411 EmitComment();
2412 OutStreamer->emitIntValueInHexWithPadding(Value, Size);
2413 };
2414
2415 unsigned int Version = 0;
2416 CommentOS << "Version = " << Version;
2417 EmitCommentAndValue(Version, 1);
2418
2419 // There is a lack of information in the IR to assist with determining the
2420 // source language. AIX exception handling mechanism would only search for
2421 // personality routine and LSDA area when such language supports exception
2422 // handling. So to be conservatively correct and allow runtime to do its job,
2423 // we need to set it to C++ for now.
2424 TracebackTable::LanguageID LanguageIdentifier =
2425 TracebackTable::CPlusPlus; // C++
2426
2427 CommentOS << "Language = "
2428 << getNameForTracebackTableLanguageId(LangId: LanguageIdentifier);
2429 EmitCommentAndValue(LanguageIdentifier, 1);
2430
2431 // This is only populated for the third and fourth bytes.
2432 uint32_t FirstHalfOfMandatoryField = 0;
2433
2434 // Emit the 3rd byte of the mandatory field.
2435
2436 // We always set traceback offset bit to true.
2437 FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask;
2438
2439 const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
2440 const MachineRegisterInfo &MRI = MF->getRegInfo();
2441
2442 // Check the function uses floating-point processor instructions or not
2443 for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) {
2444 if (MRI.isPhysRegUsed(PhysReg: Reg, /* SkipRegMaskTest */ true)) {
2445 FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask;
2446 break;
2447 }
2448 }
2449
2450#define GENBOOLCOMMENT(Prefix, V, Field) \
2451 CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \
2452 << #Field
2453
2454#define GENVALUECOMMENT(PrefixAndName, V, Field) \
2455 CommentOS << (PrefixAndName) << " = " \
2456 << static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \
2457 (TracebackTable::Field##Shift))
2458
2459 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobalLinkage);
2460 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue);
2461 EmitComment();
2462
2463 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset);
2464 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure);
2465 EmitComment();
2466
2467 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage);
2468 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless);
2469 EmitComment();
2470
2471 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent);
2472 EmitComment();
2473 GENBOOLCOMMENT("", FirstHalfOfMandatoryField,
2474 IsFloatingPointOperationLogOrAbortEnabled);
2475 EmitComment();
2476
2477 OutStreamer->emitIntValueInHexWithPadding(
2478 Value: (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, Size: 1);
2479
2480 // Set the 4th byte of the mandatory field.
2481 FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask;
2482
2483 const PPCRegisterInfo *RegInfo = Subtarget->getRegisterInfo();
2484 Register FrameReg = RegInfo->getFrameRegister(MF: *MF);
2485 if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
2486 FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask;
2487
2488 const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
2489 if (!MustSaveCRs.empty())
2490 FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask;
2491
2492 if (FI->mustSaveLR())
2493 FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask;
2494
2495 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler);
2496 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent);
2497 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed);
2498 EmitComment();
2499 GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField,
2500 OnConditionDirective);
2501 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved);
2502 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved);
2503 EmitComment();
2504 OutStreamer->emitIntValueInHexWithPadding(Value: (FirstHalfOfMandatoryField & 0xff),
2505 Size: 1);
2506
2507 // Set the 5th byte of mandatory field.
2508 uint32_t SecondHalfOfMandatoryField = 0;
2509
2510 SecondHalfOfMandatoryField |= MF->getFrameInfo().getStackSize()
2511 ? TracebackTable::IsBackChainStoredMask
2512 : 0;
2513
2514 uint32_t FPRSaved = 0;
2515 for (unsigned Reg = PPC::F14; Reg <= PPC::F31; ++Reg) {
2516 if (MRI.isPhysRegModified(PhysReg: Reg)) {
2517 FPRSaved = PPC::F31 - Reg + 1;
2518 break;
2519 }
2520 }
2521 SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) &
2522 TracebackTable::FPRSavedMask;
2523 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored);
2524 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup);
2525 GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved);
2526 EmitComment();
2527 OutStreamer->emitIntValueInHexWithPadding(
2528 Value: (SecondHalfOfMandatoryField & 0xff000000) >> 24, Size: 1);
2529
2530 // Set the 6th byte of mandatory field.
2531
2532 // Check whether has Vector Instruction,We only treat instructions uses vector
2533 // register as vector instructions.
2534 bool HasVectorInst = false;
2535 for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg)
2536 if (MRI.isPhysRegUsed(PhysReg: Reg, /* SkipRegMaskTest */ true)) {
2537 // Has VMX instruction.
2538 HasVectorInst = true;
2539 break;
2540 }
2541
2542 if (FI->hasVectorParms() || HasVectorInst)
2543 SecondHalfOfMandatoryField |= TracebackTable::HasVectorInfoMask;
2544
2545 uint16_t NumOfVRSaved = getNumberOfVRSaved();
2546 bool ShouldEmitEHBlock =
2547 TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) || NumOfVRSaved > 0;
2548
2549 if (ShouldEmitEHBlock)
2550 SecondHalfOfMandatoryField |= TracebackTable::HasExtensionTableMask;
2551
2552 uint32_t GPRSaved = 0;
2553
2554 // X13 is reserved under 64-bit environment.
2555 unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
2556 unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
2557
2558 for (unsigned Reg = GPRBegin; Reg <= GPREnd; ++Reg) {
2559 if (MRI.isPhysRegModified(PhysReg: Reg)) {
2560 GPRSaved = GPREnd - Reg + 1;
2561 break;
2562 }
2563 }
2564
2565 SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) &
2566 TracebackTable::GPRSavedMask;
2567
2568 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable);
2569 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo);
2570 GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved);
2571 EmitComment();
2572 OutStreamer->emitIntValueInHexWithPadding(
2573 Value: (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, Size: 1);
2574
2575 // Set the 7th byte of mandatory field.
2576 uint32_t NumberOfFixedParms = FI->getFixedParmsNum();
2577 SecondHalfOfMandatoryField |=
2578 (NumberOfFixedParms << TracebackTable::NumberOfFixedParmsShift) &
2579 TracebackTable::NumberOfFixedParmsMask;
2580 GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField,
2581 NumberOfFixedParms);
2582 EmitComment();
2583 OutStreamer->emitIntValueInHexWithPadding(
2584 Value: (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, Size: 1);
2585
2586 // Set the 8th byte of mandatory field.
2587
2588 // Always set parameter on stack.
2589 SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask;
2590
2591 uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum();
2592 SecondHalfOfMandatoryField |=
2593 (NumberOfFPParms << TracebackTable::NumberOfFloatingPointParmsShift) &
2594 TracebackTable::NumberOfFloatingPointParmsMask;
2595
2596 GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField,
2597 NumberOfFloatingPointParms);
2598 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack);
2599 EmitComment();
2600 OutStreamer->emitIntValueInHexWithPadding(Value: SecondHalfOfMandatoryField & 0xff,
2601 Size: 1);
2602
2603 // Generate the optional fields of traceback table.
2604
2605 // Parameter type.
2606 if (NumberOfFixedParms || NumberOfFPParms) {
2607 uint32_t ParmsTypeValue = FI->getParmsType();
2608
2609 Expected<SmallString<32>> ParmsType =
2610 FI->hasVectorParms()
2611 ? XCOFF::parseParmsTypeWithVecInfo(
2612 Value: ParmsTypeValue, FixedParmsNum: NumberOfFixedParms, FloatingParmsNum: NumberOfFPParms,
2613 VectorParmsNum: FI->getVectorParmsNum())
2614 : XCOFF::parseParmsType(Value: ParmsTypeValue, FixedParmsNum: NumberOfFixedParms,
2615 FloatingParmsNum: NumberOfFPParms);
2616
2617 assert(ParmsType && toString(ParmsType.takeError()).c_str());
2618 if (ParmsType) {
2619 CommentOS << "Parameter type = " << ParmsType.get();
2620 EmitComment();
2621 }
2622 OutStreamer->emitIntValueInHexWithPadding(Value: ParmsTypeValue,
2623 Size: sizeof(ParmsTypeValue));
2624 }
2625 // Traceback table offset.
2626 OutStreamer->AddComment(T: "Function size");
2627 if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) {
2628 MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol(
2629 Func: &(MF->getFunction()), TM);
2630 OutStreamer->emitAbsoluteSymbolDiff(Hi: FuncEnd, Lo: FuncSectSym, Size: 4);
2631 }
2632
2633 // Since we unset the Int_Handler.
2634 if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask)
2635 report_fatal_error(reason: "Hand_Mask not implement yet");
2636
2637 if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask)
2638 report_fatal_error(reason: "Ctl_Info not implement yet");
2639
2640 if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) {
2641 StringRef Name = MF->getName().substr(Start: 0, INT16_MAX);
2642 int16_t NameLength = Name.size();
2643 CommentOS << "Function name len = "
2644 << static_cast<unsigned int>(NameLength);
2645 EmitCommentAndValue(NameLength, 2);
2646 OutStreamer->AddComment(T: "Function Name");
2647 OutStreamer->emitBytes(Data: Name);
2648 }
2649
2650 if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) {
2651 uint8_t AllocReg = XCOFF::AllocRegNo;
2652 OutStreamer->AddComment(T: "AllocaUsed");
2653 OutStreamer->emitIntValueInHex(Value: AllocReg, Size: sizeof(AllocReg));
2654 }
2655
2656 if (SecondHalfOfMandatoryField & TracebackTable::HasVectorInfoMask) {
2657 uint16_t VRData = 0;
2658 if (NumOfVRSaved) {
2659 // Number of VRs saved.
2660 VRData |= (NumOfVRSaved << TracebackTable::NumberOfVRSavedShift) &
2661 TracebackTable::NumberOfVRSavedMask;
2662 // This bit is supposed to set only when the special register
2663 // VRSAVE is saved on stack.
2664 // However, IBM XL compiler sets the bit when any vector registers
2665 // are saved on the stack. We will follow XL's behavior on AIX
2666 // so that we don't get surprise behavior change for C code.
2667 VRData |= TracebackTable::IsVRSavedOnStackMask;
2668 }
2669
2670 // Set has_varargs.
2671 if (FI->getVarArgsFrameIndex())
2672 VRData |= TracebackTable::HasVarArgsMask;
2673
2674 // Vector parameters number.
2675 unsigned VectorParmsNum = FI->getVectorParmsNum();
2676 VRData |= (VectorParmsNum << TracebackTable::NumberOfVectorParmsShift) &
2677 TracebackTable::NumberOfVectorParmsMask;
2678
2679 if (HasVectorInst)
2680 VRData |= TracebackTable::HasVMXInstructionMask;
2681
2682 GENVALUECOMMENT("NumOfVRsSaved", VRData, NumberOfVRSaved);
2683 GENBOOLCOMMENT(", ", VRData, IsVRSavedOnStack);
2684 GENBOOLCOMMENT(", ", VRData, HasVarArgs);
2685 EmitComment();
2686 OutStreamer->emitIntValueInHexWithPadding(Value: (VRData & 0xff00) >> 8, Size: 1);
2687
2688 GENVALUECOMMENT("NumOfVectorParams", VRData, NumberOfVectorParms);
2689 GENBOOLCOMMENT(", ", VRData, HasVMXInstruction);
2690 EmitComment();
2691 OutStreamer->emitIntValueInHexWithPadding(Value: VRData & 0x00ff, Size: 1);
2692
2693 uint32_t VecParmTypeValue = FI->getVecExtParmsType();
2694
2695 Expected<SmallString<32>> VecParmsType =
2696 XCOFF::parseVectorParmsType(Value: VecParmTypeValue, ParmsNum: VectorParmsNum);
2697 assert(VecParmsType && toString(VecParmsType.takeError()).c_str());
2698 if (VecParmsType) {
2699 CommentOS << "Vector Parameter type = " << VecParmsType.get();
2700 EmitComment();
2701 }
2702 OutStreamer->emitIntValueInHexWithPadding(Value: VecParmTypeValue,
2703 Size: sizeof(VecParmTypeValue));
2704 // Padding 2 bytes.
2705 CommentOS << "Padding";
2706 EmitCommentAndValue(0, 2);
2707 }
2708
2709 uint8_t ExtensionTableFlag = 0;
2710 if (SecondHalfOfMandatoryField & TracebackTable::HasExtensionTableMask) {
2711 if (ShouldEmitEHBlock)
2712 ExtensionTableFlag |= ExtendedTBTableFlag::TB_EH_INFO;
2713 if (EnableSSPCanaryBitInTB &&
2714 TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB(MF))
2715 ExtensionTableFlag |= ExtendedTBTableFlag::TB_SSP_CANARY;
2716
2717 CommentOS << "ExtensionTableFlag = "
2718 << getExtendedTBTableFlagString(Flag: ExtensionTableFlag);
2719 EmitCommentAndValue(ExtensionTableFlag, sizeof(ExtensionTableFlag));
2720 }
2721
2722 if (ExtensionTableFlag & ExtendedTBTableFlag::TB_EH_INFO) {
2723 auto &Ctx = OutStreamer->getContext();
2724 MCSymbol *EHInfoSym =
2725 TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF);
2726 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(Sym: EHInfoSym, Type: TOCType_EHBlock);
2727 const MCSymbol *TOCBaseSym = static_cast<const MCSectionXCOFF *>(
2728 getObjFileLowering().getTOCBaseSection())
2729 ->getQualNameSymbol();
2730 const MCExpr *Exp =
2731 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: TOCEntry, Ctx),
2732 RHS: MCSymbolRefExpr::create(Symbol: TOCBaseSym, Ctx), Ctx);
2733
2734 const DataLayout &DL = getDataLayout();
2735 OutStreamer->emitValueToAlignment(Alignment: Align(4));
2736 OutStreamer->AddComment(T: "EHInfo Table");
2737 OutStreamer->emitValue(Value: Exp, Size: DL.getPointerSize());
2738 }
2739#undef GENBOOLCOMMENT
2740#undef GENVALUECOMMENT
2741}
2742
2743static bool isSpecialLLVMGlobalArrayToSkip(const GlobalVariable *GV) {
2744 return GV->hasAppendingLinkage() &&
2745 StringSwitch<bool>(GV->getName())
2746 // TODO: Linker could still eliminate the GV if we just skip
2747 // handling llvm.used array. Skipping them for now until we or the
2748 // AIX OS team come up with a good solution.
2749 .Case(S: "llvm.used", Value: true)
2750 // It's correct to just skip llvm.compiler.used array here.
2751 .Case(S: "llvm.compiler.used", Value: true)
2752 .Default(Value: false);
2753}
2754
2755static bool isSpecialLLVMGlobalArrayForStaticInit(const GlobalVariable *GV) {
2756 return StringSwitch<bool>(GV->getName())
2757 .Cases(CaseStrings: {"llvm.global_ctors", "llvm.global_dtors"}, Value: true)
2758 .Default(Value: false);
2759}
2760
2761uint64_t PPCAIXAsmPrinter::getAliasOffset(const Constant *C) {
2762 if (auto *GA = dyn_cast<GlobalAlias>(Val: C))
2763 return getAliasOffset(C: GA->getAliasee());
2764 if (auto *CE = dyn_cast<ConstantExpr>(Val: C)) {
2765 const MCExpr *LowC = lowerConstant(CV: CE);
2766 const MCBinaryExpr *CBE = dyn_cast<MCBinaryExpr>(Val: LowC);
2767 if (!CBE)
2768 return 0;
2769 if (CBE->getOpcode() != MCBinaryExpr::Add)
2770 report_fatal_error(reason: "Only adding an offset is supported now.");
2771 auto *RHS = dyn_cast<MCConstantExpr>(Val: CBE->getRHS());
2772 if (!RHS)
2773 report_fatal_error(reason: "Unable to get the offset of alias.");
2774 return RHS->getValue();
2775 }
2776 return 0;
2777}
2778
2779static void tocDataChecks(unsigned PointerSize, const GlobalVariable *GV) {
2780 // TODO: These asserts should be updated as more support for the toc data
2781 // transformation is added (struct support, etc.).
2782 assert(
2783 PointerSize >= GV->getAlign().valueOrOne().value() &&
2784 "GlobalVariables with an alignment requirement stricter than TOC entry "
2785 "size not supported by the toc data transformation.");
2786
2787 Type *GVType = GV->getValueType();
2788 assert(GVType->isSized() && "A GlobalVariable's size must be known to be "
2789 "supported by the toc data transformation.");
2790 if (GV->getDataLayout().getTypeSizeInBits(Ty: GVType) >
2791 PointerSize * 8)
2792 report_fatal_error(
2793 reason: "A GlobalVariable with size larger than a TOC entry is not currently "
2794 "supported by the toc data transformation.");
2795 if (GV->hasPrivateLinkage())
2796 report_fatal_error(reason: "A GlobalVariable with private linkage is not "
2797 "currently supported by the toc data transformation.");
2798}
2799
2800void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
2801 // Special LLVM global arrays have been handled at the initialization.
2802 if (isSpecialLLVMGlobalArrayToSkip(GV) || isSpecialLLVMGlobalArrayForStaticInit(GV))
2803 return;
2804
2805 // Ignore non-emitted data.
2806 if (GV->getSection() == "llvm.metadata")
2807 return;
2808
2809 // If the Global Variable has the toc-data attribute, it needs to be emitted
2810 // when we emit the .toc section.
2811 if (GV->hasAttribute(Kind: "toc-data")) {
2812 unsigned PointerSize = GV->getDataLayout().getPointerSize();
2813 tocDataChecks(PointerSize, GV);
2814 TOCDataGlobalVars.push_back(Elt: GV);
2815 return;
2816 }
2817
2818 emitGlobalVariableHelper(GV);
2819}
2820
2821void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
2822 assert(!GV->getName().starts_with("llvm.") &&
2823 "Unhandled intrinsic global variable.");
2824
2825 if (GV->hasComdat())
2826 report_fatal_error(reason: "COMDAT not yet supported by AIX.");
2827
2828 auto *GVSym = static_cast<MCSymbolXCOFF *>(getSymbol(GV));
2829
2830 if (GV->isDeclarationForLinker()) {
2831 emitLinkage(GV, GVSym);
2832 return;
2833 }
2834
2835 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GO: GV, TM);
2836 if (!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly() &&
2837 !GVKind.isThreadLocal()) // Checks for both ThreadData and ThreadBSS.
2838 report_fatal_error(reason: "Encountered a global variable kind that is "
2839 "not supported yet.");
2840
2841 // Print GV in verbose mode
2842 if (isVerbose()) {
2843 if (GV->hasInitializer()) {
2844 GV->printAsOperand(O&: OutStreamer->getCommentOS(),
2845 /*PrintType=*/false, M: GV->getParent());
2846 OutStreamer->getCommentOS() << '\n';
2847 }
2848 }
2849
2850 auto *Csect = static_cast<MCSectionXCOFF *>(
2851 getObjFileLowering().SectionForGlobal(GO: GV, Kind: GVKind, TM));
2852
2853 // Switch to the containing csect.
2854 OutStreamer->switchSection(Section: Csect);
2855
2856 if (GV->hasMetadata(KindID: LLVMContext::MD_implicit_ref)) {
2857 emitRefMetadata(GV);
2858 }
2859
2860 const DataLayout &DL = GV->getDataLayout();
2861
2862 // Handle common and zero-initialized local symbols.
2863 if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||
2864 GVKind.isThreadBSSLocal()) {
2865 Align Alignment = GV->getAlign().value_or(u: DL.getPreferredAlign(GV));
2866 uint64_t Size = GV->getGlobalSize(DL);
2867 GVSym->setStorageClass(
2868 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV));
2869
2870 if (GVKind.isBSSLocal() && Csect->getMappingClass() == XCOFF::XMC_TD) {
2871 OutStreamer->emitZeros(NumBytes: Size);
2872 } else if (GVKind.isBSSLocal() || GVKind.isThreadBSSLocal()) {
2873 assert(Csect->getMappingClass() != XCOFF::XMC_TD &&
2874 "BSS local toc-data already handled and TLS variables "
2875 "incompatible with XMC_TD");
2876 OutStreamer->emitXCOFFLocalCommonSymbol(
2877 LabelSym: OutContext.getOrCreateSymbol(Name: GVSym->getSymbolTableName()), Size,
2878 CsectSym: GVSym, Alignment);
2879 } else {
2880 OutStreamer->emitCommonSymbol(Symbol: GVSym, Size, ByteAlignment: Alignment);
2881 }
2882 return;
2883 }
2884
2885 MCSymbol *EmittedInitSym = GVSym;
2886
2887 // Emit linkage for the global variable and its aliases.
2888 emitLinkage(GV, GVSym: EmittedInitSym);
2889 for (const GlobalAlias *GA : GOAliasMap[GV])
2890 emitLinkage(GV: GA, GVSym: getSymbol(GV: GA));
2891
2892 emitAlignment(Alignment: getGVAlignment(GV, DL), GV);
2893
2894 // When -fdata-sections is enabled, every GlobalVariable will
2895 // be put into its own csect; therefore, label is not necessary here.
2896 if (!TM.getDataSections() || GV->hasSection()) {
2897 if (Csect->getMappingClass() != XCOFF::XMC_TD)
2898 OutStreamer->emitLabel(Symbol: EmittedInitSym);
2899 }
2900
2901 // No alias to emit.
2902 if (!GOAliasMap[GV].size()) {
2903 emitGlobalConstant(DL: GV->getDataLayout(), CV: GV->getInitializer());
2904 return;
2905 }
2906
2907 // Aliases with the same offset should be aligned. Record the list of aliases
2908 // associated with the offset.
2909 AliasMapTy AliasList;
2910 for (const GlobalAlias *GA : GOAliasMap[GV])
2911 AliasList[getAliasOffset(C: GA->getAliasee())].push_back(Elt: GA);
2912
2913 // Emit alias label and element value for global variable.
2914 emitGlobalConstant(DL: GV->getDataLayout(), CV: GV->getInitializer(),
2915 AliasList: &AliasList);
2916}
2917
2918void PPCAIXAsmPrinter::emitFunctionDescriptor() {
2919 const DataLayout &DL = getDataLayout();
2920 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4;
2921
2922 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2923 // Emit function descriptor.
2924 OutStreamer->switchSection(
2925 Section: static_cast<MCSymbolXCOFF *>(CurrentFnDescSym)->getRepresentedCsect());
2926
2927 // Emit aliasing label for function descriptor csect.
2928 // An Ifunc doesn't have a corresponding machine function.
2929 if (MF)
2930 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()])
2931 OutStreamer->emitLabel(Symbol: getSymbol(GV: Alias));
2932
2933 // Emit function entry point address.
2934 OutStreamer->emitValue(Value: MCSymbolRefExpr::create(Symbol: CurrentFnSym, Ctx&: OutContext),
2935 Size: PointerSize);
2936 // Emit TOC base address.
2937 const MCSymbol *TOCBaseSym = static_cast<const MCSectionXCOFF *>(
2938 getObjFileLowering().getTOCBaseSection())
2939 ->getQualNameSymbol();
2940 OutStreamer->emitValue(Value: MCSymbolRefExpr::create(Symbol: TOCBaseSym, Ctx&: OutContext),
2941 Size: PointerSize);
2942 // Emit a null environment pointer.
2943 OutStreamer->emitIntValue(Value: 0, Size: PointerSize);
2944
2945 OutStreamer->switchSection(Section: Current.first, Subsec: Current.second);
2946}
2947
2948void PPCAIXAsmPrinter::emitFunctionEntryLabel() {
2949 // For functions without user defined section, it's not necessary to emit the
2950 // label when we have individual function in its own csect.
2951 if (!TM.getFunctionSections() || (MF && MF->getFunction().hasSection()))
2952 PPCAsmPrinter::emitFunctionEntryLabel();
2953
2954 // an ifunc does not have an associated MachineFunction
2955 if (!MF)
2956 return;
2957
2958 const Function *F = &MF->getFunction();
2959 // Emit aliasing label for function entry point label.
2960 for (const GlobalAlias *Alias : GOAliasMap[F])
2961 OutStreamer->emitLabel(
2962 Symbol: getObjFileLowering().getFunctionEntryPointSymbol(Func: Alias, TM));
2963
2964 if (F->hasMetadata(KindID: LLVMContext::MD_implicit_ref)) {
2965 emitRefMetadata(F);
2966 }
2967}
2968
2969void PPCAIXAsmPrinter::emitPGORefs(Module &M) {
2970 if (!OutContext.hasXCOFFSection(
2971 Section: "__llvm_prf_cnts",
2972 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD)))
2973 return;
2974
2975 // When inside a csect `foo`, a .ref directive referring to a csect `bar`
2976 // translates into a relocation entry from `foo` to` bar`. The referring
2977 // csect, `foo`, is identified by its address. If multiple csects have the
2978 // same address (because one or more of them are zero-length), the referring
2979 // csect cannot be determined. Hence, we don't generate the .ref directives
2980 // if `__llvm_prf_cnts` is an empty section.
2981 bool HasNonZeroLengthPrfCntsSection = false;
2982 const DataLayout &DL = M.getDataLayout();
2983 for (GlobalVariable &GV : M.globals())
2984 if (GV.hasSection() && GV.getSection() == "__llvm_prf_cnts" &&
2985 GV.getGlobalSize(DL) > 0) {
2986 HasNonZeroLengthPrfCntsSection = true;
2987 break;
2988 }
2989
2990 if (HasNonZeroLengthPrfCntsSection) {
2991 MCSection *CntsSection = OutContext.getXCOFFSection(
2992 Section: "__llvm_prf_cnts", K: SectionKind::getData(),
2993 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD),
2994 /*MultiSymbolsAllowed*/ true);
2995
2996 OutStreamer->switchSection(Section: CntsSection);
2997 if (OutContext.hasXCOFFSection(
2998 Section: "__llvm_prf_data",
2999 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) {
3000 MCSymbol *S = OutContext.getOrCreateSymbol(Name: "__llvm_prf_data[RW]");
3001 OutStreamer->emitXCOFFRefDirective(Symbol: S);
3002 }
3003 if (OutContext.hasXCOFFSection(
3004 Section: "__llvm_prf_names",
3005 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RO, XCOFF::XTY_SD))) {
3006 MCSymbol *S = OutContext.getOrCreateSymbol(Name: "__llvm_prf_names[RO]");
3007 OutStreamer->emitXCOFFRefDirective(Symbol: S);
3008 }
3009 if (OutContext.hasXCOFFSection(
3010 Section: "__llvm_prf_vnds",
3011 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) {
3012 MCSymbol *S = OutContext.getOrCreateSymbol(Name: "__llvm_prf_vnds[RW]");
3013 OutStreamer->emitXCOFFRefDirective(Symbol: S);
3014 }
3015 }
3016}
3017
3018void PPCAIXAsmPrinter::emitGCOVRefs() {
3019 if (!OutContext.hasXCOFFSection(
3020 Section: "__llvm_gcov_ctr_section",
3021 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD)))
3022 return;
3023
3024 MCSection *CtrSection = OutContext.getXCOFFSection(
3025 Section: "__llvm_gcov_ctr_section", K: SectionKind::getData(),
3026 CsectProp: XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD),
3027 /*MultiSymbolsAllowed*/ true);
3028
3029 OutStreamer->switchSection(Section: CtrSection);
3030 const XCOFF::StorageMappingClass MappingClass =
3031 TM.Options.XCOFFReadOnlyPointers ? XCOFF::XMC_RO : XCOFF::XMC_RW;
3032 if (OutContext.hasXCOFFSection(
3033 Section: "__llvm_covinit",
3034 CsectProp: XCOFF::CsectProperties(MappingClass, XCOFF::XTY_SD))) {
3035 const char *SymbolStr = TM.Options.XCOFFReadOnlyPointers
3036 ? "__llvm_covinit[RO]"
3037 : "__llvm_covinit[RW]";
3038 MCSymbol *S = OutContext.getOrCreateSymbol(Name: SymbolStr);
3039 OutStreamer->emitXCOFFRefDirective(Symbol: S);
3040 }
3041}
3042
3043void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
3044 // If there are no functions and there are no toc-data definitions in this
3045 // module, we will never need to reference the TOC base.
3046 if (M.empty() && TOCDataGlobalVars.empty())
3047 return;
3048
3049 emitPGORefs(M);
3050 emitGCOVRefs();
3051
3052 // Switch to section to emit TOC base.
3053 OutStreamer->switchSection(Section: getObjFileLowering().getTOCBaseSection());
3054
3055 PPCTargetStreamer *TS =
3056 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
3057
3058 for (auto &I : TOC) {
3059 MCSectionXCOFF *TCEntry;
3060 // Setup the csect for the current TC entry. If the variant kind is
3061 // VK_AIX_TLSGDM the entry represents the region handle, we create a
3062 // new symbol to prefix the name with a dot.
3063 // If TLS model opt is turned on, create a new symbol to prefix the name
3064 // with a dot.
3065 if (I.first.second == PPC::S_AIX_TLSGDM ||
3066 (Subtarget->hasAIXShLibTLSModelOpt() &&
3067 I.first.second == PPC::S_AIX_TLSLD)) {
3068 SmallString<128> Name;
3069 StringRef Prefix = ".";
3070 Name += Prefix;
3071 Name += static_cast<const MCSymbolXCOFF *>(I.first.first)
3072 ->getSymbolTableName();
3073 MCSymbol *S = OutContext.getOrCreateSymbol(Name);
3074 TCEntry = static_cast<MCSectionXCOFF *>(
3075 getObjFileLowering().getSectionForTOCEntry(S, TM));
3076 } else {
3077 TCEntry = static_cast<MCSectionXCOFF *>(
3078 getObjFileLowering().getSectionForTOCEntry(S: I.first.first, TM));
3079 }
3080 OutStreamer->switchSection(Section: TCEntry);
3081
3082 OutStreamer->emitLabel(Symbol: I.second);
3083 TS->emitTCEntry(S: *I.first.first, Kind: I.first.second);
3084 }
3085
3086 // Traverse the list of global variables twice, emitting all of the
3087 // non-common global variables before the common ones, as emitting a
3088 // .comm directive changes the scope from .toc to the common symbol.
3089 for (const auto *GV : TOCDataGlobalVars) {
3090 if (!GV->hasCommonLinkage())
3091 emitGlobalVariableHelper(GV);
3092 }
3093 for (const auto *GV : TOCDataGlobalVars) {
3094 if (GV->hasCommonLinkage())
3095 emitGlobalVariableHelper(GV);
3096 }
3097}
3098
3099bool PPCAIXAsmPrinter::doInitialization(Module &M) {
3100 const bool Result = PPCAsmPrinter::doInitialization(M);
3101
3102 // Emit the .machine directive on AIX.
3103 const Triple &Target = TM.getTargetTriple();
3104 XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
3105 // Walk through the "target-cpu" attribute of functions and use the newest
3106 // level as the CPU of the module.
3107 for (auto &F : M) {
3108 XCOFF::CFileCpuId FunCpuId =
3109 XCOFF::getCpuID(CPU: TM.getSubtargetImpl(F)->getCPU());
3110 if (FunCpuId > TargetCpuId)
3111 TargetCpuId = FunCpuId;
3112 }
3113 // If there is no "target-cpu" attribute within the functions, take the
3114 // "-mcpu" value. If both are omitted, use getNormalizedPPCTargetCPU() to
3115 // determine the default CPU.
3116 if (!TargetCpuId) {
3117 StringRef TargetCPU = TM.getTargetCPU();
3118 TargetCpuId = XCOFF::getCpuID(
3119 CPU: TargetCPU.empty() ? PPC::getNormalizedPPCTargetCPU(T: Target) : TargetCPU);
3120 }
3121
3122 PPCTargetStreamer *TS =
3123 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
3124 TS->emitMachine(CPU: XCOFF::getTCPUString(TCPU: TargetCpuId));
3125
3126 auto setCsectAlignment = [this](const GlobalObject *GO) {
3127 // Declarations have 0 alignment which is set by default.
3128 if (GO->isDeclarationForLinker())
3129 return;
3130
3131 SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM);
3132 auto *Csect = static_cast<MCSectionXCOFF *>(
3133 getObjFileLowering().SectionForGlobal(GO, Kind: GOKind, TM));
3134
3135 Align GOAlign = getGVAlignment(GV: GO, DL: GO->getDataLayout());
3136 Csect->ensureMinAlignment(MinAlignment: GOAlign);
3137 };
3138
3139 // For all TLS variables, calculate their corresponding addresses and store
3140 // them into TLSVarsToAddressMapping, which will be used to determine whether
3141 // or not local-exec TLS variables require special assembly printing.
3142 uint64_t TLSVarAddress = 0;
3143 auto DL = M.getDataLayout();
3144 for (const auto &G : M.globals()) {
3145 if (G.isThreadLocal() && !G.isDeclaration()) {
3146 TLSVarAddress = alignTo(Size: TLSVarAddress, A: getGVAlignment(GV: &G, DL));
3147 TLSVarsToAddressMapping[&G] = TLSVarAddress;
3148 TLSVarAddress += G.getGlobalSize(DL);
3149 }
3150 }
3151
3152 // We need to know, up front, the alignment of csects for the assembly path,
3153 // because once a .csect directive gets emitted, we could not change the
3154 // alignment value on it.
3155 for (const auto &G : M.globals()) {
3156 if (isSpecialLLVMGlobalArrayToSkip(GV: &G))
3157 continue;
3158
3159 if (isSpecialLLVMGlobalArrayForStaticInit(GV: &G)) {
3160 // Generate a format indicator and a unique module id to be a part of
3161 // the sinit and sterm function names.
3162 if (FormatIndicatorAndUniqueModId.empty()) {
3163 std::string UniqueModuleId = getUniqueModuleId(M: &M);
3164 if (UniqueModuleId != "")
3165 // TODO: Use source file full path to generate the unique module id
3166 // and add a format indicator as a part of function name in case we
3167 // will support more than one format.
3168 FormatIndicatorAndUniqueModId = "clang_" + UniqueModuleId.substr(pos: 1);
3169 else {
3170 // Use threadId, Pid, and current time as the unique module id when we
3171 // cannot generate one based on a module's strong external symbols.
3172 auto CurTime =
3173 std::chrono::duration_cast<std::chrono::nanoseconds>(
3174 d: std::chrono::steady_clock::now().time_since_epoch())
3175 .count();
3176 FormatIndicatorAndUniqueModId =
3177 "clangPidTidTime_" + llvm::itostr(X: sys::Process::getProcessId()) +
3178 "_" + llvm::itostr(X: llvm::get_threadid()) + "_" +
3179 llvm::itostr(X: CurTime);
3180 }
3181 }
3182
3183 emitSpecialLLVMGlobal(GV: &G);
3184 continue;
3185 }
3186
3187 setCsectAlignment(&G);
3188 std::optional<CodeModel::Model> OptionalCodeModel = G.getCodeModel();
3189 if (OptionalCodeModel)
3190 setOptionalCodeModel(XSym: static_cast<MCSymbolXCOFF *>(getSymbol(GV: &G)),
3191 CM: *OptionalCodeModel);
3192 }
3193
3194 for (const auto &F : M)
3195 setCsectAlignment(&F);
3196
3197 // Construct an aliasing list for each GlobalObject.
3198 for (const auto &Alias : M.aliases()) {
3199 const GlobalObject *Aliasee = Alias.getAliaseeObject();
3200 if (!Aliasee)
3201 report_fatal_error(
3202 reason: "alias without a base object is not yet supported on AIX");
3203
3204 if (Aliasee->hasCommonLinkage()) {
3205 report_fatal_error(reason: "Aliases to common variables are not allowed on AIX:"
3206 "\n\tAlias attribute for " +
3207 Alias.getName() + " is invalid because " +
3208 Aliasee->getName() + " is common.",
3209 gen_crash_diag: false);
3210 }
3211
3212 const GlobalVariable *GVar =
3213 dyn_cast_or_null<GlobalVariable>(Val: Alias.getAliaseeObject());
3214 if (GVar) {
3215 std::optional<CodeModel::Model> OptionalCodeModel = GVar->getCodeModel();
3216 if (OptionalCodeModel)
3217 setOptionalCodeModel(XSym: static_cast<MCSymbolXCOFF *>(getSymbol(GV: &Alias)),
3218 CM: *OptionalCodeModel);
3219 }
3220
3221 GOAliasMap[Aliasee].push_back(Elt: &Alias);
3222 }
3223
3224 return Result;
3225}
3226
3227void PPCAIXAsmPrinter::emitInstruction(const MachineInstr *MI) {
3228 switch (MI->getOpcode()) {
3229 default:
3230 break;
3231 case PPC::TW:
3232 case PPC::TWI:
3233 case PPC::TD:
3234 case PPC::TDI: {
3235 if (MI->getNumOperands() < 5)
3236 break;
3237 const MachineOperand &LangMO = MI->getOperand(i: 3);
3238 const MachineOperand &ReasonMO = MI->getOperand(i: 4);
3239 if (!LangMO.isImm() || !ReasonMO.isImm())
3240 break;
3241 MCSymbol *TempSym = OutContext.createNamedTempSymbol();
3242 OutStreamer->emitLabel(Symbol: TempSym);
3243 OutStreamer->emitXCOFFExceptDirective(
3244 Symbol: CurrentFnSym, Trap: TempSym, Lang: LangMO.getImm(), Reason: ReasonMO.getImm(),
3245 FunctionSize: Subtarget->isPPC64() ? MI->getMF()->getInstructionCount() * 8
3246 : MI->getMF()->getInstructionCount() * 4,
3247 hasDebug: hasDebugInfo());
3248 break;
3249 }
3250 case PPC::GETtlsMOD32AIX:
3251 case PPC::GETtlsMOD64AIX:
3252 case PPC::GETtlsTpointer32AIX:
3253 case PPC::GETtlsADDR64AIX:
3254 case PPC::GETtlsADDR32AIX: {
3255 // A reference to .__tls_get_mod/.__tls_get_addr/.__get_tpointer is unknown
3256 // to the assembler so we need to emit an external symbol reference.
3257 MCSymbol *TlsGetAddr =
3258 createMCSymbolForTlsGetAddr(Ctx&: OutContext, MIOpc: MI->getOpcode());
3259 ExtSymSDNodeSymbols.insert(X: TlsGetAddr);
3260 break;
3261 }
3262 case PPC::BL8:
3263 case PPC::BL:
3264 case PPC::BL8_NOP:
3265 case PPC::BL_NOP: {
3266 const MachineOperand &MO = MI->getOperand(i: 0);
3267 if (MO.isSymbol()) {
3268 auto *S = static_cast<MCSymbolXCOFF *>(
3269 OutContext.getOrCreateSymbol(Name: MO.getSymbolName()));
3270 ExtSymSDNodeSymbols.insert(X: S);
3271 }
3272 } break;
3273 case PPC::BL_TLS:
3274 case PPC::BL8_TLS:
3275 case PPC::BL8_TLS_:
3276 case PPC::BL8_NOP_TLS:
3277 report_fatal_error(reason: "TLS call not yet implemented");
3278 case PPC::TAILB:
3279 case PPC::TAILB8:
3280 case PPC::TAILBA:
3281 case PPC::TAILBA8:
3282 case PPC::TAILBCTR:
3283 case PPC::TAILBCTR8:
3284 if (MI->getOperand(i: 0).isSymbol())
3285 report_fatal_error(reason: "Tail call for extern symbol not yet supported.");
3286 break;
3287 case PPC::DST:
3288 case PPC::DST64:
3289 case PPC::DSTT:
3290 case PPC::DSTT64:
3291 case PPC::DSTST:
3292 case PPC::DSTST64:
3293 case PPC::DSTSTT:
3294 case PPC::DSTSTT64:
3295 EmitToStreamer(
3296 S&: *OutStreamer,
3297 Inst: MCInstBuilder(PPC::ORI).addReg(Reg: PPC::R0).addReg(Reg: PPC::R0).addImm(Val: 0));
3298 return;
3299 }
3300 return PPCAsmPrinter::emitInstruction(MI);
3301}
3302
3303bool PPCAIXAsmPrinter::doFinalization(Module &M) {
3304 for (MCSymbol *Sym : ExtSymSDNodeSymbols)
3305 OutStreamer->emitSymbolAttribute(Symbol: Sym, Attribute: MCSA_Extern);
3306 return PPCAsmPrinter::doFinalization(M);
3307}
3308
3309static unsigned mapToSinitPriority(int P) {
3310 if (P < 0 || P > 65535)
3311 report_fatal_error(reason: "invalid init priority");
3312
3313 if (P <= 20)
3314 return P;
3315
3316 if (P < 81)
3317 return 20 + (P - 20) * 16;
3318
3319 if (P <= 1124)
3320 return 1004 + (P - 81);
3321
3322 if (P < 64512)
3323 return 2047 + (P - 1124) * 33878;
3324
3325 return 2147482625u + (P - 64512);
3326}
3327
3328static std::string convertToSinitPriority(int Priority) {
3329 // This helper function converts clang init priority to values used in sinit
3330 // and sterm functions.
3331 //
3332 // The conversion strategies are:
3333 // We map the reserved clang/gnu priority range [0, 100] into the sinit/sterm
3334 // reserved priority range [0, 1023] by
3335 // - directly mapping the first 21 and the last 20 elements of the ranges
3336 // - linear interpolating the intermediate values with a step size of 16.
3337 //
3338 // We map the non reserved clang/gnu priority range of [101, 65535] into the
3339 // sinit/sterm priority range [1024, 2147483648] by:
3340 // - directly mapping the first and the last 1024 elements of the ranges
3341 // - linear interpolating the intermediate values with a step size of 33878.
3342 unsigned int P = mapToSinitPriority(P: Priority);
3343
3344 std::string PrioritySuffix;
3345 llvm::raw_string_ostream os(PrioritySuffix);
3346 os << llvm::format_hex_no_prefix(N: P, Width: 8);
3347 return PrioritySuffix;
3348}
3349
3350void PPCAIXAsmPrinter::emitXXStructorList(const DataLayout &DL,
3351 const Constant *List, bool IsCtor) {
3352 SmallVector<Structor, 8> Structors;
3353 preprocessXXStructorList(DL, List, Structors);
3354 if (Structors.empty())
3355 return;
3356
3357 unsigned Index = 0;
3358 for (Structor &S : Structors) {
3359 if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(Val: S.Func))
3360 S.Func = CE->getOperand(i_nocapture: 0);
3361
3362 llvm::GlobalAlias::create(
3363 Linkage: GlobalValue::ExternalLinkage,
3364 Name: (IsCtor ? llvm::Twine("__sinit") : llvm::Twine("__sterm")) +
3365 llvm::Twine(convertToSinitPriority(Priority: S.Priority)) +
3366 llvm::Twine("_", FormatIndicatorAndUniqueModId) +
3367 llvm::Twine("_", llvm::utostr(X: Index++)),
3368 Aliasee: cast<Function>(Val: S.Func));
3369 }
3370}
3371
3372void PPCAIXAsmPrinter::emitTTypeReference(const GlobalValue *GV,
3373 unsigned Encoding) {
3374 if (GV) {
3375 TOCEntryType GlobalType = TOCType_GlobalInternal;
3376 GlobalValue::LinkageTypes Linkage = GV->getLinkage();
3377 if (Linkage == GlobalValue::ExternalLinkage ||
3378 Linkage == GlobalValue::AvailableExternallyLinkage ||
3379 Linkage == GlobalValue::ExternalWeakLinkage)
3380 GlobalType = TOCType_GlobalExternal;
3381 MCSymbol *TypeInfoSym = TM.getSymbol(GV);
3382 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(Sym: TypeInfoSym, Type: GlobalType);
3383 const MCSymbol *TOCBaseSym = static_cast<const MCSectionXCOFF *>(
3384 getObjFileLowering().getTOCBaseSection())
3385 ->getQualNameSymbol();
3386 auto &Ctx = OutStreamer->getContext();
3387 const MCExpr *Exp =
3388 MCBinaryExpr::createSub(LHS: MCSymbolRefExpr::create(Symbol: TOCEntry, Ctx),
3389 RHS: MCSymbolRefExpr::create(Symbol: TOCBaseSym, Ctx), Ctx);
3390 OutStreamer->emitValue(Value: Exp, Size: GetSizeOfEncodedValue(Encoding));
3391 } else
3392 OutStreamer->emitIntValue(Value: 0, Size: GetSizeOfEncodedValue(Encoding));
3393}
3394
3395void PPCAIXAsmPrinter::emitRefMetadata(const GlobalObject *GO) {
3396 SmallVector<MDNode *> MDs;
3397 GO->getMetadata(KindID: LLVMContext::MD_implicit_ref, MDs);
3398 assert(MDs.size() && "Expected !implicit.ref metadata nodes");
3399
3400 for (const MDNode *MD : MDs) {
3401 const ValueAsMetadata *VAM = cast<ValueAsMetadata>(Val: MD->getOperand(I: 0).get());
3402 const GlobalValue *GV = cast<GlobalValue>(Val: VAM->getValue());
3403 MCSymbol *Referenced =
3404 isa<Function>(Val: GV)
3405 ? getObjFileLowering().getFunctionEntryPointSymbol(Func: GV, TM)
3406 : TM.getSymbol(GV);
3407 OutStreamer->emitXCOFFRefDirective(Symbol: Referenced);
3408 }
3409}
3410
3411// Return a pass that prints the PPC assembly code for a MachineFunction to the
3412// given output stream.
3413static AsmPrinter *
3414createPPCAsmPrinterPass(TargetMachine &tm,
3415 std::unique_ptr<MCStreamer> &&Streamer) {
3416 if (tm.getTargetTriple().isOSAIX())
3417 return new PPCAIXAsmPrinter(tm, std::move(Streamer));
3418
3419 return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
3420}
3421
3422void PPCAIXAsmPrinter::emitModuleCommandLines(Module &M) {
3423 const NamedMDNode *NMD = M.getNamedMetadata(Name: "llvm.commandline");
3424 if (!NMD || !NMD->getNumOperands())
3425 return;
3426
3427 std::string S;
3428 raw_string_ostream RSOS(S);
3429 for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) {
3430 const MDNode *N = NMD->getOperand(i);
3431 assert(N->getNumOperands() == 1 &&
3432 "llvm.commandline metadata entry can have only one operand");
3433 const MDString *MDS = cast<MDString>(Val: N->getOperand(I: 0));
3434 // Add "@(#)" to support retrieving the command line information with the
3435 // AIX "what" command
3436 RSOS << "@(#)opt " << MDS->getString() << "\n";
3437 RSOS.write(C: '\0');
3438 }
3439 OutStreamer->emitXCOFFCInfoSym(Name: ".GCC.command.line", Metadata: RSOS.str());
3440}
3441
3442static bool TOCRestoreNeededForCallToImplementation(const GlobalIFunc &GI) {
3443 enum class IsLocal {
3444 Unknown, // Structure of the llvm::Value is not one of the recognizable
3445 // structures, and so it's unknown if the llvm::Value is the
3446 // address of a local function at runtime.
3447 True, // We can statically prove that all runtime values of the
3448 // llvm::Value is an address of a local function.
3449 False // We can statically prove that one of the runtime values of the
3450 // llvm::Value is the address of a non-local function; it could be
3451 // the case that at runtime the non-local function is never
3452 // selected but we don't care.
3453 };
3454 auto Combine = [](IsLocal LHS, IsLocal RHS) -> IsLocal {
3455 if (LHS == IsLocal::False || RHS == IsLocal::False)
3456 return IsLocal::False;
3457 if (LHS == IsLocal::True && RHS == IsLocal::True)
3458 return IsLocal::True;
3459 return IsLocal::Unknown;
3460 };
3461
3462 // Query if the given function is local to the load module.
3463 auto IsLocalFunc = [](const Function *F) -> IsLocal {
3464 bool Result = F->isDSOLocal();
3465 LLVM_DEBUG(dbgs() << F->getName() << " is "
3466 << (Result ? "dso_local\n" : "not dso_local\n"));
3467 return Result ? IsLocal::True : IsLocal::False;
3468 };
3469
3470 // Recursive walker that visits certain patterns that make up the given Value,
3471 // and returns
3472 // - false if at least one non-local function was seen,
3473 // - otherwise, return unknown if some unrecognizable pattern was seen,
3474 // - otherwise, return true (which means only recognizable patterns were seen
3475 // and all possible values are local functions).
3476 std::function<IsLocal(const Value *)> ValueIsALocalFunc =
3477 [&IsLocalFunc, &Combine, &ValueIsALocalFunc](const Value *V) -> IsLocal {
3478 if (auto *F = dyn_cast<Function>(Val: V))
3479 return IsLocalFunc(F);
3480 if (!isa<Instruction>(Val: V))
3481 return IsLocal::Unknown;
3482
3483 auto *I = cast<Instruction>(Val: V);
3484 // return isP9 ? foo_p9 : foo_default;
3485 if (auto *SI = dyn_cast<SelectInst>(Val: I))
3486 return Combine(ValueIsALocalFunc(SI->getTrueValue()),
3487 ValueIsALocalFunc(SI->getFalseValue()));
3488 else if (auto *PN = dyn_cast<PHINode>(Val: I)) {
3489 IsLocal Res = IsLocal::True;
3490 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
3491 Res = Combine(Res, ValueIsALocalFunc(PN->getIncomingValue(i)));
3492 if (Res == IsLocal::False)
3493 return Res;
3494 }
3495 return Res;
3496 }
3497 // clang-format off
3498 // @switch.table.resolve_foo = private unnamed_addr constant [3 x ptr] [ptr @foo_static, ptr @foo_hidden, ptr @foo_protected]
3499 // %switch.gep = getelementptr inbounds nuw ptr, ptr @switch.table, i64 %2
3500 // V = load ptr, ptr %switch.gep,
3501 // clang-format on
3502 else if (auto *Op = getPointerOperand(V: I)) {
3503 while (isa<GEPOperator>(Val: Op))
3504 Op = cast<GEPOperator>(Val: Op)->getPointerOperand();
3505
3506 if (!isa<GlobalVariable>(Val: Op))
3507 return IsLocal::Unknown;
3508 auto *GV = dyn_cast<GlobalVariable>(Val: Op);
3509 if (!GV->hasInitializer() || !isa<ConstantArray>(Val: GV->getInitializer()))
3510 return IsLocal::Unknown;
3511 auto *Init = cast<ConstantArray>(Val: GV->getInitializer());
3512 IsLocal Res = IsLocal::True;
3513 for (unsigned Idx = 0, End = Init->getNumOperands(); Idx != End; ++Idx) {
3514 Res = Combine(Res, ValueIsALocalFunc(Init->getOperand(i_nocapture: Idx)));
3515 if (Res == IsLocal::False)
3516 return Res;
3517 }
3518 return Res;
3519 }
3520 return IsLocal::Unknown;
3521 };
3522
3523 auto *Resolver = GI.getResolverFunction();
3524 // If the resolver is preemptible then we cannot rely on its implementation.
3525 if (IsLocalFunc(Resolver) == IsLocal::False && IFuncLocalIfProven)
3526 return true;
3527
3528 // If one of the return values of the resolver function is not a
3529 // local function, then we have to conservatively do a TOC save/restore.
3530 IsLocal Res = IsLocal::True;
3531 for (auto &BB : *Resolver) {
3532 if (!isa<ReturnInst>(Val: BB.getTerminator()))
3533 continue;
3534 auto *Ret = cast<ReturnInst>(Val: BB.getTerminator());
3535 Value *RV = Ret->getReturnValue();
3536 assert(RV);
3537 Res = Combine(Res, ValueIsALocalFunc(RV));
3538 if (Res == IsLocal::False)
3539 break;
3540 }
3541 // no TOC save/restore needed if either all functions were local or we're
3542 // being optimistic and no preemptible functions were seen.
3543 if (Res == IsLocal::True || (Res == IsLocal::Unknown && !IFuncLocalIfProven))
3544 return false;
3545 return true;
3546}
3547/*
3548 * .csect .foo[PR],5
3549 * .globl foo[DS]
3550 * .globl .foo[PR]
3551 * .lglobl ifunc_sec.foo[RW]
3552 * .align 4
3553 * .csect foo[DS],2
3554 * .vbyte 4, .foo[PR]
3555 * .vbyte 4, TOC[TC0]
3556 * .vbyte 4, 0
3557 * .csect .foo[PR],5
3558 * .ref ifunc_sec.foo[RW]
3559 * lwz 12, L..foo_desc(2) # load foo's descriptor address
3560 * lwz 11, 8(12) # load the env pointer (for non-C/C++ functions)
3561 * lwz 12, 0(12) # load foo.addr
3562 * mtctr 12
3563 * bctr # branch to CR without setting LR so that callee
3564 * # returns to the caller of .foo
3565 * # -- End function
3566 */
3567void PPCAIXAsmPrinter::emitGlobalIFunc(Module &M, const GlobalIFunc &GI) {
3568 // Set the Subtarget to that of the resolver.
3569 const TargetSubtargetInfo *STI =
3570 TM.getSubtargetImpl(*GI.getResolverFunction());
3571 bool IsPPC64 = static_cast<const PPCSubtarget *>(STI)->isPPC64();
3572
3573 // Create syms and sections that are part of the ifunc implementation:
3574 // - Function descriptor symbol foo[RW]
3575 // - Function entry symbol .foo[PR]
3576 MCSectionXCOFF *FnDescSec = static_cast<MCSectionXCOFF *>(
3577 getObjFileLowering().getSectionForFunctionDescriptor(F: &GI, TM));
3578 FnDescSec->setAlignment(Align(IsPPC64 ? 8 : 4));
3579
3580 CurrentFnDescSym = FnDescSec->getQualNameSymbol();
3581
3582 CurrentFnSym = getObjFileLowering().getFunctionEntryPointSymbol(Func: &GI, TM);
3583
3584 // Start codegen:
3585 if (TM.getFunctionSections())
3586 OutStreamer->switchSection(
3587 Section: static_cast<MCSymbolXCOFF *>(CurrentFnSym)->getRepresentedCsect());
3588 else
3589 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
3590
3591 if (GI.hasMetadata(KindID: LLVMContext::MD_implicit_ref))
3592 emitRefMetadata(GO: &GI);
3593
3594 // generate linkage for foo and .foo
3595 emitLinkage(GV: &GI, GVSym: CurrentFnDescSym);
3596 emitLinkage(GV: &GI, GVSym: CurrentFnSym);
3597
3598 // .align 4
3599 Align Alignment(STI->getTargetLowering()->getMinFunctionAlignment());
3600 emitAlignment(Alignment, GV: nullptr);
3601
3602 // generate foo's function descriptor
3603 emitFunctionDescriptor();
3604
3605 emitFunctionEntryLabel();
3606
3607 // generate the code for .foo now:
3608 if (TOCRestoreNeededForCallToImplementation(GI)) {
3609 Twine Msg = "unimplemented: TOC register save/restore needed for ifunc \"" +
3610 Twine(GI.getName()) +
3611 "\", because couldn't prove all candidates "
3612 "are static or hidden/protected visibility definitions";
3613 if (!IFuncWarnInsteadOfError)
3614 reportFatalUsageError(reason: Msg);
3615 else
3616 dbgs() << Msg << "\n";
3617 }
3618
3619 auto FnDescTOCEntryType = getTOCEntryTypeForLinkage(Linkage: GI.getLinkage());
3620 auto *FnDescTOCEntrySym =
3621 lookUpOrCreateTOCEntry(Sym: CurrentFnDescSym, Type: FnDescTOCEntryType);
3622
3623 if (TM.getCodeModel() == CodeModel::Large) {
3624 // addis 12, L..foo_desc@u(2)
3625 // lwz 12, L..foo_desc@l(12)
3626 auto *Exp_U = symbolWithSpecifier(S: FnDescTOCEntrySym, Spec: PPC::S_U);
3627 OutStreamer->emitInstruction(Inst: MCInstBuilder(PPC::ADDIS)
3628 .addReg(Reg: PPC::X12)
3629 .addReg(Reg: PPC::X2)
3630 .addExpr(Val: Exp_U),
3631 STI: *Subtarget);
3632 auto *Exp_L = symbolWithSpecifier(S: FnDescTOCEntrySym, Spec: PPC::S_L);
3633 OutStreamer->emitInstruction(Inst: MCInstBuilder(IsPPC64 ? PPC::LD : PPC::LWZ)
3634 .addReg(Reg: PPC::X12)
3635 .addExpr(Val: Exp_L)
3636 .addReg(Reg: PPC::X12),
3637 STI: *Subtarget);
3638 } else {
3639 // lwz 12, L..foo_desc(2)
3640 auto *Exp = MCSymbolRefExpr::create(Symbol: FnDescTOCEntrySym, Ctx&: OutContext);
3641 // Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
3642 // TODO: do we need to uncomment this?
3643 OutStreamer->emitInstruction(Inst: MCInstBuilder(IsPPC64 ? PPC::LD : PPC::LWZ)
3644 .addReg(Reg: PPC::X12)
3645 .addExpr(Val: Exp)
3646 .addReg(Reg: PPC::X2),
3647 STI: *Subtarget);
3648 }
3649 // lwz 11, 8(12)
3650 OutStreamer->emitInstruction(Inst: MCInstBuilder(IsPPC64 ? PPC::LD : PPC::LWZ)
3651 .addReg(Reg: PPC::X11)
3652 .addImm(Val: IsPPC64 ? 16 : 8)
3653 .addReg(Reg: PPC::X12),
3654 STI: *Subtarget);
3655 // lwz 12, 0(12)
3656 OutStreamer->emitInstruction(Inst: MCInstBuilder(IsPPC64 ? PPC::LD : PPC::LWZ)
3657 .addReg(Reg: PPC::X12)
3658 .addImm(Val: 0)
3659 .addReg(Reg: PPC::X12),
3660 STI: *Subtarget);
3661 // mtctr 12
3662 OutStreamer->emitInstruction(
3663 Inst: MCInstBuilder(IsPPC64 ? PPC::MTCTR8 : PPC::MTCTR).addReg(Reg: PPC::X12),
3664 STI: *Subtarget);
3665 // bctr
3666 OutStreamer->emitInstruction(Inst: MCInstBuilder(IsPPC64 ? PPC::BCTR8 : PPC::BCTR),
3667 STI: *Subtarget);
3668}
3669
3670char PPCAIXAsmPrinter::ID = 0;
3671
3672INITIALIZE_PASS(PPCAIXAsmPrinter, "ppc-aix-asm-printer",
3673 "AIX PPC Assembly Printer", false, false)
3674
3675// Force static initialization.
3676extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
3677LLVMInitializePowerPCAsmPrinter() {
3678 TargetRegistry::RegisterAsmPrinter(T&: getThePPC32Target(),
3679 Fn: createPPCAsmPrinterPass);
3680 TargetRegistry::RegisterAsmPrinter(T&: getThePPC32LETarget(),
3681 Fn: createPPCAsmPrinterPass);
3682 TargetRegistry::RegisterAsmPrinter(T&: getThePPC64Target(),
3683 Fn: createPPCAsmPrinterPass);
3684 TargetRegistry::RegisterAsmPrinter(T&: getThePPC64LETarget(),
3685 Fn: createPPCAsmPrinterPass);
3686}
3687