1//===-- WebAssemblySubtarget.cpp - WebAssembly Subtarget Information ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements the WebAssembly-specific subclass of
11/// TargetSubtarget.
12///
13//===----------------------------------------------------------------------===//
14
15#include "WebAssemblySubtarget.h"
16#include "GISel/WebAssemblyCallLowering.h"
17#include "GISel/WebAssemblyLegalizerInfo.h"
18#include "GISel/WebAssemblyRegisterBankInfo.h"
19#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
20#include "WebAssembly.h"
21#include "WebAssemblyInstrInfo.h"
22#include "WebAssemblyTargetMachine.h"
23#include "llvm/MC/TargetRegistry.h"
24using namespace llvm;
25
26#define DEBUG_TYPE "wasm-subtarget"
27
28#define GET_SUBTARGETINFO_CTOR
29#define GET_SUBTARGETINFO_TARGET_DESC
30#include "WebAssemblyGenSubtargetInfo.inc"
31
32WebAssemblySubtarget &
33WebAssemblySubtarget::initializeSubtargetDependencies(StringRef CPU,
34 StringRef FS) {
35 // Determine default and user-specified characteristics
36 LLVM_DEBUG(llvm::dbgs() << "initializeSubtargetDependencies\n");
37
38 if (CPU.empty())
39 CPU = "generic";
40
41 ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
42
43 // WASIP3 uses cooperative multithreading, which implies using libcall
44 // thread context.
45 if (TargetTriple.getOS() == Triple::WASIp3) {
46 HasCooperativeMultithreading = true;
47 HasLibcallThreadContext = true;
48 }
49
50 return *this;
51}
52
53WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT,
54 const std::string &CPU,
55 const std::string &FS,
56 const TargetMachine &TM)
57 : WebAssemblyGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
58 TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
59 TLInfo(TM, *this) {
60 CallLoweringInfo.reset(p: new WebAssemblyCallLowering(*getTargetLowering()));
61 Legalizer.reset(p: new WebAssemblyLegalizerInfo(*this));
62 auto *RBI = new WebAssemblyRegisterBankInfo(*getRegisterInfo());
63 RegBankInfo.reset(p: RBI);
64
65 InstSelector.reset(p: createWebAssemblyInstructionSelector(
66 *static_cast<const WebAssemblyTargetMachine *>(&TM), *this, *RBI));
67}
68
69bool WebAssemblySubtarget::enableAtomicExpand() const {
70 // If atomics are disabled, atomic ops are lowered instead of expanded
71 return hasAtomics();
72}
73
74bool WebAssemblySubtarget::enableMachineScheduler() const {
75 // Disable the MachineScheduler for now. Even with ShouldTrackPressure set and
76 // enableMachineSchedDefaultSched overridden, it appears to have an overall
77 // negative effect for the kinds of register optimizations we're doing.
78 return false;
79}
80
81bool WebAssemblySubtarget::useAA() const { return true; }
82
83const CallLowering *WebAssemblySubtarget::getCallLowering() const {
84 return CallLoweringInfo.get();
85}
86
87InstructionSelector *WebAssemblySubtarget::getInstructionSelector() const {
88 return InstSelector.get();
89}
90
91const LegalizerInfo *WebAssemblySubtarget::getLegalizerInfo() const {
92 return Legalizer.get();
93}
94
95const RegisterBankInfo *WebAssemblySubtarget::getRegBankInfo() const {
96 return RegBankInfo.get();
97}
98