1//===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file declares the targeting of the Machinelegalizer class for
10/// AMDGPU.
11/// \todo This should be generated by TableGen.
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
16
17#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
18#include "AMDGPUArgumentUsageInfo.h"
19#include "SIInstrInfo.h"
20
21namespace llvm {
22
23class GCNTargetMachine;
24class GCNSubtarget;
25class MachineIRBuilder;
26
27namespace AMDGPU {
28struct ImageDimIntrinsicInfo;
29}
30class AMDGPULegalizerInfo final : public LegalizerInfo {
31 const GCNSubtarget &ST;
32
33public:
34 AMDGPULegalizerInfo(const GCNSubtarget &ST,
35 const GCNTargetMachine &TM);
36
37 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
38 LostDebugLocObserver &LocObserver) const override;
39
40 Register getSegmentAperture(unsigned AddrSpace,
41 MachineRegisterInfo &MRI,
42 MachineIRBuilder &B) const;
43
44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
45 MachineIRBuilder &B) const;
46 bool legalizeFroundeven(MachineInstr &MI, MachineRegisterInfo &MRI,
47 MachineIRBuilder &B) const;
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
49 MachineIRBuilder &B) const;
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
51 MachineIRBuilder &B) const;
52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
53 MachineIRBuilder &B) const;
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
55 MachineIRBuilder &B, bool Signed) const;
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
57 MachineIRBuilder &B, bool Signed) const;
58 bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const;
59 bool legalizeExtract(LegalizerHelper &Helper, MachineInstr &MI) const;
60 bool legalizeInsert(LegalizerHelper &Helper, MachineInstr &MI) const;
61 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
62 MachineIRBuilder &B) const;
63 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
64 MachineIRBuilder &B) const;
65
66 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
67 MachineIRBuilder &B) const;
68
69 bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
70 const GlobalValue *GV, int64_t Offset,
71 unsigned GAFlags = SIInstrInfo::MO_NONE) const;
72
73 void buildAbsGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
74 const GlobalValue *GV,
75 MachineRegisterInfo &MRI) const;
76
77 bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
78 MachineIRBuilder &B) const;
79 bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
80 bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const;
81
82 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
83 MachineIRBuilder &B) const;
84
85 bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI,
86 MachineIRBuilder &B) const;
87
88 std::pair<Register, Register>
89 getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const;
90
91 bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const;
92 bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const;
93 bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
94 bool IsLog10, unsigned Flags) const;
95 bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const;
96 bool legalizeFExpUnsafeImpl(MachineIRBuilder &B, Register Dst, Register Src,
97 unsigned Flags, bool IsExp10) const;
98 bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
99 unsigned Flags) const;
100 bool legalizeFExp10Unsafe(MachineIRBuilder &B, Register Dst, Register Src,
101 unsigned Flags) const;
102
103 bool legalizeFEXPF64(MachineInstr &MI, MachineIRBuilder &B) const;
104
105 bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;
106 bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const;
107 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
108 MachineIRBuilder &B) const;
109
110 bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI,
111 MachineIRBuilder &B) const;
112
113 void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum,
114 ArrayRef<Register> Src0, ArrayRef<Register> Src1,
115 bool UsePartialMad64_32,
116 bool SeparateOddAlignedProducts) const;
117 bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const;
118 bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI,
119 MachineIRBuilder &B) const;
120 bool legalizeCTLZ_ZERO_UNDEF(MachineInstr &MI, MachineRegisterInfo &MRI,
121 MachineIRBuilder &B) const;
122
123 void buildLoadInputValue(Register DstReg, MachineIRBuilder &B,
124 const ArgDescriptor *Arg,
125 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
126 bool legalizeWorkGroupId(
127 MachineInstr &MI, MachineIRBuilder &B,
128 AMDGPUFunctionArgInfo::PreloadedValue ClusterIdPV,
129 AMDGPUFunctionArgInfo::PreloadedValue ClusterMaxIdPV,
130 AMDGPUFunctionArgInfo::PreloadedValue ClusterWorkGroupIdPV) const;
131 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
132 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
133
134 bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
135 MachineIRBuilder &B) const;
136
137 bool legalizePreloadedArgIntrin(
138 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
139 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
140 bool legalizeWorkitemIDIntrinsic(
141 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
142 unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
143
144 MachinePointerInfo getKernargSegmentPtrInfo(MachineFunction &MF) const;
145 Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const;
146 bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B,
147 uint64_t Offset,
148 Align Alignment = Align(4)) const;
149
150 bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
151 MachineIRBuilder &B) const;
152
153 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
154 Register DstRemReg, Register Num,
155 Register Den) const;
156
157 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
158 Register DstRemReg, Register Num,
159 Register Den) const;
160
161 bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
162 MachineIRBuilder &B) const;
163
164 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
165 MachineIRBuilder &B) const;
166 bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI,
167 MachineIRBuilder &B) const;
168 bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI,
169 MachineIRBuilder &B) const;
170 bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
171 MachineIRBuilder &B) const;
172 bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI,
173 MachineIRBuilder &B) const;
174 bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
175 MachineIRBuilder &B) const;
176 bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
177 MachineIRBuilder &B) const;
178 bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
179 MachineIRBuilder &B) const;
180
181 bool legalizeFSQRTF16(MachineInstr &MI, MachineRegisterInfo &MRI,
182 MachineIRBuilder &B) const;
183 bool legalizeFSQRTF32(MachineInstr &MI, MachineRegisterInfo &MRI,
184 MachineIRBuilder &B) const;
185 bool legalizeFSQRTF64(MachineInstr &MI, MachineRegisterInfo &MRI,
186 MachineIRBuilder &B) const;
187 bool legalizeFSQRT(MachineInstr &MI, MachineRegisterInfo &MRI,
188 MachineIRBuilder &B) const;
189
190 bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
191 MachineIRBuilder &B) const;
192
193 bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI,
194 MachineIRBuilder &B) const;
195
196 bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI,
197 MachineIRBuilder &B) const;
198
199 bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI,
200 MachineIRBuilder &B) const;
201
202 bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI,
203 MachineIRBuilder &B) const;
204
205 bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI,
206 MachineIRBuilder &B, unsigned AddrSpace) const;
207
208 std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B,
209 Register OrigOffset) const;
210
211 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
212 Register Reg, bool ImageStore = false) const;
213 Register fixStoreSourceType(MachineIRBuilder &B, Register VData, LLT MemTy,
214 bool IsFormat) const;
215
216 bool legalizeBufferStore(MachineInstr &MI, LegalizerHelper &Helper,
217 bool IsTyped, bool IsFormat) const;
218 bool legalizeBufferLoad(MachineInstr &MI, LegalizerHelper &Helper,
219 bool IsFormat, bool IsTyped) const;
220 bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B,
221 Intrinsic::ID IID) const;
222
223 bool legalizeBVHIntersectRayIntrinsic(MachineInstr &MI,
224 MachineIRBuilder &B) const;
225
226 bool legalizeBVHDualOrBVH8IntersectRayIntrinsic(MachineInstr &MI,
227 MachineIRBuilder &B) const;
228
229 bool legalizeLaneOp(LegalizerHelper &Helper, MachineInstr &MI,
230 Intrinsic::ID IID) const;
231
232 bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const;
233
234 bool legalizeStackSave(MachineInstr &MI, MachineIRBuilder &B) const;
235 bool legalizeWaveID(MachineInstr &MI, MachineIRBuilder &B) const;
236 bool legalizeConstHwRegRead(MachineInstr &MI, MachineIRBuilder &B,
237 AMDGPU::Hwreg::Id HwReg, unsigned LowBit,
238 unsigned Width) const;
239
240 bool legalizeGetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,
241 MachineIRBuilder &B) const;
242 bool legalizeSetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,
243 MachineIRBuilder &B) const;
244
245 bool legalizeImageIntrinsic(
246 MachineInstr &MI, MachineIRBuilder &B,
247 GISelChangeObserver &Observer,
248 const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const;
249
250 bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
251
252 bool legalizeSBufferPrefetch(LegalizerHelper &Helper, MachineInstr &MI) const;
253
254 bool legalizeTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
255 MachineIRBuilder &B) const;
256 bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI,
257 MachineIRBuilder &B) const;
258 bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI,
259 MachineIRBuilder &B) const;
260 bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI,
261 MachineIRBuilder &B) const;
262 bool legalizeDebugTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
263 MachineIRBuilder &B) const;
264
265 bool legalizeIntrinsic(LegalizerHelper &Helper,
266 MachineInstr &MI) const override;
267};
268} // End llvm namespace.
269#endif
270