1//===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file declares the targeting of the Machinelegalizer class for
10/// AMDGPU.
11/// \todo This should be generated by TableGen.
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
16
17#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
18#include "AMDGPUArgumentUsageInfo.h"
19#include "SIInstrInfo.h"
20
21namespace llvm {
22
23class GCNTargetMachine;
24class GCNSubtarget;
25class MachineIRBuilder;
26
27namespace AMDGPU {
28struct ImageDimIntrinsicInfo;
29}
30class AMDGPULegalizerInfo final : public LegalizerInfo {
31 const GCNSubtarget &ST;
32
33public:
34 AMDGPULegalizerInfo(const GCNSubtarget &ST,
35 const GCNTargetMachine &TM);
36
37 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
38 LostDebugLocObserver &LocObserver) const override;
39
40 Register getSegmentAperture(unsigned AddrSpace,
41 MachineRegisterInfo &MRI,
42 MachineIRBuilder &B) const;
43
44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
45 MachineIRBuilder &B) const;
46 bool legalizeFroundeven(MachineInstr &MI, MachineRegisterInfo &MRI,
47 MachineIRBuilder &B) const;
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
49 MachineIRBuilder &B) const;
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
51 MachineIRBuilder &B) const;
52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
53 MachineIRBuilder &B) const;
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
55 MachineIRBuilder &B, bool Signed) const;
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
57 MachineIRBuilder &B, bool Signed) const;
58 bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const;
59 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
60 MachineIRBuilder &B) const;
61 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
62 MachineIRBuilder &B) const;
63
64 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
65 MachineIRBuilder &B) const;
66
67 bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
68 const GlobalValue *GV, int64_t Offset,
69 unsigned GAFlags = SIInstrInfo::MO_NONE) const;
70
71 void buildAbsGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
72 const GlobalValue *GV,
73 MachineRegisterInfo &MRI) const;
74
75 bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
76 MachineIRBuilder &B) const;
77 bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
78 bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const;
79
80 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
81 MachineIRBuilder &B) const;
82
83 bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI,
84 MachineIRBuilder &B) const;
85
86 std::pair<Register, Register>
87 getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const;
88
89 bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const;
90 bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const;
91 bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
92 bool IsLog10, unsigned Flags) const;
93 bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const;
94 bool legalizeFExpUnsafeImpl(MachineIRBuilder &B, Register Dst, Register Src,
95 unsigned Flags, bool IsExp10) const;
96 bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
97 unsigned Flags) const;
98 bool legalizeFExp10Unsafe(MachineIRBuilder &B, Register Dst, Register Src,
99 unsigned Flags) const;
100 bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;
101 bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const;
102 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
103 MachineIRBuilder &B) const;
104
105 bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI,
106 MachineIRBuilder &B) const;
107
108 void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum,
109 ArrayRef<Register> Src0, ArrayRef<Register> Src1,
110 bool UsePartialMad64_32,
111 bool SeparateOddAlignedProducts) const;
112 bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const;
113 bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI,
114 MachineIRBuilder &B) const;
115 bool legalizeCTLZ_ZERO_UNDEF(MachineInstr &MI, MachineRegisterInfo &MRI,
116 MachineIRBuilder &B) const;
117
118 void buildLoadInputValue(Register DstReg, MachineIRBuilder &B,
119 const ArgDescriptor *Arg,
120 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
121 bool legalizeWorkGroupId(
122 MachineInstr &MI, MachineIRBuilder &B,
123 AMDGPUFunctionArgInfo::PreloadedValue ClusterIdPV,
124 AMDGPUFunctionArgInfo::PreloadedValue ClusterMaxIdPV,
125 AMDGPUFunctionArgInfo::PreloadedValue ClusterWorkGroupIdPV) const;
126 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
127 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
128
129 bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
130 MachineIRBuilder &B) const;
131
132 bool legalizePreloadedArgIntrin(
133 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
134 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
135 bool legalizeWorkitemIDIntrinsic(
136 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
137 unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
138
139 MachinePointerInfo getKernargSegmentPtrInfo(MachineFunction &MF) const;
140 Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const;
141 bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B,
142 uint64_t Offset,
143 Align Alignment = Align(4)) const;
144
145 bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
146 MachineIRBuilder &B) const;
147
148 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
149 Register DstRemReg, Register Num,
150 Register Den) const;
151
152 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
153 Register DstRemReg, Register Num,
154 Register Den) const;
155
156 bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
157 MachineIRBuilder &B) const;
158
159 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
160 MachineIRBuilder &B) const;
161 bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI,
162 MachineIRBuilder &B) const;
163 bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI,
164 MachineIRBuilder &B) const;
165 bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
166 MachineIRBuilder &B) const;
167 bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI,
168 MachineIRBuilder &B) const;
169 bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
170 MachineIRBuilder &B) const;
171 bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
172 MachineIRBuilder &B) const;
173 bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
174 MachineIRBuilder &B) const;
175
176 bool legalizeFSQRTF16(MachineInstr &MI, MachineRegisterInfo &MRI,
177 MachineIRBuilder &B) const;
178 bool legalizeFSQRTF32(MachineInstr &MI, MachineRegisterInfo &MRI,
179 MachineIRBuilder &B) const;
180 bool legalizeFSQRTF64(MachineInstr &MI, MachineRegisterInfo &MRI,
181 MachineIRBuilder &B) const;
182 bool legalizeFSQRT(MachineInstr &MI, MachineRegisterInfo &MRI,
183 MachineIRBuilder &B) const;
184
185 bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
186 MachineIRBuilder &B) const;
187
188 bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI,
189 MachineIRBuilder &B) const;
190
191 bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI,
192 MachineIRBuilder &B) const;
193
194 bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI,
195 MachineIRBuilder &B) const;
196
197 bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI,
198 MachineIRBuilder &B) const;
199
200 bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI,
201 MachineIRBuilder &B, unsigned AddrSpace) const;
202
203 std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B,
204 Register OrigOffset) const;
205
206 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
207 Register Reg, bool ImageStore = false) const;
208 Register fixStoreSourceType(MachineIRBuilder &B, Register VData, LLT MemTy,
209 bool IsFormat) const;
210
211 bool legalizeBufferStore(MachineInstr &MI, LegalizerHelper &Helper,
212 bool IsTyped, bool IsFormat) const;
213 bool legalizeBufferLoad(MachineInstr &MI, LegalizerHelper &Helper,
214 bool IsFormat, bool IsTyped) const;
215 bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B,
216 Intrinsic::ID IID) const;
217
218 bool legalizeBVHIntersectRayIntrinsic(MachineInstr &MI,
219 MachineIRBuilder &B) const;
220
221 bool legalizeBVHDualOrBVH8IntersectRayIntrinsic(MachineInstr &MI,
222 MachineIRBuilder &B) const;
223
224 bool legalizeLaneOp(LegalizerHelper &Helper, MachineInstr &MI,
225 Intrinsic::ID IID) const;
226
227 bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const;
228
229 bool legalizeStackSave(MachineInstr &MI, MachineIRBuilder &B) const;
230 bool legalizeWaveID(MachineInstr &MI, MachineIRBuilder &B) const;
231 bool legalizeConstHwRegRead(MachineInstr &MI, MachineIRBuilder &B,
232 AMDGPU::Hwreg::Id HwReg, unsigned LowBit,
233 unsigned Width) const;
234
235 bool legalizeGetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,
236 MachineIRBuilder &B) const;
237 bool legalizeSetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI,
238 MachineIRBuilder &B) const;
239
240 bool legalizeImageIntrinsic(
241 MachineInstr &MI, MachineIRBuilder &B,
242 GISelChangeObserver &Observer,
243 const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const;
244
245 bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
246
247 bool legalizeSBufferPrefetch(LegalizerHelper &Helper, MachineInstr &MI) const;
248
249 bool legalizeTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
250 MachineIRBuilder &B) const;
251 bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI,
252 MachineIRBuilder &B) const;
253 bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI,
254 MachineIRBuilder &B) const;
255 bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI,
256 MachineIRBuilder &B) const;
257 bool legalizeDebugTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
258 MachineIRBuilder &B) const;
259
260 bool legalizeIntrinsic(LegalizerHelper &Helper,
261 MachineInstr &MI) const override;
262};
263} // End llvm namespace.
264#endif
265