1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to X86 machine code.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86AsmPrinter.h"
15#include "MCTargetDesc/X86ATTInstPrinter.h"
16#include "MCTargetDesc/X86BaseInfo.h"
17#include "MCTargetDesc/X86MCTargetDesc.h"
18#include "MCTargetDesc/X86TargetStreamer.h"
19#include "TargetInfo/X86TargetInfo.h"
20#include "X86.h"
21#include "X86InstrInfo.h"
22#include "X86MachineFunctionInfo.h"
23#include "X86Subtarget.h"
24#include "llvm-c/Visibility.h"
25#include "llvm/Analysis/StaticDataProfileInfo.h"
26#include "llvm/BinaryFormat/COFF.h"
27#include "llvm/BinaryFormat/ELF.h"
28#include "llvm/CodeGen/MachineConstantPool.h"
29#include "llvm/CodeGen/MachineModuleInfoImpls.h"
30#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
31#include "llvm/CodeGenTypes/MachineValueType.h"
32#include "llvm/IR/DerivedTypes.h"
33#include "llvm/IR/InlineAsm.h"
34#include "llvm/IR/InstIterator.h"
35#include "llvm/IR/Mangler.h"
36#include "llvm/IR/Module.h"
37#include "llvm/IR/Type.h"
38#include "llvm/MC/MCAsmInfo.h"
39#include "llvm/MC/MCCodeEmitter.h"
40#include "llvm/MC/MCContext.h"
41#include "llvm/MC/MCExpr.h"
42#include "llvm/MC/MCInst.h"
43#include "llvm/MC/MCInstBuilder.h"
44#include "llvm/MC/MCSectionCOFF.h"
45#include "llvm/MC/MCSectionELF.h"
46#include "llvm/MC/MCSectionMachO.h"
47#include "llvm/MC/MCStreamer.h"
48#include "llvm/MC/MCSymbol.h"
49#include "llvm/MC/TargetRegistry.h"
50#include "llvm/Support/Debug.h"
51#include "llvm/Support/ErrorHandling.h"
52#include "llvm/Target/TargetMachine.h"
53
54using namespace llvm;
55
56X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
57 std::unique_ptr<MCStreamer> Streamer)
58 : AsmPrinter(TM, std::move(Streamer), ID), FM(*this) {
59 GetPSI = [this](Module &M) -> ProfileSummaryInfo * {
60 if (auto *PSIW = getAnalysisIfAvailable<ProfileSummaryInfoWrapperPass>())
61 return &PSIW->getPSI();
62 return nullptr;
63 };
64 GetSDPI = [this](Module &M) -> StaticDataProfileInfo * {
65 if (auto *SDPIW =
66 getAnalysisIfAvailable<StaticDataProfileInfoWrapperPass>())
67 return &SDPIW->getStaticDataProfileInfo();
68 return nullptr;
69 };
70}
71
72//===----------------------------------------------------------------------===//
73// Primitive Helper Functions.
74//===----------------------------------------------------------------------===//
75
76/// runOnMachineFunction - Emit the function body.
77///
78bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
79 PSI = GetPSI(*MF.getFunction().getParent());
80 SDPI = GetSDPI(*MF.getFunction().getParent());
81
82 Subtarget = &MF.getSubtarget<X86Subtarget>();
83
84 SMShadowTracker.startFunction(MF);
85 CodeEmitter.reset(p: TM.getTarget().createMCCodeEmitter(
86 II: *Subtarget->getInstrInfo(), Ctx&: MF.getContext()));
87
88 const Module *M = MF.getFunction().getParent();
89 EmitFPOData = Subtarget->isTargetWin32() && M->getCodeViewFlag();
90
91 IndCSPrefix = M->getModuleFlag(Key: "indirect_branch_cs_prefix");
92
93 SetupMachineFunction(MF);
94
95 if (Subtarget->isTargetCOFF()) {
96 bool Local = MF.getFunction().hasLocalLinkage();
97 OutStreamer->beginCOFFSymbolDef(Symbol: CurrentFnSym);
98 OutStreamer->emitCOFFSymbolStorageClass(
99 StorageClass: Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
100 OutStreamer->emitCOFFSymbolType(Type: COFF::IMAGE_SYM_DTYPE_FUNCTION
101 << COFF::SCT_COMPLEX_TYPE_SHIFT);
102 OutStreamer->endCOFFSymbolDef();
103 }
104
105 // Emit the rest of the function body.
106 emitFunctionBody();
107
108 // Emit the XRay table for this function.
109 emitXRayTable();
110
111 EmitFPOData = false;
112
113 IndCSPrefix = false;
114
115 // We didn't modify anything.
116 return false;
117}
118
119void X86AsmPrinter::emitFunctionBodyStart() {
120 if (EmitFPOData) {
121 auto *XTS =
122 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
123 XTS->emitFPOProc(
124 ProcSym: CurrentFnSym,
125 ParamsSize: MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize());
126 }
127}
128
129void X86AsmPrinter::emitFunctionBodyEnd() {
130 if (EmitFPOData) {
131 auto *XTS =
132 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
133 XTS->emitFPOEndProc();
134 }
135}
136
137uint32_t X86AsmPrinter::MaskKCFIType(uint32_t Value) {
138 // If the type hash matches an invalid pattern, mask the value.
139 const uint32_t InvalidValues[] = {
140 0xFA1E0FF3, /* ENDBR64 */
141 0xFB1E0FF3, /* ENDBR32 */
142 };
143 for (uint32_t N : InvalidValues) {
144 // LowerKCFI_CHECK emits -Value for indirect call checks, so we must also
145 // mask that. Note that -(Value + 1) == ~Value.
146 if (N == Value || -N == Value)
147 return Value + 1;
148 }
149 return Value;
150}
151
152void X86AsmPrinter::EmitKCFITypePadding(const MachineFunction &MF,
153 bool HasType) {
154 // Keep the function entry aligned, taking patchable-function-prefix into
155 // account if set.
156 int64_t PrefixBytes = 0;
157 (void)MF.getFunction()
158 .getFnAttribute(Kind: "patchable-function-prefix")
159 .getValueAsString()
160 .getAsInteger(Radix: 10, Result&: PrefixBytes);
161
162 // Also take the type identifier into account if we're emitting
163 // one. Otherwise, just pad with nops. The X86::MOV32ri instruction emitted
164 // in X86AsmPrinter::emitKCFITypeId is 5 bytes long.
165 if (HasType)
166 PrefixBytes += 5;
167
168 emitNops(N: offsetToAlignment(Value: PrefixBytes, Alignment: MF.getPreferredAlignment()));
169}
170
171/// emitKCFITypeId - Emit the KCFI type information in architecture specific
172/// format.
173void X86AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
174 const Function &F = MF.getFunction();
175 if (!F.getParent()->getModuleFlag(Key: "kcfi"))
176 return;
177
178 ConstantInt *Type = nullptr;
179 if (const MDNode *MD = F.getMetadata(KindID: LLVMContext::MD_kcfi_type))
180 Type = mdconst::extract<ConstantInt>(MD: MD->getOperand(I: 0));
181
182 // If we don't have a type to emit, just emit padding if needed to maintain
183 // the same alignment for all functions.
184 if (!Type) {
185 EmitKCFITypePadding(MF, /*HasType=*/false);
186 return;
187 }
188
189 // Emit a function symbol for the type data to avoid unreachable instruction
190 // warnings from binary validation tools, and use the same linkage as the
191 // parent function. Note that using local linkage would result in duplicate
192 // symbols for weak parent functions.
193 MCSymbol *FnSym = OutContext.getOrCreateSymbol(Name: "__cfi_" + MF.getName());
194 emitLinkage(GV: &MF.getFunction(), GVSym: FnSym);
195 if (MAI->hasDotTypeDotSizeDirective())
196 OutStreamer->emitSymbolAttribute(Symbol: FnSym, Attribute: MCSA_ELF_TypeFunction);
197 OutStreamer->emitLabel(Symbol: FnSym);
198
199 // Embed the type hash in the X86::MOV32ri instruction to avoid special
200 // casing object file parsers.
201 EmitKCFITypePadding(MF);
202 unsigned DestReg = X86::EAX;
203
204 if (F.getParent()->getModuleFlag(Key: "kcfi-arity")) {
205 // The ArityToRegMap assumes the 64-bit SysV ABI.
206 [[maybe_unused]] const auto &Triple = MF.getTarget().getTargetTriple();
207 assert(Triple.isX86_64() && !Triple.isOSWindows());
208
209 // Determine the function's arity (i.e., the number of arguments) at the ABI
210 // level by counting the number of parameters that are passed
211 // as registers, such as pointers and 64-bit (or smaller) integers. The
212 // Linux x86-64 ABI allows up to 6 integer parameters to be passed in GPRs.
213 // Additional parameters or parameters larger than 64 bits may be passed on
214 // the stack, in which case the arity is denoted as 7. Floating-point
215 // arguments passed in XMM0-XMM7 are not counted toward arity because
216 // floating-point values are not relevant to enforcing kCFI at this time.
217 const unsigned ArityToRegMap[8] = {X86::EAX, X86::ECX, X86::EDX, X86::EBX,
218 X86::ESP, X86::EBP, X86::ESI, X86::EDI};
219 int Arity;
220 if (MF.getInfo<X86MachineFunctionInfo>()->getArgumentStackSize() > 0) {
221 Arity = 7;
222 } else {
223 Arity = 0;
224 for (const auto &LI : MF.getRegInfo().liveins()) {
225 auto Reg = LI.first;
226 if (X86::GR8RegClass.contains(Reg) || X86::GR16RegClass.contains(Reg) ||
227 X86::GR32RegClass.contains(Reg) ||
228 X86::GR64RegClass.contains(Reg)) {
229 ++Arity;
230 }
231 }
232 }
233 DestReg = ArityToRegMap[Arity];
234 }
235
236 EmitAndCountInstruction(Inst&: MCInstBuilder(X86::MOV32ri)
237 .addReg(Reg: DestReg)
238 .addImm(Val: MaskKCFIType(Value: Type->getZExtValue())));
239
240 if (MAI->hasDotTypeDotSizeDirective()) {
241 MCSymbol *EndSym = OutContext.createTempSymbol(Name: "cfi_func_end");
242 OutStreamer->emitLabel(Symbol: EndSym);
243
244 const MCExpr *SizeExp = MCBinaryExpr::createSub(
245 LHS: MCSymbolRefExpr::create(Symbol: EndSym, Ctx&: OutContext),
246 RHS: MCSymbolRefExpr::create(Symbol: FnSym, Ctx&: OutContext), Ctx&: OutContext);
247 OutStreamer->emitELFSize(Symbol: FnSym, Value: SizeExp);
248 }
249}
250
251/// PrintSymbolOperand - Print a raw symbol reference operand. This handles
252/// jump tables, constant pools, global address and external symbols, all of
253/// which print to a label with various suffixes for relocation types etc.
254void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
255 raw_ostream &O) {
256 switch (MO.getType()) {
257 default: llvm_unreachable("unknown symbol type!");
258 case MachineOperand::MO_ConstantPoolIndex:
259 GetCPISymbol(CPID: MO.getIndex())->print(OS&: O, MAI);
260 printOffset(Offset: MO.getOffset(), OS&: O);
261 break;
262 case MachineOperand::MO_GlobalAddress: {
263 const GlobalValue *GV = MO.getGlobal();
264
265 MCSymbol *GVSym;
266 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
267 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
268 GVSym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
269 else
270 GVSym = getSymbolPreferLocal(GV: *GV);
271
272 // Handle dllimport linkage.
273 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
274 GVSym = OutContext.getOrCreateSymbol(Name: Twine("__imp_") + GVSym->getName());
275 else if (MO.getTargetFlags() == X86II::MO_COFFSTUB)
276 GVSym =
277 OutContext.getOrCreateSymbol(Name: Twine(".refptr.") + GVSym->getName());
278
279 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
280 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
281 MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
282 MachineModuleInfoImpl::StubValueTy &StubSym =
283 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
284 if (!StubSym.getPointer())
285 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
286 !GV->hasInternalLinkage());
287 }
288
289 // If the name begins with a dollar-sign, enclose it in parens. We do this
290 // to avoid having it look like an integer immediate to the assembler.
291 if (GVSym->getName()[0] != '$')
292 GVSym->print(OS&: O, MAI);
293 else {
294 O << '(';
295 GVSym->print(OS&: O, MAI);
296 O << ')';
297 }
298 printOffset(Offset: MO.getOffset(), OS&: O);
299 break;
300 }
301 }
302
303 switch (MO.getTargetFlags()) {
304 default:
305 llvm_unreachable("Unknown target flag on GV operand");
306 case X86II::MO_NO_FLAG: // No flag.
307 break;
308 case X86II::MO_DARWIN_NONLAZY:
309 case X86II::MO_DLLIMPORT:
310 case X86II::MO_COFFSTUB:
311 // These affect the name of the symbol, not any suffix.
312 break;
313 case X86II::MO_GOT_ABSOLUTE_ADDRESS:
314 O << " + [.-";
315 MF->getPICBaseSymbol()->print(OS&: O, MAI);
316 O << ']';
317 break;
318 case X86II::MO_PIC_BASE_OFFSET:
319 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
320 O << '-';
321 MF->getPICBaseSymbol()->print(OS&: O, MAI);
322 break;
323 case X86II::MO_TLSGD: O << "@TLSGD"; break;
324 case X86II::MO_TLSLD: O << "@TLSLD"; break;
325 case X86II::MO_TLSLDM: O << "@TLSLDM"; break;
326 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
327 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
328 case X86II::MO_TPOFF: O << "@TPOFF"; break;
329 case X86II::MO_DTPOFF: O << "@DTPOFF"; break;
330 case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
331 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
332 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
333 case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break;
334 case X86II::MO_GOT: O << "@GOT"; break;
335 case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
336 case X86II::MO_PLT: O << "@PLT"; break;
337 case X86II::MO_TLVP: O << "@TLVP"; break;
338 case X86II::MO_TLVP_PIC_BASE:
339 O << "@TLVP" << '-';
340 MF->getPICBaseSymbol()->print(OS&: O, MAI);
341 break;
342 case X86II::MO_SECREL: O << "@SECREL32"; break;
343 }
344}
345
346void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo,
347 raw_ostream &O) {
348 const MachineOperand &MO = MI->getOperand(i: OpNo);
349 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
350 switch (MO.getType()) {
351 default: llvm_unreachable("unknown operand type!");
352 case MachineOperand::MO_Register: {
353 if (IsATT)
354 O << '%';
355 O << X86ATTInstPrinter::getRegisterName(Reg: MO.getReg());
356 return;
357 }
358
359 case MachineOperand::MO_Immediate:
360 if (IsATT)
361 O << '$';
362 O << MO.getImm();
363 return;
364
365 case MachineOperand::MO_ConstantPoolIndex:
366 case MachineOperand::MO_GlobalAddress: {
367 switch (MI->getInlineAsmDialect()) {
368 case InlineAsm::AD_ATT:
369 O << '$';
370 break;
371 case InlineAsm::AD_Intel:
372 O << "offset ";
373 break;
374 }
375 PrintSymbolOperand(MO, O);
376 break;
377 }
378 case MachineOperand::MO_BlockAddress: {
379 MCSymbol *Sym = GetBlockAddressSymbol(BA: MO.getBlockAddress());
380 Sym->print(OS&: O, MAI);
381 break;
382 }
383 }
384}
385
386/// PrintModifiedOperand - Print subregisters based on supplied modifier,
387/// deferring to PrintOperand() if no modifier was supplied or if operand is not
388/// a register.
389void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
390 raw_ostream &O, StringRef Modifier) {
391 const MachineOperand &MO = MI->getOperand(i: OpNo);
392 if (Modifier.empty() || !MO.isReg())
393 return PrintOperand(MI, OpNo, O);
394 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
395 O << '%';
396 Register Reg = MO.getReg();
397 if (Modifier.consume_front(Prefix: "subreg")) {
398 unsigned Size = (Modifier == "64") ? 64
399 : (Modifier == "32") ? 32
400 : (Modifier == "16") ? 16
401 : 8;
402 Reg = getX86SubSuperRegister(Reg, Size);
403 }
404 O << X86ATTInstPrinter::getRegisterName(Reg);
405}
406
407/// PrintPCRelImm - This is used to print an immediate value that ends up
408/// being encoded as a pc-relative value. These print slightly differently, for
409/// example, a $ is not emitted.
410void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo,
411 raw_ostream &O) {
412 const MachineOperand &MO = MI->getOperand(i: OpNo);
413 switch (MO.getType()) {
414 default: llvm_unreachable("Unknown pcrel immediate operand");
415 case MachineOperand::MO_Register:
416 // pc-relativeness was handled when computing the value in the reg.
417 PrintOperand(MI, OpNo, O);
418 return;
419 case MachineOperand::MO_Immediate:
420 O << MO.getImm();
421 return;
422 case MachineOperand::MO_GlobalAddress:
423 PrintSymbolOperand(MO, O);
424 return;
425 }
426}
427
428void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
429 raw_ostream &O, StringRef Modifier) {
430 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
431 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
432 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
433
434 // If we really don't want to print out (rip), don't.
435 bool HasBaseReg = BaseReg.getReg() != 0;
436 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
437 HasBaseReg = false;
438
439 // HasParenPart - True if we will print out the () part of the mem ref.
440 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
441
442 switch (DispSpec.getType()) {
443 default:
444 llvm_unreachable("unknown operand type!");
445 case MachineOperand::MO_Immediate: {
446 int DispVal = DispSpec.getImm();
447 if (DispVal || !HasParenPart)
448 O << DispVal;
449 break;
450 }
451 case MachineOperand::MO_GlobalAddress:
452 case MachineOperand::MO_ConstantPoolIndex:
453 PrintSymbolOperand(MO: DispSpec, O);
454 break;
455 }
456
457 if (Modifier == "H")
458 O << "+8";
459
460 if (HasParenPart) {
461 assert(IndexReg.getReg() != X86::ESP &&
462 "X86 doesn't allow scaling by ESP");
463
464 O << '(';
465 if (HasBaseReg)
466 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O, Modifier);
467
468 if (IndexReg.getReg()) {
469 O << ',';
470 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O, Modifier);
471 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
472 if (ScaleVal != 1)
473 O << ',' << ScaleVal;
474 }
475 O << ')';
476 }
477}
478
479static bool isSimpleReturn(const MachineInstr &MI) {
480 // We exclude all tail calls here which set both isReturn and isCall.
481 return MI.getDesc().isReturn() && !MI.getDesc().isCall();
482}
483
484static bool isIndirectBranchOrTailCall(const MachineInstr &MI) {
485 unsigned Opc = MI.getOpcode();
486 return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ ||
487 Opc == X86::TAILJMPr || Opc == X86::TAILJMPm ||
488 Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 ||
489 Opc == X86::TCRETURNri || Opc == X86::TCRETURN_WIN64ri ||
490 Opc == X86::TCRETURN_HIPE32ri || Opc == X86::TCRETURNmi ||
491 Opc == X86::TCRETURN_WINmi64 || Opc == X86::TCRETURNri64 ||
492 Opc == X86::TCRETURNmi64 || Opc == X86::TCRETURNri64_ImpCall ||
493 Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX;
494}
495
496void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) {
497 if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) {
498 auto I = MBB.getLastNonDebugInstr();
499 if (I != MBB.end()) {
500 if ((Subtarget->hardenSlsRet() && isSimpleReturn(MI: *I)) ||
501 (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(MI: *I))) {
502 MCInst TmpInst;
503 TmpInst.setOpcode(X86::INT3);
504 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
505 }
506 }
507 }
508 if (SplitChainedAtEndOfBlock) {
509 OutStreamer->emitWinCFISplitChained();
510 // Splitting into a new unwind info implicitly starts a prolog. We have no
511 // instructions to add to the prolog, so immediately end it.
512 OutStreamer->emitWinCFIEndProlog();
513 SplitChainedAtEndOfBlock = false;
514 }
515 AsmPrinter::emitBasicBlockEnd(MBB);
516 SMShadowTracker.emitShadowPadding(OutStreamer&: *OutStreamer, STI: getSubtargetInfo());
517}
518
519void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
520 raw_ostream &O, StringRef Modifier) {
521 assert(isMem(*MI, OpNo) && "Invalid memory reference!");
522 const MachineOperand &Segment = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
523 if (Segment.getReg()) {
524 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O, Modifier);
525 O << ':';
526 }
527 PrintLeaMemReference(MI, OpNo, O, Modifier);
528}
529
530void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
531 unsigned OpNo, raw_ostream &O,
532 StringRef Modifier) {
533 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
534 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
535 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
536 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
537 const MachineOperand &SegReg = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
538
539 // If we really don't want to print out (rip), don't.
540 bool HasBaseReg = BaseReg.getReg() != 0;
541 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
542 HasBaseReg = false;
543
544 // If we really just want to print out displacement.
545 if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only") {
546 HasBaseReg = false;
547 }
548
549 // If this has a segment register, print it.
550 if (SegReg.getReg()) {
551 PrintOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O);
552 O << ':';
553 }
554
555 O << '[';
556
557 bool NeedPlus = false;
558 if (HasBaseReg) {
559 PrintOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O);
560 NeedPlus = true;
561 }
562
563 if (IndexReg.getReg()) {
564 if (NeedPlus) O << " + ";
565 if (ScaleVal != 1)
566 O << ScaleVal << '*';
567 PrintOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O);
568 NeedPlus = true;
569 }
570
571 if (!DispSpec.isImm()) {
572 if (NeedPlus) O << " + ";
573 // Do not add `offset` operator. Matches the behaviour of
574 // X86IntelInstPrinter::printMemReference.
575 PrintSymbolOperand(MO: DispSpec, O);
576 } else {
577 int64_t DispVal = DispSpec.getImm();
578 if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
579 if (NeedPlus) {
580 if (DispVal > 0)
581 O << " + ";
582 else {
583 O << " - ";
584 DispVal = -DispVal;
585 }
586 }
587 O << DispVal;
588 }
589 }
590 O << ']';
591}
592
593const MCSubtargetInfo *X86AsmPrinter::getIFuncMCSubtargetInfo() const {
594 assert(Subtarget);
595 return Subtarget;
596}
597
598void X86AsmPrinter::emitMachOIFuncStubBody(Module &M, const GlobalIFunc &GI,
599 MCSymbol *LazyPointer) {
600 // _ifunc:
601 // jmpq *lazy_pointer(%rip)
602
603 OutStreamer->emitInstruction(
604 Inst: MCInstBuilder(X86::JMP32m)
605 .addReg(Reg: X86::RIP)
606 .addImm(Val: 1)
607 .addReg(Reg: 0)
608 .addOperand(Op: MCOperand::createExpr(
609 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
610 .addReg(Reg: 0),
611 STI: *Subtarget);
612}
613
614void X86AsmPrinter::emitMachOIFuncStubHelperBody(Module &M,
615 const GlobalIFunc &GI,
616 MCSymbol *LazyPointer) {
617 // _ifunc.stub_helper:
618 // push %rax
619 // push %rdi
620 // push %rsi
621 // push %rdx
622 // push %rcx
623 // push %r8
624 // push %r9
625 // callq foo
626 // movq %rax,lazy_pointer(%rip)
627 // pop %r9
628 // pop %r8
629 // pop %rcx
630 // pop %rdx
631 // pop %rsi
632 // pop %rdi
633 // pop %rax
634 // jmpq *lazy_pointer(%rip)
635
636 for (int Reg :
637 {X86::RAX, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9})
638 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::PUSH64r).addReg(Reg),
639 STI: *Subtarget);
640
641 OutStreamer->emitInstruction(
642 Inst: MCInstBuilder(X86::CALL64pcrel32)
643 .addOperand(Op: MCOperand::createExpr(Val: lowerConstant(CV: GI.getResolver()))),
644 STI: *Subtarget);
645
646 OutStreamer->emitInstruction(
647 Inst: MCInstBuilder(X86::MOV64mr)
648 .addReg(Reg: X86::RIP)
649 .addImm(Val: 1)
650 .addReg(Reg: 0)
651 .addOperand(Op: MCOperand::createExpr(
652 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
653 .addReg(Reg: 0)
654 .addReg(Reg: X86::RAX),
655 STI: *Subtarget);
656
657 for (int Reg :
658 {X86::R9, X86::R8, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RAX})
659 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::POP64r).addReg(Reg),
660 STI: *Subtarget);
661
662 OutStreamer->emitInstruction(
663 Inst: MCInstBuilder(X86::JMP32m)
664 .addReg(Reg: X86::RIP)
665 .addImm(Val: 1)
666 .addReg(Reg: 0)
667 .addOperand(Op: MCOperand::createExpr(
668 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
669 .addReg(Reg: 0),
670 STI: *Subtarget);
671}
672
673static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO,
674 char Mode, raw_ostream &O) {
675 Register Reg = MO.getReg();
676 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
677
678 if (!X86::GR8RegClass.contains(Reg) &&
679 !X86::GR16RegClass.contains(Reg) &&
680 !X86::GR32RegClass.contains(Reg) &&
681 !X86::GR64RegClass.contains(Reg))
682 return true;
683
684 switch (Mode) {
685 default: return true; // Unknown mode.
686 case 'b': // Print QImode register
687 Reg = getX86SubSuperRegister(Reg, Size: 8);
688 break;
689 case 'h': // Print QImode high register
690 Reg = getX86SubSuperRegister(Reg, Size: 8, High: true);
691 if (!Reg.isValid())
692 return true;
693 break;
694 case 'w': // Print HImode register
695 Reg = getX86SubSuperRegister(Reg, Size: 16);
696 break;
697 case 'k': // Print SImode register
698 Reg = getX86SubSuperRegister(Reg, Size: 32);
699 break;
700 case 'V':
701 EmitPercent = false;
702 [[fallthrough]];
703 case 'q':
704 // Print 64-bit register names if 64-bit integer registers are available.
705 // Otherwise, print 32-bit register names.
706 Reg = getX86SubSuperRegister(Reg, Size: P.getSubtarget().is64Bit() ? 64 : 32);
707 break;
708 }
709
710 if (EmitPercent)
711 O << '%';
712
713 O << X86ATTInstPrinter::getRegisterName(Reg);
714 return false;
715}
716
717static bool printAsmVRegister(const MachineOperand &MO, char Mode,
718 raw_ostream &O) {
719 Register Reg = MO.getReg();
720 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
721
722 unsigned Index;
723 if (X86::VR128XRegClass.contains(Reg))
724 Index = Reg - X86::XMM0;
725 else if (X86::VR256XRegClass.contains(Reg))
726 Index = Reg - X86::YMM0;
727 else if (X86::VR512RegClass.contains(Reg))
728 Index = Reg - X86::ZMM0;
729 else
730 return true;
731
732 switch (Mode) {
733 default: // Unknown mode.
734 return true;
735 case 'x': // Print V4SFmode register
736 Reg = X86::XMM0 + Index;
737 break;
738 case 't': // Print V8SFmode register
739 Reg = X86::YMM0 + Index;
740 break;
741 case 'g': // Print V16SFmode register
742 Reg = X86::ZMM0 + Index;
743 break;
744 }
745
746 if (EmitPercent)
747 O << '%';
748
749 O << X86ATTInstPrinter::getRegisterName(Reg);
750 return false;
751}
752
753/// PrintAsmOperand - Print out an operand for an inline asm expression.
754///
755bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
756 const char *ExtraCode, raw_ostream &O) {
757 // Does this asm operand have a single letter operand modifier?
758 if (ExtraCode && ExtraCode[0]) {
759 if (ExtraCode[1] != 0) return true; // Unknown modifier.
760
761 const MachineOperand &MO = MI->getOperand(i: OpNo);
762
763 switch (ExtraCode[0]) {
764 default:
765 // See if this is a generic print operand
766 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS&: O);
767 case 'a': // This is an address. Currently only 'i' and 'r' are expected.
768 switch (MO.getType()) {
769 default:
770 return true;
771 case MachineOperand::MO_Immediate:
772 O << MO.getImm();
773 return false;
774 case MachineOperand::MO_ConstantPoolIndex:
775 case MachineOperand::MO_JumpTableIndex:
776 case MachineOperand::MO_ExternalSymbol:
777 llvm_unreachable("unexpected operand type!");
778 case MachineOperand::MO_GlobalAddress:
779 PrintSymbolOperand(MO, O);
780 if (Subtarget->is64Bit())
781 O << "(%rip)";
782 return false;
783 case MachineOperand::MO_Register:
784 O << '(';
785 PrintOperand(MI, OpNo, O);
786 O << ')';
787 return false;
788 }
789
790 case 'c': // Don't print "$" before a global var name or constant.
791 switch (MO.getType()) {
792 default:
793 PrintOperand(MI, OpNo, O);
794 break;
795 case MachineOperand::MO_Immediate:
796 O << MO.getImm();
797 break;
798 case MachineOperand::MO_ConstantPoolIndex:
799 case MachineOperand::MO_JumpTableIndex:
800 case MachineOperand::MO_ExternalSymbol:
801 llvm_unreachable("unexpected operand type!");
802 case MachineOperand::MO_GlobalAddress:
803 PrintSymbolOperand(MO, O);
804 break;
805 }
806 return false;
807
808 case 'A': // Print '*' before a register (it must be a register)
809 if (MO.isReg()) {
810 O << '*';
811 PrintOperand(MI, OpNo, O);
812 return false;
813 }
814 return true;
815
816 case 'b': // Print QImode register
817 case 'h': // Print QImode high register
818 case 'w': // Print HImode register
819 case 'k': // Print SImode register
820 case 'q': // Print DImode register
821 case 'V': // Print native register without '%'
822 if (MO.isReg())
823 return printAsmMRegister(P: *this, MO, Mode: ExtraCode[0], O);
824 PrintOperand(MI, OpNo, O);
825 return false;
826
827 case 'x': // Print V4SFmode register
828 case 't': // Print V8SFmode register
829 case 'g': // Print V16SFmode register
830 if (MO.isReg())
831 return printAsmVRegister(MO, Mode: ExtraCode[0], O);
832 PrintOperand(MI, OpNo, O);
833 return false;
834
835 case 'p': {
836 const MachineOperand &MO = MI->getOperand(i: OpNo);
837 if (MO.getType() != MachineOperand::MO_GlobalAddress)
838 return true;
839 PrintSymbolOperand(MO, O);
840 return false;
841 }
842
843 case 'P': // This is the operand of a call, treat specially.
844 PrintPCRelImm(MI, OpNo, O);
845 return false;
846
847 case 'n': // Negate the immediate or print a '-' before the operand.
848 // Note: this is a temporary solution. It should be handled target
849 // independently as part of the 'MC' work.
850 if (MO.isImm()) {
851 O << -MO.getImm();
852 return false;
853 }
854 O << '-';
855 }
856 }
857
858 PrintOperand(MI, OpNo, O);
859 return false;
860}
861
862bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
863 const char *ExtraCode,
864 raw_ostream &O) {
865 if (ExtraCode && ExtraCode[0]) {
866 if (ExtraCode[1] != 0) return true; // Unknown modifier.
867
868 switch (ExtraCode[0]) {
869 default: return true; // Unknown modifier.
870 case 'b': // Print QImode register
871 case 'h': // Print QImode high register
872 case 'w': // Print HImode register
873 case 'k': // Print SImode register
874 case 'q': // Print SImode register
875 // These only apply to registers, ignore on mem.
876 break;
877 case 'H':
878 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
879 return true; // Unsupported modifier in Intel inline assembly.
880 } else {
881 PrintMemReference(MI, OpNo, O, Modifier: "H");
882 }
883 return false;
884 // Print memory only with displacement. The Modifer 'P' is used in inline
885 // asm to present a call symbol or a global symbol which can not use base
886 // reg or index reg.
887 case 'P':
888 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
889 PrintIntelMemReference(MI, OpNo, O, Modifier: "disp-only");
890 } else {
891 PrintMemReference(MI, OpNo, O, Modifier: "disp-only");
892 }
893 return false;
894 }
895 }
896 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
897 PrintIntelMemReference(MI, OpNo, O);
898 } else {
899 PrintMemReference(MI, OpNo, O);
900 }
901 return false;
902}
903
904void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
905 const Triple &TT = TM.getTargetTriple();
906
907 if (TT.isOSBinFormatELF()) {
908 // Assemble feature flags that may require creation of a note section.
909 unsigned FeatureFlagsAnd = 0;
910 if (M.getModuleFlag(Key: "cf-protection-branch"))
911 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
912 if (M.getModuleFlag(Key: "cf-protection-return"))
913 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
914
915 if (FeatureFlagsAnd) {
916 // Emit a .note.gnu.property section with the flags.
917 assert((TT.isX86_32() || TT.isX86_64()) &&
918 "CFProtection used on invalid architecture!");
919 MCSection *Cur = OutStreamer->getCurrentSectionOnly();
920 MCSection *Nt = MMI->getContext().getELFSection(
921 Section: ".note.gnu.property", Type: ELF::SHT_NOTE, Flags: ELF::SHF_ALLOC);
922 OutStreamer->switchSection(Section: Nt);
923
924 // Emitting note header.
925 const int WordSize = TT.isX86_64() && !TT.isX32() ? 8 : 4;
926 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8));
927 OutStreamer->emitIntValue(Value: 4, Size: 4 /*size*/); // data size for "GNU\0"
928 OutStreamer->emitIntValue(Value: 8 + WordSize, Size: 4 /*size*/); // Elf_Prop size
929 OutStreamer->emitIntValue(Value: ELF::NT_GNU_PROPERTY_TYPE_0, Size: 4 /*size*/);
930 OutStreamer->emitBytes(Data: StringRef("GNU", 4)); // note name
931
932 // Emitting an Elf_Prop for the CET properties.
933 OutStreamer->emitInt32(Value: ELF::GNU_PROPERTY_X86_FEATURE_1_AND);
934 OutStreamer->emitInt32(Value: 4); // data size
935 OutStreamer->emitInt32(Value: FeatureFlagsAnd); // data
936 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8)); // padding
937
938 OutStreamer->switchSection(Section: Cur);
939 }
940 }
941
942 if (TT.isOSBinFormatMachO())
943 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
944
945 if (TT.isOSBinFormatCOFF()) {
946 emitCOFFFeatureSymbol(M);
947 emitCOFFReplaceableFunctionData(M);
948
949 if (M.getModuleFlag(Key: "import-call-optimization"))
950 EnableImportCallOptimization = true;
951 }
952
953 // TODO: Support prefixed registers for the Intel syntax.
954 const bool IntelSyntax = MAI->getAssemblerDialect() == InlineAsm::AD_Intel;
955 OutStreamer->emitSyntaxDirective(Syntax: IntelSyntax ? "intel" : "att",
956 Options: IntelSyntax ? "noprefix" : "");
957
958 // If this is not inline asm and we're in 16-bit
959 // mode prefix assembly with .code16.
960 bool is16 = TT.getEnvironment() == Triple::CODE16;
961 if (M.getModuleInlineAsm().empty() && is16) {
962 auto *XTS =
963 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
964 XTS->emitCode16();
965 }
966}
967
968static void
969emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
970 MachineModuleInfoImpl::StubValueTy &MCSym) {
971 // L_foo$stub:
972 OutStreamer.emitLabel(Symbol: StubLabel);
973 // .indirect_symbol _foo
974 OutStreamer.emitSymbolAttribute(Symbol: MCSym.getPointer(), Attribute: MCSA_IndirectSymbol);
975
976 if (MCSym.getInt())
977 // External to current translation unit.
978 OutStreamer.emitIntValue(Value: 0, Size: 4/*size*/);
979 else
980 // Internal to current translation unit.
981 //
982 // When we place the LSDA into the TEXT section, the type info
983 // pointers need to be indirect and pc-rel. We accomplish this by
984 // using NLPs; however, sometimes the types are local to the file.
985 // We need to fill in the value for the NLP in those cases.
986 OutStreamer.emitValue(
987 Value: MCSymbolRefExpr::create(Symbol: MCSym.getPointer(), Ctx&: OutStreamer.getContext()),
988 Size: 4 /*size*/);
989}
990
991static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) {
992
993 MachineModuleInfoMachO &MMIMacho =
994 MMI->getObjFileInfo<MachineModuleInfoMachO>();
995
996 // Output stubs for dynamically-linked functions.
997 MachineModuleInfoMachO::SymbolListTy Stubs;
998
999 // Output stubs for external and common global variables.
1000 Stubs = MMIMacho.GetGVStubList();
1001 if (!Stubs.empty()) {
1002 OutStreamer.switchSection(Section: MMI->getContext().getMachOSection(
1003 Segment: "__IMPORT", Section: "__pointers", TypeAndAttributes: MachO::S_NON_LAZY_SYMBOL_POINTERS,
1004 K: SectionKind::getMetadata()));
1005
1006 for (auto &Stub : Stubs)
1007 emitNonLazySymbolPointer(OutStreamer, StubLabel: Stub.first, MCSym&: Stub.second);
1008
1009 Stubs.clear();
1010 OutStreamer.addBlankLine();
1011 }
1012}
1013
1014/// True if this module is being built for windows/msvc, and uses floating
1015/// point. This is used to emit an undefined reference to _fltused. This is
1016/// needed in Windows kernel or driver contexts to find and prevent code from
1017/// modifying non-GPR registers.
1018///
1019/// TODO: It would be better if this was computed from MIR by looking for
1020/// selected floating-point instructions.
1021static bool usesMSVCFloatingPoint(const Triple &TT, const Module &M) {
1022 // Only needed for MSVC
1023 if (!TT.isWindowsMSVCEnvironment())
1024 return false;
1025
1026 for (const Function &F : M) {
1027 for (const Instruction &I : instructions(F)) {
1028 if (I.getType()->isFloatingPointTy())
1029 return true;
1030
1031 for (const auto &Op : I.operands()) {
1032 if (Op->getType()->isFloatingPointTy())
1033 return true;
1034 }
1035 }
1036 }
1037
1038 return false;
1039}
1040
1041void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
1042 const Triple &TT = TM.getTargetTriple();
1043
1044 if (TT.isOSBinFormatMachO()) {
1045 // Mach-O uses non-lazy symbol stubs to encode per-TU information into
1046 // global table for symbol lookup.
1047 emitNonLazyStubs(MMI, OutStreamer&: *OutStreamer);
1048
1049 // Emit fault map information.
1050 FM.serializeToFaultMapSection();
1051
1052 // This flag tells the linker that no global symbols contain code that fall
1053 // through to other global symbols (e.g. an implementation of multiple entry
1054 // points). If this doesn't occur, the linker can safely perform dead code
1055 // stripping. Since LLVM never generates code that does this, it is always
1056 // safe to set.
1057 OutStreamer->emitSubsectionsViaSymbols();
1058 } else if (TT.isOSBinFormatCOFF()) {
1059 // If import call optimization is enabled, emit the appropriate section.
1060 // We do this whether or not we recorded any items.
1061 if (EnableImportCallOptimization) {
1062 OutStreamer->switchSection(Section: getObjFileLowering().getImportCallSection());
1063
1064 // Section always starts with some magic.
1065 constexpr char ImpCallMagic[12] = "RetpolineV1";
1066 OutStreamer->emitBytes(Data: StringRef{ImpCallMagic, sizeof(ImpCallMagic)});
1067
1068 // Layout of this section is:
1069 // Per section that contains an item to record:
1070 // uint32_t SectionSize: Size in bytes for information in this section.
1071 // uint32_t Section Number
1072 // Per call to imported function in section:
1073 // uint32_t Kind: the kind of item.
1074 // uint32_t InstOffset: the offset of the instr in its parent section.
1075 for (auto &[Section, CallsToImportedFuncs] :
1076 SectionToImportedFunctionCalls) {
1077 unsigned SectionSize =
1078 sizeof(uint32_t) * (2 + 2 * CallsToImportedFuncs.size());
1079 OutStreamer->emitInt32(Value: SectionSize);
1080 OutStreamer->emitCOFFSecNumber(Symbol: Section->getBeginSymbol());
1081 for (auto &[CallsiteSymbol, Kind] : CallsToImportedFuncs) {
1082 OutStreamer->emitInt32(Value: Kind);
1083 OutStreamer->emitCOFFSecOffset(Symbol: CallsiteSymbol);
1084 }
1085 }
1086 }
1087
1088 if (usesMSVCFloatingPoint(TT, M)) {
1089 // In Windows' libcmt.lib, there is a file which is linked in only if the
1090 // symbol _fltused is referenced. Linking this in causes some
1091 // side-effects:
1092 //
1093 // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of
1094 // 64-bit mantissas at program start.
1095 //
1096 // 2. It links in support routines for floating-point in scanf and printf.
1097 //
1098 // MSVC emits an undefined reference to _fltused when there are any
1099 // floating point operations in the program (including calls). A program
1100 // that only has: `scanf("%f", &global_float);` may fail to trigger this,
1101 // but oh well...that's a documented issue.
1102 StringRef SymbolName =
1103 (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused";
1104 MCSymbol *S = MMI->getContext().getOrCreateSymbol(Name: SymbolName);
1105 OutStreamer->emitSymbolAttribute(Symbol: S, Attribute: MCSA_Global);
1106 return;
1107 }
1108 } else if (TT.isOSBinFormatELF()) {
1109 FM.serializeToFaultMapSection();
1110 }
1111
1112 // Emit __morestack address if needed for indirect calls.
1113 if (TT.isX86_64() && TM.getCodeModel() == CodeModel::Large) {
1114 if (MCSymbol *AddrSymbol = OutContext.lookupSymbol(Name: "__morestack_addr")) {
1115 Align Alignment(1);
1116 MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant(
1117 DL: getDataLayout(), Kind: SectionKind::getReadOnly(),
1118 /*C=*/nullptr, Alignment);
1119 OutStreamer->switchSection(Section: ReadOnlySection);
1120 OutStreamer->emitLabel(Symbol: AddrSymbol);
1121
1122 unsigned PtrSize = MAI->getCodePointerSize();
1123 OutStreamer->emitSymbolValue(Sym: GetExternalSymbolSymbol(Sym: "__morestack"),
1124 Size: PtrSize);
1125 }
1126 }
1127}
1128
1129char X86AsmPrinter::ID = 0;
1130
1131INITIALIZE_PASS(X86AsmPrinter, "x86-asm-printer", "X86 Assembly Printer", false,
1132 false)
1133
1134//===----------------------------------------------------------------------===//
1135// Target Registry Stuff
1136//===----------------------------------------------------------------------===//
1137
1138// Force static initialization.
1139extern "C" LLVM_C_ABI void LLVMInitializeX86AsmPrinter() {
1140 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
1141 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
1142}
1143
1144PreservedAnalyses X86AsmPrinterBeginPass::run(Module &M,
1145 ModuleAnalysisManager &MAM) {
1146 Expected<std::unique_ptr<MCStreamer>> Streamer = CreateStreamer(TM);
1147 if (!Streamer)
1148 reportFatalInternalError(reason: "Failed to create MCStreamer");
1149 X86AsmPrinter AsmPrinter(TM, std::move(*Streamer));
1150 AsmPrinter.GetPSI = [&MAM](Module &M) {
1151 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1152 };
1153 AsmPrinter.GetSDPI = [](Module &M) { return nullptr; };
1154 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1155 AsmPrinter.doInitialization(M);
1156 return PreservedAnalyses::all();
1157}
1158
1159PreservedAnalyses X86AsmPrinterPass::run(MachineFunction &MF,
1160 MachineFunctionAnalysisManager &MFAM) {
1161 Expected<std::unique_ptr<MCStreamer>> Streamer = CreateStreamer(TM);
1162 if (!Streamer)
1163 reportFatalInternalError(reason: "Failed to create MCStreamer");
1164 X86AsmPrinter AsmPrinter(TM, std::move(*Streamer));
1165 AsmPrinter.GetPSI = [&MFAM, &MF](Module &M) {
1166 return MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1167 .getCachedResult<ProfileSummaryAnalysis>(IR&: M);
1168 };
1169 AsmPrinter.GetSDPI = [](Module &M) { return nullptr; };
1170 setupMachineFunctionAsmPrinter(MFAM, MF, AsmPrinter);
1171 AsmPrinter.runOnMachineFunction(MF);
1172 return PreservedAnalyses::all();
1173}
1174
1175PreservedAnalyses X86AsmPrinterEndPass::run(Module &M,
1176 ModuleAnalysisManager &MAM) {
1177 Expected<std::unique_ptr<MCStreamer>> Streamer = CreateStreamer(TM);
1178 if (!Streamer)
1179 reportFatalInternalError(reason: "Failed to create MCStreamer");
1180 X86AsmPrinter AsmPrinter(TM, std::move(*Streamer));
1181 AsmPrinter.GetPSI = [&MAM](Module &M) {
1182 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1183 };
1184 AsmPrinter.GetSDPI = [](Module &M) { return nullptr; };
1185 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1186 AsmPrinter.doFinalization(M);
1187 return PreservedAnalyses::all();
1188}
1189