1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to X86 machine code.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86AsmPrinter.h"
15#include "MCTargetDesc/X86ATTInstPrinter.h"
16#include "MCTargetDesc/X86BaseInfo.h"
17#include "MCTargetDesc/X86MCTargetDesc.h"
18#include "MCTargetDesc/X86TargetStreamer.h"
19#include "TargetInfo/X86TargetInfo.h"
20#include "X86.h"
21#include "X86InstrInfo.h"
22#include "X86MachineFunctionInfo.h"
23#include "X86Subtarget.h"
24#include "llvm-c/Visibility.h"
25#include "llvm/Analysis/StaticDataProfileInfo.h"
26#include "llvm/BinaryFormat/COFF.h"
27#include "llvm/BinaryFormat/ELF.h"
28#include "llvm/CodeGen/MachineConstantPool.h"
29#include "llvm/CodeGen/MachineModuleInfoImpls.h"
30#include "llvm/CodeGen/MachinePassManager.h"
31#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
32#include "llvm/CodeGenTypes/MachineValueType.h"
33#include "llvm/IR/DerivedTypes.h"
34#include "llvm/IR/InlineAsm.h"
35#include "llvm/IR/InstIterator.h"
36#include "llvm/IR/Mangler.h"
37#include "llvm/IR/Module.h"
38#include "llvm/IR/Type.h"
39#include "llvm/MC/MCAsmInfo.h"
40#include "llvm/MC/MCCodeEmitter.h"
41#include "llvm/MC/MCContext.h"
42#include "llvm/MC/MCExpr.h"
43#include "llvm/MC/MCInst.h"
44#include "llvm/MC/MCInstBuilder.h"
45#include "llvm/MC/MCSectionCOFF.h"
46#include "llvm/MC/MCSectionELF.h"
47#include "llvm/MC/MCSectionMachO.h"
48#include "llvm/MC/MCStreamer.h"
49#include "llvm/MC/MCSymbol.h"
50#include "llvm/MC/TargetRegistry.h"
51#include "llvm/Support/Debug.h"
52#include "llvm/Support/ErrorHandling.h"
53#include "llvm/Target/TargetMachine.h"
54
55using namespace llvm;
56
57X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
58 std::unique_ptr<MCStreamer> Streamer)
59 : AsmPrinter(TM, std::move(Streamer), ID), FM(*this) {
60 GetPSI = [this](Module &M) -> ProfileSummaryInfo * {
61 if (auto *PSIW = getAnalysisIfAvailable<ProfileSummaryInfoWrapperPass>())
62 return &PSIW->getPSI();
63 return nullptr;
64 };
65 GetSDPI = [this](Module &M) -> StaticDataProfileInfo * {
66 if (auto *SDPIW =
67 getAnalysisIfAvailable<StaticDataProfileInfoWrapperPass>())
68 return &SDPIW->getStaticDataProfileInfo();
69 return nullptr;
70 };
71}
72
73//===----------------------------------------------------------------------===//
74// Primitive Helper Functions.
75//===----------------------------------------------------------------------===//
76
77/// runOnMachineFunction - Emit the function body.
78///
79bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
80 PSI = GetPSI(*MF.getFunction().getParent());
81 SDPI = GetSDPI(*MF.getFunction().getParent());
82
83 Subtarget = &MF.getSubtarget<X86Subtarget>();
84
85 SMShadowTracker.startFunction(MF);
86 CodeEmitter.reset(p: TM.getTarget().createMCCodeEmitter(
87 II: *Subtarget->getInstrInfo(), Ctx&: MF.getContext()));
88
89 const Module *M = MF.getFunction().getParent();
90 EmitFPOData = Subtarget->isTargetWin32() && M->getCodeViewFlag();
91
92 IndCSPrefix = M->getModuleFlag(Key: "indirect_branch_cs_prefix");
93
94 SetupMachineFunction(MF);
95
96 if (Subtarget->isTargetCOFF()) {
97 bool Local = MF.getFunction().hasLocalLinkage();
98 OutStreamer->beginCOFFSymbolDef(Symbol: CurrentFnSym);
99 OutStreamer->emitCOFFSymbolStorageClass(
100 StorageClass: Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
101 OutStreamer->emitCOFFSymbolType(Type: COFF::IMAGE_SYM_DTYPE_FUNCTION
102 << COFF::SCT_COMPLEX_TYPE_SHIFT);
103 OutStreamer->endCOFFSymbolDef();
104 }
105
106 // Emit the rest of the function body.
107 emitFunctionBody();
108
109 // Emit the XRay table for this function.
110 emitXRayTable();
111
112 EmitFPOData = false;
113
114 IndCSPrefix = false;
115
116 // We didn't modify anything.
117 return false;
118}
119
120void X86AsmPrinter::emitFunctionBodyStart() {
121 if (EmitFPOData) {
122 auto *XTS =
123 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
124 XTS->emitFPOProc(
125 ProcSym: CurrentFnSym,
126 ParamsSize: MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize());
127 }
128}
129
130void X86AsmPrinter::emitFunctionBodyEnd() {
131 if (EmitFPOData) {
132 auto *XTS =
133 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
134 XTS->emitFPOEndProc();
135 }
136}
137
138uint32_t X86AsmPrinter::MaskKCFIType(uint32_t Value) {
139 // If the type hash matches an invalid pattern, mask the value.
140 const uint32_t InvalidValues[] = {
141 0xFA1E0FF3, /* ENDBR64 */
142 0xFB1E0FF3, /* ENDBR32 */
143 };
144 for (uint32_t N : InvalidValues) {
145 // LowerKCFI_CHECK emits -Value for indirect call checks, so we must also
146 // mask that. Note that -(Value + 1) == ~Value.
147 if (N == Value || -N == Value)
148 return Value + 1;
149 }
150 return Value;
151}
152
153void X86AsmPrinter::EmitKCFITypePadding(const MachineFunction &MF,
154 bool HasType) {
155 // Keep the function entry aligned, taking patchable-function-prefix into
156 // account if set.
157 int64_t PrefixBytes = MF.getFunction().getFnAttributeAsParsedInteger(
158 Kind: "patchable-function-prefix");
159
160 // Also take the type identifier into account if we're emitting
161 // one. Otherwise, just pad with nops. The X86::MOV32ri instruction emitted
162 // in X86AsmPrinter::emitKCFITypeId is 5 bytes long.
163 if (HasType)
164 PrefixBytes += 5;
165
166 emitNops(N: offsetToAlignment(Value: PrefixBytes, Alignment: MF.getPreferredAlignment()));
167}
168
169/// emitKCFITypeId - Emit the KCFI type information in architecture specific
170/// format.
171void X86AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
172 const Function &F = MF.getFunction();
173 if (!F.getParent()->getModuleFlag(Key: "kcfi"))
174 return;
175
176 ConstantInt *Type = nullptr;
177 if (const MDNode *MD = F.getMetadata(KindID: LLVMContext::MD_kcfi_type))
178 Type = mdconst::extract<ConstantInt>(MD: MD->getOperand(I: 0));
179
180 // If we don't have a type to emit, just emit padding if needed to maintain
181 // the same alignment for all functions.
182 if (!Type) {
183 EmitKCFITypePadding(MF, /*HasType=*/false);
184 return;
185 }
186
187 // Emit a function symbol for the type data to avoid unreachable instruction
188 // warnings from binary validation tools, and use the same linkage as the
189 // parent function. Note that using local linkage would result in duplicate
190 // symbols for weak parent functions.
191 MCSymbol *FnSym = OutContext.getOrCreateSymbol(Name: "__cfi_" + MF.getName());
192 emitLinkage(GV: &MF.getFunction(), GVSym: FnSym);
193 if (MAI.hasDotTypeDotSizeDirective())
194 OutStreamer->emitSymbolAttribute(Symbol: FnSym, Attribute: MCSA_ELF_TypeFunction);
195 OutStreamer->emitLabel(Symbol: FnSym);
196
197 // Embed the type hash in the X86::MOV32ri instruction to avoid special
198 // casing object file parsers.
199 EmitKCFITypePadding(MF);
200 unsigned DestReg = X86::EAX;
201
202 if (F.getParent()->getModuleFlag(Key: "kcfi-arity")) {
203 // The ArityToRegMap assumes the 64-bit SysV ABI.
204 [[maybe_unused]] const auto &Triple = MF.getTarget().getTargetTriple();
205 assert(Triple.isX86_64() && !Triple.isOSWindows());
206
207 // Determine the function's arity (i.e., the number of arguments) at the ABI
208 // level by counting the number of parameters that are passed
209 // as registers, such as pointers and 64-bit (or smaller) integers. The
210 // Linux x86-64 ABI allows up to 6 integer parameters to be passed in GPRs.
211 // Additional parameters or parameters larger than 64 bits may be passed on
212 // the stack, in which case the arity is denoted as 7. Floating-point
213 // arguments passed in XMM0-XMM7 are not counted toward arity because
214 // floating-point values are not relevant to enforcing kCFI at this time.
215 const unsigned ArityToRegMap[8] = {X86::EAX, X86::ECX, X86::EDX, X86::EBX,
216 X86::ESP, X86::EBP, X86::ESI, X86::EDI};
217 int Arity;
218 if (MF.getInfo<X86MachineFunctionInfo>()->getArgumentStackSize() > 0) {
219 Arity = 7;
220 } else {
221 Arity = 0;
222 for (const auto &LI : MF.getRegInfo().liveins()) {
223 auto Reg = LI.first;
224 if (X86::GR8RegClass.contains(Reg) || X86::GR16RegClass.contains(Reg) ||
225 X86::GR32RegClass.contains(Reg) ||
226 X86::GR64RegClass.contains(Reg)) {
227 ++Arity;
228 }
229 }
230 }
231 DestReg = ArityToRegMap[Arity];
232 }
233
234 EmitAndCountInstruction(Inst&: MCInstBuilder(X86::MOV32ri)
235 .addReg(Reg: DestReg)
236 .addImm(Val: MaskKCFIType(Value: Type->getZExtValue())));
237
238 if (MAI.hasDotTypeDotSizeDirective()) {
239 MCSymbol *EndSym = OutContext.createTempSymbol(Name: "cfi_func_end");
240 OutStreamer->emitLabel(Symbol: EndSym);
241
242 const MCExpr *SizeExp = MCBinaryExpr::createSub(
243 LHS: MCSymbolRefExpr::create(Symbol: EndSym, Ctx&: OutContext),
244 RHS: MCSymbolRefExpr::create(Symbol: FnSym, Ctx&: OutContext), Ctx&: OutContext);
245 OutStreamer->emitELFSize(Symbol: FnSym, Value: SizeExp);
246 }
247}
248
249/// PrintSymbolOperand - Print a raw symbol reference operand. This handles
250/// jump tables, constant pools, global address and external symbols, all of
251/// which print to a label with various suffixes for relocation types etc.
252void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
253 raw_ostream &O) {
254 switch (MO.getType()) {
255 default: llvm_unreachable("unknown symbol type!");
256 case MachineOperand::MO_ConstantPoolIndex:
257 GetCPISymbol(CPID: MO.getIndex())->print(OS&: O, MAI);
258 printOffset(Offset: MO.getOffset(), OS&: O);
259 break;
260 case MachineOperand::MO_GlobalAddress: {
261 const GlobalValue *GV = MO.getGlobal();
262
263 MCSymbol *GVSym;
264 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
265 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
266 GVSym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
267 else
268 GVSym = getSymbolPreferLocal(GV: *GV);
269
270 // Handle dllimport linkage.
271 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
272 GVSym = OutContext.getOrCreateSymbol(Name: Twine("__imp_") + GVSym->getName());
273 else if (MO.getTargetFlags() == X86II::MO_COFFSTUB)
274 GVSym =
275 OutContext.getOrCreateSymbol(Name: Twine(".refptr.") + GVSym->getName());
276
277 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
278 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
279 MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
280 MachineModuleInfoImpl::StubValueTy &StubSym =
281 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
282 if (!StubSym.getPointer())
283 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
284 !GV->hasInternalLinkage());
285 }
286
287 // If the name begins with a dollar-sign, enclose it in parens. We do this
288 // to avoid having it look like an integer immediate to the assembler.
289 if (GVSym->getName()[0] != '$')
290 GVSym->print(OS&: O, MAI);
291 else {
292 O << '(';
293 GVSym->print(OS&: O, MAI);
294 O << ')';
295 }
296 printOffset(Offset: MO.getOffset(), OS&: O);
297 break;
298 }
299 }
300
301 switch (MO.getTargetFlags()) {
302 default:
303 llvm_unreachable("Unknown target flag on GV operand");
304 case X86II::MO_NO_FLAG: // No flag.
305 break;
306 case X86II::MO_DARWIN_NONLAZY:
307 case X86II::MO_DLLIMPORT:
308 case X86II::MO_COFFSTUB:
309 // These affect the name of the symbol, not any suffix.
310 break;
311 case X86II::MO_GOT_ABSOLUTE_ADDRESS:
312 O << " + [.-";
313 MF->getPICBaseSymbol()->print(OS&: O, MAI);
314 O << ']';
315 break;
316 case X86II::MO_PIC_BASE_OFFSET:
317 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
318 O << '-';
319 MF->getPICBaseSymbol()->print(OS&: O, MAI);
320 break;
321 case X86II::MO_TLSGD: O << "@TLSGD"; break;
322 case X86II::MO_TLSLD: O << "@TLSLD"; break;
323 case X86II::MO_TLSLDM: O << "@TLSLDM"; break;
324 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
325 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
326 case X86II::MO_TPOFF: O << "@TPOFF"; break;
327 case X86II::MO_DTPOFF: O << "@DTPOFF"; break;
328 case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
329 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
330 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
331 case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break;
332 case X86II::MO_GOT: O << "@GOT"; break;
333 case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
334 case X86II::MO_PLT: O << "@PLT"; break;
335 case X86II::MO_TLVP: O << "@TLVP"; break;
336 case X86II::MO_TLVP_PIC_BASE:
337 O << "@TLVP" << '-';
338 MF->getPICBaseSymbol()->print(OS&: O, MAI);
339 break;
340 case X86II::MO_SECREL: O << "@SECREL32"; break;
341 }
342}
343
344void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo,
345 raw_ostream &O) {
346 const MachineOperand &MO = MI->getOperand(i: OpNo);
347 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
348 switch (MO.getType()) {
349 default: llvm_unreachable("unknown operand type!");
350 case MachineOperand::MO_Register: {
351 if (IsATT)
352 O << '%';
353 O << X86ATTInstPrinter::getRegisterName(Reg: MO.getReg());
354 return;
355 }
356
357 case MachineOperand::MO_Immediate:
358 if (IsATT)
359 O << '$';
360 O << MO.getImm();
361 return;
362
363 case MachineOperand::MO_ConstantPoolIndex:
364 case MachineOperand::MO_GlobalAddress: {
365 switch (MI->getInlineAsmDialect()) {
366 case InlineAsm::AD_ATT:
367 O << '$';
368 break;
369 case InlineAsm::AD_Intel:
370 O << "offset ";
371 break;
372 }
373 PrintSymbolOperand(MO, O);
374 break;
375 }
376 case MachineOperand::MO_BlockAddress: {
377 MCSymbol *Sym = GetBlockAddressSymbol(BA: MO.getBlockAddress());
378 Sym->print(OS&: O, MAI);
379 break;
380 }
381 }
382}
383
384/// PrintModifiedOperand - Print subregisters based on supplied modifier,
385/// deferring to PrintOperand() if no modifier was supplied or if operand is not
386/// a register.
387void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
388 raw_ostream &O, StringRef Modifier) {
389 const MachineOperand &MO = MI->getOperand(i: OpNo);
390 if (Modifier.empty() || !MO.isReg())
391 return PrintOperand(MI, OpNo, O);
392 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
393 O << '%';
394 Register Reg = MO.getReg();
395 if (Modifier.consume_front(Prefix: "subreg")) {
396 unsigned Size = (Modifier == "64") ? 64
397 : (Modifier == "32") ? 32
398 : (Modifier == "16") ? 16
399 : 8;
400 Reg = getX86SubSuperRegister(Reg, Size);
401 }
402 O << X86ATTInstPrinter::getRegisterName(Reg);
403}
404
405/// PrintPCRelImm - This is used to print an immediate value that ends up
406/// being encoded as a pc-relative value. These print slightly differently, for
407/// example, a $ is not emitted.
408void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo,
409 raw_ostream &O) {
410 const MachineOperand &MO = MI->getOperand(i: OpNo);
411 switch (MO.getType()) {
412 default: llvm_unreachable("Unknown pcrel immediate operand");
413 case MachineOperand::MO_Register:
414 // pc-relativeness was handled when computing the value in the reg.
415 PrintOperand(MI, OpNo, O);
416 return;
417 case MachineOperand::MO_Immediate:
418 O << MO.getImm();
419 return;
420 case MachineOperand::MO_GlobalAddress:
421 PrintSymbolOperand(MO, O);
422 return;
423 }
424}
425
426void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
427 raw_ostream &O, StringRef Modifier) {
428 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
429 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
430 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
431
432 // If we really don't want to print out (rip), don't.
433 bool HasBaseReg = BaseReg.getReg() != 0;
434 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
435 HasBaseReg = false;
436
437 // If we really just want to print out displacement.
438 if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only")
439 HasBaseReg = false;
440
441 // HasParenPart - True if we will print out the () part of the mem ref.
442 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
443
444 switch (DispSpec.getType()) {
445 default:
446 llvm_unreachable("unknown operand type!");
447 case MachineOperand::MO_Immediate: {
448 int DispVal = DispSpec.getImm();
449 if (DispVal || !HasParenPart)
450 O << DispVal;
451 break;
452 }
453 case MachineOperand::MO_GlobalAddress:
454 case MachineOperand::MO_ConstantPoolIndex:
455 PrintSymbolOperand(MO: DispSpec, O);
456 break;
457 }
458
459 if (Modifier == "H")
460 O << "+8";
461
462 if (HasParenPart) {
463 assert(IndexReg.getReg() != X86::ESP &&
464 "X86 doesn't allow scaling by ESP");
465
466 O << '(';
467 if (HasBaseReg)
468 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O, Modifier);
469
470 if (IndexReg.getReg()) {
471 O << ',';
472 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O, Modifier);
473 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
474 if (ScaleVal != 1)
475 O << ',' << ScaleVal;
476 }
477 O << ')';
478 }
479}
480
481static bool isSimpleReturn(const MachineInstr &MI) {
482 // We exclude all tail calls here which set both isReturn and isCall.
483 return MI.getDesc().isReturn() && !MI.getDesc().isCall();
484}
485
486static bool isIndirectBranchOrTailCall(const MachineInstr &MI) {
487 unsigned Opc = MI.getOpcode();
488 return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ ||
489 Opc == X86::TAILJMPr || Opc == X86::TAILJMPm ||
490 Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 ||
491 Opc == X86::TCRETURNri || Opc == X86::TCRETURN_WIN64ri ||
492 Opc == X86::TCRETURN_HIPE32ri || Opc == X86::TCRETURNmi ||
493 Opc == X86::TCRETURN_WINmi64 || Opc == X86::TCRETURNri64 ||
494 Opc == X86::TCRETURNmi64 || Opc == X86::TCRETURNri64_ImpCall ||
495 Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX;
496}
497
498void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) {
499 if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) {
500 auto I = MBB.getLastNonDebugInstr();
501 if (I != MBB.end()) {
502 if ((Subtarget->hardenSlsRet() && isSimpleReturn(MI: *I)) ||
503 (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(MI: *I))) {
504 MCInst TmpInst;
505 TmpInst.setOpcode(X86::INT3);
506 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
507 }
508 }
509 }
510 if (SplitChainedAtEndOfBlock) {
511 OutStreamer->emitWinCFISplitChained();
512 // Splitting into a new unwind info implicitly starts a prolog. We have no
513 // instructions to add to the prolog, so immediately end it.
514 OutStreamer->emitWinCFIEndProlog();
515 SplitChainedAtEndOfBlock = false;
516 }
517 AsmPrinter::emitBasicBlockEnd(MBB);
518 SMShadowTracker.emitShadowPadding(OutStreamer&: *OutStreamer, STI: getSubtargetInfo());
519}
520
521void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
522 raw_ostream &O, StringRef Modifier) {
523 assert(isMem(*MI, OpNo) && "Invalid memory reference!");
524 const MachineOperand &Segment = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
525 if (Segment.getReg()) {
526 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O, Modifier);
527 O << ':';
528 }
529 PrintLeaMemReference(MI, OpNo, O, Modifier);
530}
531
532void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
533 unsigned OpNo, raw_ostream &O,
534 StringRef Modifier) {
535 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
536 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
537 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
538 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
539 const MachineOperand &SegReg = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
540
541 // If we really don't want to print out (rip), don't.
542 bool HasBaseReg = BaseReg.getReg() != 0;
543 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
544 HasBaseReg = false;
545
546 // If we really just want to print out displacement.
547 if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only") {
548 HasBaseReg = false;
549 }
550
551 // If this has a segment register, print it.
552 if (SegReg.getReg()) {
553 PrintOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O);
554 O << ':';
555 }
556
557 O << '[';
558
559 bool NeedPlus = false;
560 if (HasBaseReg) {
561 PrintOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O);
562 NeedPlus = true;
563 }
564
565 if (IndexReg.getReg()) {
566 if (NeedPlus) O << " + ";
567 if (ScaleVal != 1)
568 O << ScaleVal << '*';
569 PrintOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O);
570 NeedPlus = true;
571 }
572
573 if (!DispSpec.isImm()) {
574 if (NeedPlus) O << " + ";
575 // Do not add `offset` operator. Matches the behaviour of
576 // X86IntelInstPrinter::printMemReference.
577 PrintSymbolOperand(MO: DispSpec, O);
578 } else {
579 int64_t DispVal = DispSpec.getImm();
580 if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
581 if (NeedPlus) {
582 if (DispVal > 0)
583 O << " + ";
584 else {
585 O << " - ";
586 DispVal = -DispVal;
587 }
588 }
589 O << DispVal;
590 }
591 }
592 O << ']';
593}
594
595const MCSubtargetInfo *X86AsmPrinter::getIFuncMCSubtargetInfo() const {
596 assert(Subtarget);
597 return Subtarget;
598}
599
600void X86AsmPrinter::emitMachOIFuncStubBody(Module &M, const GlobalIFunc &GI,
601 MCSymbol *LazyPointer) {
602 // _ifunc:
603 // jmpq *lazy_pointer(%rip)
604
605 OutStreamer->emitInstruction(
606 Inst: MCInstBuilder(X86::JMP32m)
607 .addReg(Reg: X86::RIP)
608 .addImm(Val: 1)
609 .addReg(Reg: 0)
610 .addOperand(Op: MCOperand::createExpr(
611 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
612 .addReg(Reg: 0),
613 STI: *Subtarget);
614}
615
616void X86AsmPrinter::emitMachOIFuncStubHelperBody(Module &M,
617 const GlobalIFunc &GI,
618 MCSymbol *LazyPointer) {
619 // _ifunc.stub_helper:
620 // push %rax
621 // push %rdi
622 // push %rsi
623 // push %rdx
624 // push %rcx
625 // push %r8
626 // push %r9
627 // callq foo
628 // movq %rax,lazy_pointer(%rip)
629 // pop %r9
630 // pop %r8
631 // pop %rcx
632 // pop %rdx
633 // pop %rsi
634 // pop %rdi
635 // pop %rax
636 // jmpq *lazy_pointer(%rip)
637
638 for (int Reg :
639 {X86::RAX, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9})
640 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::PUSH64r).addReg(Reg),
641 STI: *Subtarget);
642
643 OutStreamer->emitInstruction(
644 Inst: MCInstBuilder(X86::CALL64pcrel32)
645 .addOperand(Op: MCOperand::createExpr(Val: lowerConstant(CV: GI.getResolver()))),
646 STI: *Subtarget);
647
648 OutStreamer->emitInstruction(
649 Inst: MCInstBuilder(X86::MOV64mr)
650 .addReg(Reg: X86::RIP)
651 .addImm(Val: 1)
652 .addReg(Reg: 0)
653 .addOperand(Op: MCOperand::createExpr(
654 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
655 .addReg(Reg: 0)
656 .addReg(Reg: X86::RAX),
657 STI: *Subtarget);
658
659 for (int Reg :
660 {X86::R9, X86::R8, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RAX})
661 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::POP64r).addReg(Reg),
662 STI: *Subtarget);
663
664 OutStreamer->emitInstruction(
665 Inst: MCInstBuilder(X86::JMP32m)
666 .addReg(Reg: X86::RIP)
667 .addImm(Val: 1)
668 .addReg(Reg: 0)
669 .addOperand(Op: MCOperand::createExpr(
670 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
671 .addReg(Reg: 0),
672 STI: *Subtarget);
673}
674
675static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO,
676 char Mode, raw_ostream &O) {
677 Register Reg = MO.getReg();
678 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
679
680 if (!X86::GR8RegClass.contains(Reg) &&
681 !X86::GR16RegClass.contains(Reg) &&
682 !X86::GR32RegClass.contains(Reg) &&
683 !X86::GR64RegClass.contains(Reg))
684 return true;
685
686 switch (Mode) {
687 default: return true; // Unknown mode.
688 case 'b': // Print QImode register
689 Reg = getX86SubSuperRegister(Reg, Size: 8);
690 break;
691 case 'h': // Print QImode high register
692 Reg = getX86SubSuperRegister(Reg, Size: 8, High: true);
693 if (!Reg.isValid())
694 return true;
695 break;
696 case 'w': // Print HImode register
697 Reg = getX86SubSuperRegister(Reg, Size: 16);
698 break;
699 case 'k': // Print SImode register
700 Reg = getX86SubSuperRegister(Reg, Size: 32);
701 break;
702 case 'V':
703 EmitPercent = false;
704 [[fallthrough]];
705 case 'q':
706 // Print 64-bit register names if 64-bit integer registers are available.
707 // Otherwise, print 32-bit register names.
708 Reg = getX86SubSuperRegister(Reg, Size: P.getSubtarget().is64Bit() ? 64 : 32);
709 break;
710 }
711
712 if (EmitPercent)
713 O << '%';
714
715 O << X86ATTInstPrinter::getRegisterName(Reg);
716 return false;
717}
718
719static bool printAsmVRegister(const MachineOperand &MO, char Mode,
720 raw_ostream &O) {
721 Register Reg = MO.getReg();
722 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
723
724 unsigned Index;
725 if (X86::VR128XRegClass.contains(Reg))
726 Index = Reg - X86::XMM0;
727 else if (X86::VR256XRegClass.contains(Reg))
728 Index = Reg - X86::YMM0;
729 else if (X86::VR512RegClass.contains(Reg))
730 Index = Reg - X86::ZMM0;
731 else
732 return true;
733
734 switch (Mode) {
735 default: // Unknown mode.
736 return true;
737 case 'x': // Print V4SFmode register
738 Reg = X86::XMM0 + Index;
739 break;
740 case 't': // Print V8SFmode register
741 Reg = X86::YMM0 + Index;
742 break;
743 case 'g': // Print V16SFmode register
744 Reg = X86::ZMM0 + Index;
745 break;
746 }
747
748 if (EmitPercent)
749 O << '%';
750
751 O << X86ATTInstPrinter::getRegisterName(Reg);
752 return false;
753}
754
755/// PrintAsmOperand - Print out an operand for an inline asm expression.
756///
757bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
758 const char *ExtraCode, raw_ostream &O) {
759 // Does this asm operand have a single letter operand modifier?
760 if (ExtraCode && ExtraCode[0]) {
761 if (ExtraCode[1] != 0) return true; // Unknown modifier.
762
763 const MachineOperand &MO = MI->getOperand(i: OpNo);
764 const bool IsIntel = MI->getInlineAsmDialect() == InlineAsm::AD_Intel;
765
766 switch (ExtraCode[0]) {
767 default:
768 // See if this is a generic print operand
769 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS&: O);
770 case 'a': // This is an address. Currently only 'i' and 'r' are expected.
771 switch (MO.getType()) {
772 default:
773 return true;
774 case MachineOperand::MO_Immediate:
775 O << MO.getImm();
776 return false;
777 case MachineOperand::MO_ConstantPoolIndex:
778 case MachineOperand::MO_JumpTableIndex:
779 case MachineOperand::MO_ExternalSymbol:
780 llvm_unreachable("unexpected operand type!");
781 case MachineOperand::MO_GlobalAddress:
782 PrintSymbolOperand(MO, O);
783 if (Subtarget->is64Bit())
784 O << "(%rip)";
785 return false;
786 case MachineOperand::MO_Register:
787 O << (IsIntel ? '[' : '(');
788 PrintOperand(MI, OpNo, O);
789 O << (IsIntel ? ']' : ')');
790 return false;
791 }
792
793 case 'c': // Don't print "$" before a global var name or constant.
794 switch (MO.getType()) {
795 default:
796 PrintOperand(MI, OpNo, O);
797 break;
798 case MachineOperand::MO_Immediate:
799 O << MO.getImm();
800 break;
801 case MachineOperand::MO_ConstantPoolIndex:
802 case MachineOperand::MO_JumpTableIndex:
803 case MachineOperand::MO_ExternalSymbol:
804 llvm_unreachable("unexpected operand type!");
805 case MachineOperand::MO_GlobalAddress:
806 PrintSymbolOperand(MO, O);
807 break;
808 }
809 return false;
810
811 case 'A': // Print '*' before a register (it must be a register)
812 if (MO.isReg()) {
813 if (!IsIntel)
814 O << '*';
815 PrintOperand(MI, OpNo, O);
816 return false;
817 }
818 return true;
819
820 case 'b': // Print QImode register
821 case 'h': // Print QImode high register
822 case 'w': // Print HImode register
823 case 'k': // Print SImode register
824 case 'q': // Print DImode register
825 case 'V': // Print native register without '%'
826 if (MO.isReg())
827 return printAsmMRegister(P: *this, MO, Mode: ExtraCode[0], O);
828 PrintOperand(MI, OpNo, O);
829 return false;
830
831 case 'x': // Print V4SFmode register
832 case 't': // Print V8SFmode register
833 case 'g': // Print V16SFmode register
834 if (MO.isReg())
835 return printAsmVRegister(MO, Mode: ExtraCode[0], O);
836 PrintOperand(MI, OpNo, O);
837 return false;
838
839 case 'p': {
840 const MachineOperand &MO = MI->getOperand(i: OpNo);
841 if (MO.getType() != MachineOperand::MO_GlobalAddress)
842 return true;
843 PrintSymbolOperand(MO, O);
844 return false;
845 }
846
847 case 'P': // This is the operand of a call, treat specially.
848 PrintPCRelImm(MI, OpNo, O);
849 return false;
850
851 case 'n': // Negate the immediate or print a '-' before the operand.
852 // Note: this is a temporary solution. It should be handled target
853 // independently as part of the 'MC' work.
854 if (MO.isImm()) {
855 O << -MO.getImm();
856 return false;
857 }
858 O << '-';
859 }
860 }
861
862 PrintOperand(MI, OpNo, O);
863 return false;
864}
865
866bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
867 const char *ExtraCode,
868 raw_ostream &O) {
869 if (ExtraCode && ExtraCode[0]) {
870 if (ExtraCode[1] != 0) return true; // Unknown modifier.
871
872 switch (ExtraCode[0]) {
873 default: return true; // Unknown modifier.
874 case 'a': {
875 // Print as address — only valid with 'p' constraint.
876 const InlineAsm::Flag Flags(MI->getOperand(i: OpNo - 1).getImm());
877 if (Flags.getMemoryConstraintID() != InlineAsm::ConstraintCode::p)
878 return true;
879 break;
880 }
881 case 'b': // Print QImode register
882 case 'h': // Print QImode high register
883 case 'w': // Print HImode register
884 case 'k': // Print SImode register
885 case 'q': // Print SImode register
886 // These only apply to registers, ignore on mem.
887 break;
888 case 'H':
889 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
890 return true; // Unsupported modifier in Intel inline assembly.
891 } else {
892 PrintMemReference(MI, OpNo, O, Modifier: "H");
893 }
894 return false;
895 // Print memory only with displacement. The Modifer 'P' is used in inline
896 // asm to present a call symbol or a global symbol which can not use base
897 // reg or index reg.
898 case 'P':
899 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
900 PrintIntelMemReference(MI, OpNo, O, Modifier: "disp-only");
901 } else {
902 PrintMemReference(MI, OpNo, O, Modifier: "disp-only");
903 }
904 return false;
905 }
906 } else {
907 // Constraint 'p' requires modifier 'a'.
908 const InlineAsm::Flag Flags(MI->getOperand(i: OpNo - 1).getImm());
909 if (Flags.getMemoryConstraintID() == InlineAsm::ConstraintCode::p)
910 return true;
911 }
912 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
913 PrintIntelMemReference(MI, OpNo, O);
914 } else {
915 PrintMemReference(MI, OpNo, O);
916 }
917 return false;
918}
919
920void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
921 const Triple &TT = TM.getTargetTriple();
922
923 if (TT.isOSBinFormatELF()) {
924 // Assemble feature flags that may require creation of a note section.
925 unsigned FeatureFlagsAnd = 0;
926 if (M.getModuleFlag(Key: "cf-protection-branch"))
927 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
928 if (M.getModuleFlag(Key: "cf-protection-return"))
929 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
930
931 if (FeatureFlagsAnd) {
932 // Emit a .note.gnu.property section with the flags.
933 assert((TT.isX86_32() || TT.isX86_64()) &&
934 "CFProtection used on invalid architecture!");
935 MCSection *Cur = OutStreamer->getCurrentSectionOnly();
936 MCSection *Nt = MMI->getContext().getELFSection(
937 Section: ".note.gnu.property", Type: ELF::SHT_NOTE, Flags: ELF::SHF_ALLOC);
938 OutStreamer->switchSection(Section: Nt);
939
940 // Emitting note header.
941 const int WordSize = TT.isX86_64() && !TT.isX32() ? 8 : 4;
942 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8));
943 OutStreamer->emitIntValue(Value: 4, Size: 4 /*size*/); // data size for "GNU\0"
944 OutStreamer->emitIntValue(Value: 8 + WordSize, Size: 4 /*size*/); // Elf_Prop size
945 OutStreamer->emitIntValue(Value: ELF::NT_GNU_PROPERTY_TYPE_0, Size: 4 /*size*/);
946 OutStreamer->emitBytes(Data: StringRef("GNU", 4)); // note name
947
948 // Emitting an Elf_Prop for the CET properties.
949 OutStreamer->emitInt32(Value: ELF::GNU_PROPERTY_X86_FEATURE_1_AND);
950 OutStreamer->emitInt32(Value: 4); // data size
951 OutStreamer->emitInt32(Value: FeatureFlagsAnd); // data
952 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8)); // padding
953
954 OutStreamer->switchSection(Section: Cur);
955 }
956 }
957
958 if (TT.isOSBinFormatMachO())
959 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
960
961 if (TT.isOSBinFormatCOFF()) {
962 emitCOFFFeatureSymbol(M);
963 emitCOFFReplaceableFunctionData(M);
964
965 if (M.getModuleFlag(Key: "import-call-optimization"))
966 EnableImportCallOptimization = true;
967
968 // Unwind v3 is set for the entire module, not just individual functions.
969 if (M.getWinX64EHUnwindMode() == WinX64EHUnwindMode::V3)
970 OutStreamer->emitWinCFIUnwindVersion(Version: 3);
971 }
972
973 // TODO: Support prefixed registers for the Intel syntax.
974 const bool IntelSyntax =
975 MAI.getOutputAssemblerDialect() == InlineAsm::AD_Intel;
976 OutStreamer->emitSyntaxDirective(Syntax: IntelSyntax ? "intel" : "att",
977 Options: IntelSyntax ? "noprefix" : "");
978
979 // If this is not inline asm and we're in 16-bit
980 // mode prefix assembly with .code16.
981 bool is16 = TT.getEnvironment() == Triple::CODE16;
982 if (M.getModuleInlineAsm().empty() && is16) {
983 auto *XTS =
984 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
985 XTS->emitCode16();
986 }
987}
988
989static void
990emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
991 MachineModuleInfoImpl::StubValueTy &MCSym) {
992 // L_foo$stub:
993 OutStreamer.emitLabel(Symbol: StubLabel);
994 // .indirect_symbol _foo
995 OutStreamer.emitSymbolAttribute(Symbol: MCSym.getPointer(), Attribute: MCSA_IndirectSymbol);
996
997 if (MCSym.getInt())
998 // External to current translation unit.
999 OutStreamer.emitIntValue(Value: 0, Size: 4/*size*/);
1000 else
1001 // Internal to current translation unit.
1002 //
1003 // When we place the LSDA into the TEXT section, the type info
1004 // pointers need to be indirect and pc-rel. We accomplish this by
1005 // using NLPs; however, sometimes the types are local to the file.
1006 // We need to fill in the value for the NLP in those cases.
1007 OutStreamer.emitValue(
1008 Value: MCSymbolRefExpr::create(Symbol: MCSym.getPointer(), Ctx&: OutStreamer.getContext()),
1009 Size: 4 /*size*/);
1010}
1011
1012static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) {
1013
1014 MachineModuleInfoMachO &MMIMacho =
1015 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1016
1017 // Output stubs for dynamically-linked functions.
1018 MachineModuleInfoMachO::SymbolListTy Stubs;
1019
1020 // Output stubs for external and common global variables.
1021 Stubs = MMIMacho.GetGVStubList();
1022 if (!Stubs.empty()) {
1023 OutStreamer.switchSection(Section: MMI->getContext().getMachOSection(
1024 Segment: "__IMPORT", Section: "__pointers", TypeAndAttributes: MachO::S_NON_LAZY_SYMBOL_POINTERS,
1025 K: SectionKind::getMetadata()));
1026
1027 for (auto &Stub : Stubs)
1028 emitNonLazySymbolPointer(OutStreamer, StubLabel: Stub.first, MCSym&: Stub.second);
1029
1030 Stubs.clear();
1031 OutStreamer.addBlankLine();
1032 }
1033}
1034
1035/// True if this module is being built for windows/msvc, and uses floating
1036/// point. This is used to emit an undefined reference to _fltused. This is
1037/// needed in Windows kernel or driver contexts to find and prevent code from
1038/// modifying non-GPR registers.
1039///
1040/// TODO: It would be better if this was computed from MIR by looking for
1041/// selected floating-point instructions.
1042static bool usesMSVCFloatingPoint(const Triple &TT, const Module &M) {
1043 // Only needed for MSVC
1044 if (!TT.isWindowsMSVCEnvironment())
1045 return false;
1046
1047 for (const Function &F : M) {
1048 for (const Instruction &I : instructions(F)) {
1049 if (I.getType()->isFloatingPointTy())
1050 return true;
1051
1052 for (const auto &Op : I.operands()) {
1053 if (Op->getType()->isFloatingPointTy())
1054 return true;
1055 }
1056 }
1057 }
1058
1059 return false;
1060}
1061
1062void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
1063 const Triple &TT = TM.getTargetTriple();
1064
1065 if (TT.isOSBinFormatMachO()) {
1066 // Mach-O uses non-lazy symbol stubs to encode per-TU information into
1067 // global table for symbol lookup.
1068 emitNonLazyStubs(MMI, OutStreamer&: *OutStreamer);
1069
1070 // Emit fault map information.
1071 FM.serializeToFaultMapSection();
1072
1073 // This flag tells the linker that no global symbols contain code that fall
1074 // through to other global symbols (e.g. an implementation of multiple entry
1075 // points). If this doesn't occur, the linker can safely perform dead code
1076 // stripping. Since LLVM never generates code that does this, it is always
1077 // safe to set.
1078 OutStreamer->emitSubsectionsViaSymbols();
1079 } else if (TT.isOSBinFormatCOFF()) {
1080 // If import call optimization is enabled, emit the appropriate section.
1081 // We do this whether or not we recorded any items.
1082 if (EnableImportCallOptimization) {
1083 OutStreamer->switchSection(Section: getObjFileLowering().getImportCallSection());
1084
1085 // Section always starts with some magic.
1086 constexpr char ImpCallMagic[12] = "RetpolineV1";
1087 OutStreamer->emitBytes(Data: StringRef{ImpCallMagic, sizeof(ImpCallMagic)});
1088
1089 // Layout of this section is:
1090 // Per section that contains an item to record:
1091 // uint32_t SectionSize: Size in bytes for information in this section.
1092 // uint32_t Section Number
1093 // Per call to imported function in section:
1094 // uint32_t Kind: the kind of item.
1095 // uint32_t InstOffset: the offset of the instr in its parent section.
1096 for (auto &[Section, CallsToImportedFuncs] :
1097 SectionToImportedFunctionCalls) {
1098 unsigned SectionSize =
1099 sizeof(uint32_t) * (2 + 2 * CallsToImportedFuncs.size());
1100 OutStreamer->emitInt32(Value: SectionSize);
1101 OutStreamer->emitCOFFSecNumber(Symbol: Section->getBeginSymbol());
1102 for (auto &[CallsiteSymbol, Kind] : CallsToImportedFuncs) {
1103 OutStreamer->emitInt32(Value: Kind);
1104 OutStreamer->emitCOFFSecOffset(Symbol: CallsiteSymbol);
1105 }
1106 }
1107 }
1108
1109 if (usesMSVCFloatingPoint(TT, M)) {
1110 // In Windows' libcmt.lib, there is a file which is linked in only if the
1111 // symbol _fltused is referenced. Linking this in causes some
1112 // side-effects:
1113 //
1114 // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of
1115 // 64-bit mantissas at program start.
1116 //
1117 // 2. It links in support routines for floating-point in scanf and printf.
1118 //
1119 // MSVC emits an undefined reference to _fltused when there are any
1120 // floating point operations in the program (including calls). A program
1121 // that only has: `scanf("%f", &global_float);` may fail to trigger this,
1122 // but oh well...that's a documented issue.
1123 StringRef SymbolName =
1124 (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused";
1125 MCSymbol *S = MMI->getContext().getOrCreateSymbol(Name: SymbolName);
1126 OutStreamer->emitSymbolAttribute(Symbol: S, Attribute: MCSA_Global);
1127 return;
1128 }
1129 } else if (TT.isOSBinFormatELF()) {
1130 FM.serializeToFaultMapSection();
1131 }
1132
1133 // Emit __morestack address if needed for indirect calls.
1134 if (TT.isX86_64() && TM.getCodeModel() == CodeModel::Large) {
1135 if (MCSymbol *AddrSymbol = OutContext.lookupSymbol(Name: "__morestack_addr")) {
1136 Align Alignment(1);
1137 MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant(
1138 DL: getDataLayout(), Kind: SectionKind::getReadOnly(),
1139 /*C=*/nullptr, Alignment, /*F=*/nullptr);
1140 OutStreamer->switchSection(Section: ReadOnlySection);
1141 OutStreamer->emitLabel(Symbol: AddrSymbol);
1142
1143 unsigned PtrSize = MAI.getCodePointerSize();
1144 OutStreamer->emitSymbolValue(Sym: GetExternalSymbolSymbol(Sym: "__morestack"),
1145 Size: PtrSize);
1146 }
1147 }
1148}
1149
1150char X86AsmPrinter::ID = 0;
1151
1152INITIALIZE_PASS(X86AsmPrinter, "x86-asm-printer", "X86 Assembly Printer", false,
1153 false)
1154
1155//===----------------------------------------------------------------------===//
1156// Target Registry Stuff
1157//===----------------------------------------------------------------------===//
1158
1159// Force static initialization.
1160extern "C" LLVM_C_ABI void LLVMInitializeX86AsmPrinter() {
1161 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
1162 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
1163}
1164
1165PreservedAnalyses X86AsmPrinterBeginPass::run(Module &M,
1166 ModuleAnalysisManager &MAM) {
1167 // Force the computation of SDPI so that it is available for the
1168 // actual pass, where it cannot be explicitly requested.
1169 MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M);
1170 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1171 MAM.getResult<AsmPrinterAnalysis>(IR&: M).getPrinter());
1172 AsmPrinter.GetPSI = [&MAM](Module &M) {
1173 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1174 };
1175 AsmPrinter.GetSDPI = [&MAM](Module &M) {
1176 return &MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M)
1177 .getStaticDataProfileInfo();
1178 };
1179 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1180 AsmPrinter.doInitialization(M);
1181 return PreservedAnalyses::all();
1182}
1183
1184PreservedAnalyses X86AsmPrinterPass::run(MachineFunction &MF,
1185 MachineFunctionAnalysisManager &MFAM) {
1186 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1187 MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1188 .getCachedResult<AsmPrinterAnalysis>(IR&: *MF.getFunction().getParent())
1189 ->getPrinter());
1190 AsmPrinter.GetPSI = [&MFAM, &MF](Module &M) {
1191 return MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1192 .getCachedResult<ProfileSummaryAnalysis>(IR&: M);
1193 };
1194 AsmPrinter.GetSDPI = [&MFAM, &MF](Module &M) {
1195 return &MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1196 .getCachedResult<StaticDataProfileInfoAnalysis>(
1197 IR&: *MF.getFunction().getParent())
1198 ->getStaticDataProfileInfo();
1199 };
1200 setupMachineFunctionAsmPrinter(MFAM, MF, AsmPrinter);
1201 AsmPrinter.runOnMachineFunction(MF);
1202 return PreservedAnalyses::all();
1203}
1204
1205PreservedAnalyses X86AsmPrinterEndPass::run(Module &M,
1206 ModuleAnalysisManager &MAM) {
1207 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1208 MAM.getCachedResult<AsmPrinterAnalysis>(IR&: M)->getPrinter());
1209 AsmPrinter.GetPSI = [&MAM](Module &M) {
1210 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1211 };
1212 AsmPrinter.GetSDPI = [&MAM](Module &M) {
1213 return &MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M)
1214 .getStaticDataProfileInfo();
1215 };
1216 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1217 AsmPrinter.doFinalization(M);
1218 return PreservedAnalyses::all();
1219}
1220