1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to X86 machine code.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86AsmPrinter.h"
15#include "MCTargetDesc/X86ATTInstPrinter.h"
16#include "MCTargetDesc/X86BaseInfo.h"
17#include "MCTargetDesc/X86MCTargetDesc.h"
18#include "MCTargetDesc/X86TargetStreamer.h"
19#include "TargetInfo/X86TargetInfo.h"
20#include "X86.h"
21#include "X86InstrInfo.h"
22#include "X86MachineFunctionInfo.h"
23#include "X86Subtarget.h"
24#include "llvm-c/Visibility.h"
25#include "llvm/Analysis/StaticDataProfileInfo.h"
26#include "llvm/BinaryFormat/COFF.h"
27#include "llvm/BinaryFormat/ELF.h"
28#include "llvm/CodeGen/AsmPrinterAnalysis.h"
29#include "llvm/CodeGen/MachineConstantPool.h"
30#include "llvm/CodeGen/MachineModuleInfoImpls.h"
31#include "llvm/CodeGen/MachinePassManager.h"
32#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
33#include "llvm/CodeGenTypes/MachineValueType.h"
34#include "llvm/IR/DerivedTypes.h"
35#include "llvm/IR/InlineAsm.h"
36#include "llvm/IR/InstIterator.h"
37#include "llvm/IR/Mangler.h"
38#include "llvm/IR/Module.h"
39#include "llvm/IR/Type.h"
40#include "llvm/MC/MCAsmInfo.h"
41#include "llvm/MC/MCCodeEmitter.h"
42#include "llvm/MC/MCContext.h"
43#include "llvm/MC/MCExpr.h"
44#include "llvm/MC/MCInst.h"
45#include "llvm/MC/MCInstBuilder.h"
46#include "llvm/MC/MCSectionCOFF.h"
47#include "llvm/MC/MCSectionELF.h"
48#include "llvm/MC/MCSectionMachO.h"
49#include "llvm/MC/MCStreamer.h"
50#include "llvm/MC/MCSymbol.h"
51#include "llvm/MC/TargetRegistry.h"
52#include "llvm/Support/Debug.h"
53#include "llvm/Support/ErrorHandling.h"
54#include "llvm/Target/TargetMachine.h"
55
56using namespace llvm;
57
58X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
59 std::unique_ptr<MCStreamer> Streamer)
60 : AsmPrinter(TM, std::move(Streamer), ID), FM(*this) {
61 GetPSI = [this](Module &M) -> ProfileSummaryInfo * {
62 if (auto *PSIW = getAnalysisIfAvailable<ProfileSummaryInfoWrapperPass>())
63 return &PSIW->getPSI();
64 return nullptr;
65 };
66 GetSDPI = [this](Module &M) -> StaticDataProfileInfo * {
67 if (auto *SDPIW =
68 getAnalysisIfAvailable<StaticDataProfileInfoWrapperPass>())
69 return &SDPIW->getStaticDataProfileInfo();
70 return nullptr;
71 };
72}
73
74//===----------------------------------------------------------------------===//
75// Primitive Helper Functions.
76//===----------------------------------------------------------------------===//
77
78/// runOnMachineFunction - Emit the function body.
79///
80bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
81 PSI = GetPSI(*MF.getFunction().getParent());
82 SDPI = GetSDPI(*MF.getFunction().getParent());
83
84 Subtarget = &MF.getSubtarget<X86Subtarget>();
85
86 SMShadowTracker.startFunction(MF);
87 CodeEmitter.reset(p: TM.getTarget().createMCCodeEmitter(
88 II: *Subtarget->getInstrInfo(), Ctx&: MF.getContext()));
89
90 const Module *M = MF.getFunction().getParent();
91 EmitFPOData = Subtarget->isTargetWin32() && M->getCodeViewFlag();
92
93 IndCSPrefix = M->getModuleFlag(Key: "indirect_branch_cs_prefix");
94
95 SetupMachineFunction(MF);
96
97 if (Subtarget->isTargetCOFF()) {
98 bool Local = MF.getFunction().hasLocalLinkage();
99 OutStreamer->beginCOFFSymbolDef(Symbol: CurrentFnSym);
100 OutStreamer->emitCOFFSymbolStorageClass(
101 StorageClass: Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
102 OutStreamer->emitCOFFSymbolType(Type: COFF::IMAGE_SYM_DTYPE_FUNCTION
103 << COFF::SCT_COMPLEX_TYPE_SHIFT);
104 OutStreamer->endCOFFSymbolDef();
105 }
106
107 // Emit the rest of the function body.
108 emitFunctionBody();
109
110 // Emit the XRay table for this function.
111 emitXRayTable();
112
113 EmitFPOData = false;
114
115 IndCSPrefix = false;
116
117 // We didn't modify anything.
118 return false;
119}
120
121void X86AsmPrinter::emitFunctionBodyStart() {
122 if (EmitFPOData) {
123 auto *XTS =
124 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
125 XTS->emitFPOProc(
126 ProcSym: CurrentFnSym,
127 ParamsSize: MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize());
128 }
129}
130
131void X86AsmPrinter::emitFunctionBodyEnd() {
132 if (EmitFPOData) {
133 auto *XTS =
134 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
135 XTS->emitFPOEndProc();
136 }
137}
138
139uint32_t X86AsmPrinter::MaskKCFIType(uint32_t Value) {
140 // If the type hash matches an invalid pattern, mask the value.
141 const uint32_t InvalidValues[] = {
142 0xFA1E0FF3, /* ENDBR64 */
143 0xFB1E0FF3, /* ENDBR32 */
144 };
145 for (uint32_t N : InvalidValues) {
146 // LowerKCFI_CHECK emits -Value for indirect call checks, so we must also
147 // mask that. Note that -(Value + 1) == ~Value.
148 if (N == Value || -N == Value)
149 return Value + 1;
150 }
151 return Value;
152}
153
154void X86AsmPrinter::EmitKCFITypePadding(const MachineFunction &MF,
155 bool HasType) {
156 // Keep the function entry aligned, taking patchable-function-prefix into
157 // account if set.
158 int64_t PrefixBytes = MF.getFunction().getFnAttributeAsParsedInteger(
159 Kind: "patchable-function-prefix");
160
161 // Also take the type identifier into account if we're emitting
162 // one. Otherwise, just pad with nops. The X86::MOV32ri instruction emitted
163 // in X86AsmPrinter::emitKCFITypeId is 5 bytes long.
164 if (HasType)
165 PrefixBytes += 5;
166
167 emitNops(N: offsetToAlignment(Value: PrefixBytes, Alignment: MF.getPreferredAlignment()));
168}
169
170/// emitKCFITypeId - Emit the KCFI type information in architecture specific
171/// format.
172void X86AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
173 const Function &F = MF.getFunction();
174 if (!F.getParent()->getModuleFlag(Key: "kcfi"))
175 return;
176
177 ConstantInt *Type = nullptr;
178 if (const MDNode *MD = F.getMetadata(KindID: LLVMContext::MD_kcfi_type))
179 Type = mdconst::extract<ConstantInt>(MD: MD->getOperand(I: 0));
180
181 // If we don't have a type to emit, just emit padding if needed to maintain
182 // the same alignment for all functions.
183 if (!Type) {
184 EmitKCFITypePadding(MF, /*HasType=*/false);
185 return;
186 }
187
188 // Emit a function symbol for the type data to avoid unreachable instruction
189 // warnings from binary validation tools, and use the same linkage as the
190 // parent function. Note that using local linkage would result in duplicate
191 // symbols for weak parent functions.
192 MCSymbol *FnSym = OutContext.getOrCreateSymbol(Name: "__cfi_" + MF.getName());
193 emitLinkage(GV: &MF.getFunction(), GVSym: FnSym);
194 if (MAI.hasDotTypeDotSizeDirective())
195 OutStreamer->emitSymbolAttribute(Symbol: FnSym, Attribute: MCSA_ELF_TypeFunction);
196 OutStreamer->emitLabel(Symbol: FnSym);
197
198 // Embed the type hash in the X86::MOV32ri instruction to avoid special
199 // casing object file parsers.
200 EmitKCFITypePadding(MF);
201 unsigned DestReg = X86::EAX;
202
203 if (F.getParent()->getModuleFlag(Key: "kcfi-arity")) {
204 // The ArityToRegMap assumes the 64-bit SysV ABI.
205 [[maybe_unused]] const auto &Triple = MF.getTarget().getTargetTriple();
206 assert(Triple.isX86_64() && !Triple.isOSWindows());
207
208 // Determine the function's arity (i.e., the number of arguments) at the ABI
209 // level by counting the number of parameters that are passed
210 // as registers, such as pointers and 64-bit (or smaller) integers. The
211 // Linux x86-64 ABI allows up to 6 integer parameters to be passed in GPRs.
212 // Additional parameters or parameters larger than 64 bits may be passed on
213 // the stack, in which case the arity is denoted as 7. Floating-point
214 // arguments passed in XMM0-XMM7 are not counted toward arity because
215 // floating-point values are not relevant to enforcing kCFI at this time.
216 const unsigned ArityToRegMap[8] = {X86::EAX, X86::ECX, X86::EDX, X86::EBX,
217 X86::ESP, X86::EBP, X86::ESI, X86::EDI};
218 int Arity;
219 if (MF.getInfo<X86MachineFunctionInfo>()->getArgumentStackSize() > 0) {
220 Arity = 7;
221 } else {
222 Arity = 0;
223 for (const auto &LI : MF.getRegInfo().liveins()) {
224 auto Reg = LI.first;
225 if (X86::GR8RegClass.contains(Reg) || X86::GR16RegClass.contains(Reg) ||
226 X86::GR32RegClass.contains(Reg) ||
227 X86::GR64RegClass.contains(Reg)) {
228 ++Arity;
229 }
230 }
231 }
232 DestReg = ArityToRegMap[Arity];
233 }
234
235 EmitAndCountInstruction(Inst&: MCInstBuilder(X86::MOV32ri)
236 .addReg(Reg: DestReg)
237 .addImm(Val: MaskKCFIType(Value: Type->getZExtValue())));
238
239 if (MAI.hasDotTypeDotSizeDirective()) {
240 MCSymbol *EndSym = OutContext.createTempSymbol(Name: "cfi_func_end");
241 OutStreamer->emitLabel(Symbol: EndSym);
242
243 const MCExpr *SizeExp = MCBinaryExpr::createSub(
244 LHS: MCSymbolRefExpr::create(Symbol: EndSym, Ctx&: OutContext),
245 RHS: MCSymbolRefExpr::create(Symbol: FnSym, Ctx&: OutContext), Ctx&: OutContext);
246 OutStreamer->emitELFSize(Symbol: FnSym, Value: SizeExp);
247 }
248}
249
250/// PrintSymbolOperand - Print a raw symbol reference operand. This handles
251/// jump tables, constant pools, global address and external symbols, all of
252/// which print to a label with various suffixes for relocation types etc.
253void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
254 raw_ostream &O) {
255 switch (MO.getType()) {
256 default: llvm_unreachable("unknown symbol type!");
257 case MachineOperand::MO_ConstantPoolIndex:
258 GetCPISymbol(CPID: MO.getIndex())->print(OS&: O, MAI);
259 printOffset(Offset: MO.getOffset(), OS&: O);
260 break;
261 case MachineOperand::MO_GlobalAddress: {
262 const GlobalValue *GV = MO.getGlobal();
263
264 MCSymbol *GVSym;
265 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
266 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
267 GVSym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
268 else
269 GVSym = getSymbolPreferLocal(GV: *GV);
270
271 // Handle dllimport linkage.
272 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
273 GVSym = OutContext.getOrCreateSymbol(Name: Twine("__imp_") + GVSym->getName());
274 else if (MO.getTargetFlags() == X86II::MO_COFFSTUB)
275 GVSym =
276 OutContext.getOrCreateSymbol(Name: Twine(".refptr.") + GVSym->getName());
277
278 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
279 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
280 MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, Suffix: "$non_lazy_ptr");
281 MachineModuleInfoImpl::StubValueTy &StubSym =
282 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
283 if (!StubSym.getPointer())
284 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
285 !GV->hasInternalLinkage());
286 }
287
288 // If the name begins with a dollar-sign, enclose it in parens. We do this
289 // to avoid having it look like an integer immediate to the assembler.
290 if (GVSym->getName()[0] != '$')
291 GVSym->print(OS&: O, MAI);
292 else {
293 O << '(';
294 GVSym->print(OS&: O, MAI);
295 O << ')';
296 }
297 printOffset(Offset: MO.getOffset(), OS&: O);
298 break;
299 }
300 }
301
302 switch (MO.getTargetFlags()) {
303 default:
304 llvm_unreachable("Unknown target flag on GV operand");
305 case X86II::MO_NO_FLAG: // No flag.
306 break;
307 case X86II::MO_DARWIN_NONLAZY:
308 case X86II::MO_DLLIMPORT:
309 case X86II::MO_COFFSTUB:
310 // These affect the name of the symbol, not any suffix.
311 break;
312 case X86II::MO_GOT_ABSOLUTE_ADDRESS:
313 O << " + [.-";
314 MF->getPICBaseSymbol()->print(OS&: O, MAI);
315 O << ']';
316 break;
317 case X86II::MO_PIC_BASE_OFFSET:
318 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
319 O << '-';
320 MF->getPICBaseSymbol()->print(OS&: O, MAI);
321 break;
322 case X86II::MO_TLSGD: O << "@TLSGD"; break;
323 case X86II::MO_TLSLD: O << "@TLSLD"; break;
324 case X86II::MO_TLSLDM: O << "@TLSLDM"; break;
325 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
326 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
327 case X86II::MO_TPOFF: O << "@TPOFF"; break;
328 case X86II::MO_DTPOFF: O << "@DTPOFF"; break;
329 case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
330 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
331 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
332 case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break;
333 case X86II::MO_GOT: O << "@GOT"; break;
334 case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
335 case X86II::MO_PLT: O << "@PLT"; break;
336 case X86II::MO_TLVP: O << "@TLVP"; break;
337 case X86II::MO_TLVP_PIC_BASE:
338 O << "@TLVP" << '-';
339 MF->getPICBaseSymbol()->print(OS&: O, MAI);
340 break;
341 case X86II::MO_SECREL: O << "@SECREL32"; break;
342 }
343}
344
345void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo,
346 raw_ostream &O) {
347 const MachineOperand &MO = MI->getOperand(i: OpNo);
348 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
349 switch (MO.getType()) {
350 default: llvm_unreachable("unknown operand type!");
351 case MachineOperand::MO_Register: {
352 if (IsATT)
353 O << '%';
354 O << X86ATTInstPrinter::getRegisterName(Reg: MO.getReg());
355 return;
356 }
357
358 case MachineOperand::MO_Immediate:
359 if (IsATT)
360 O << '$';
361 O << MO.getImm();
362 return;
363
364 case MachineOperand::MO_ConstantPoolIndex:
365 case MachineOperand::MO_GlobalAddress: {
366 switch (MI->getInlineAsmDialect()) {
367 case InlineAsm::AD_ATT:
368 O << '$';
369 break;
370 case InlineAsm::AD_Intel:
371 O << "offset ";
372 break;
373 }
374 PrintSymbolOperand(MO, O);
375 break;
376 }
377 case MachineOperand::MO_BlockAddress: {
378 MCSymbol *Sym = GetBlockAddressSymbol(BA: MO.getBlockAddress());
379 Sym->print(OS&: O, MAI);
380 break;
381 }
382 }
383}
384
385/// PrintModifiedOperand - Print subregisters based on supplied modifier,
386/// deferring to PrintOperand() if no modifier was supplied or if operand is not
387/// a register.
388void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
389 raw_ostream &O, StringRef Modifier) {
390 const MachineOperand &MO = MI->getOperand(i: OpNo);
391 if (Modifier.empty() || !MO.isReg())
392 return PrintOperand(MI, OpNo, O);
393 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
394 O << '%';
395 Register Reg = MO.getReg();
396 if (Modifier.consume_front(Prefix: "subreg")) {
397 unsigned Size = (Modifier == "64") ? 64
398 : (Modifier == "32") ? 32
399 : (Modifier == "16") ? 16
400 : 8;
401 Reg = getX86SubSuperRegister(Reg, Size);
402 }
403 O << X86ATTInstPrinter::getRegisterName(Reg);
404}
405
406/// PrintPCRelImm - This is used to print an immediate value that ends up
407/// being encoded as a pc-relative value. These print slightly differently, for
408/// example, a $ is not emitted.
409void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo,
410 raw_ostream &O) {
411 const MachineOperand &MO = MI->getOperand(i: OpNo);
412 switch (MO.getType()) {
413 default: llvm_unreachable("Unknown pcrel immediate operand");
414 case MachineOperand::MO_Register:
415 // pc-relativeness was handled when computing the value in the reg.
416 PrintOperand(MI, OpNo, O);
417 return;
418 case MachineOperand::MO_Immediate:
419 O << MO.getImm();
420 return;
421 case MachineOperand::MO_GlobalAddress:
422 PrintSymbolOperand(MO, O);
423 return;
424 }
425}
426
427void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
428 raw_ostream &O, StringRef Modifier) {
429 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
430 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
431 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
432
433 // If we really don't want to print out (rip), don't.
434 bool HasBaseReg = BaseReg.getReg() != 0;
435 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
436 HasBaseReg = false;
437
438 // If we really just want to print out displacement.
439 if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only")
440 HasBaseReg = false;
441
442 // HasParenPart - True if we will print out the () part of the mem ref.
443 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
444
445 switch (DispSpec.getType()) {
446 default:
447 llvm_unreachable("unknown operand type!");
448 case MachineOperand::MO_Immediate: {
449 int DispVal = DispSpec.getImm();
450 if (DispVal || !HasParenPart)
451 O << DispVal;
452 break;
453 }
454 case MachineOperand::MO_GlobalAddress:
455 case MachineOperand::MO_ConstantPoolIndex:
456 PrintSymbolOperand(MO: DispSpec, O);
457 break;
458 }
459
460 if (Modifier == "H")
461 O << "+8";
462
463 if (HasParenPart) {
464 assert(IndexReg.getReg() != X86::ESP &&
465 "X86 doesn't allow scaling by ESP");
466
467 O << '(';
468 if (HasBaseReg)
469 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O, Modifier);
470
471 if (IndexReg.getReg()) {
472 O << ',';
473 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O, Modifier);
474 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
475 if (ScaleVal != 1)
476 O << ',' << ScaleVal;
477 }
478 O << ')';
479 }
480}
481
482static bool isSimpleReturn(const MachineInstr &MI) {
483 // We exclude all tail calls here which set both isReturn and isCall.
484 return MI.getDesc().isReturn() && !MI.getDesc().isCall();
485}
486
487static bool isIndirectBranchOrTailCall(const MachineInstr &MI) {
488 unsigned Opc = MI.getOpcode();
489 return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ ||
490 Opc == X86::TAILJMPr || Opc == X86::TAILJMPm ||
491 Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 ||
492 Opc == X86::TCRETURNri || Opc == X86::TCRETURN_WIN64ri ||
493 Opc == X86::TCRETURN_HIPE32ri || Opc == X86::TCRETURNmi ||
494 Opc == X86::TCRETURN_WINmi64 || Opc == X86::TCRETURNri64 ||
495 Opc == X86::TCRETURNmi64 || Opc == X86::TCRETURNri64_ImpCall ||
496 Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX;
497}
498
499void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) {
500 if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) {
501 auto I = MBB.getLastNonDebugInstr();
502 if (I != MBB.end()) {
503 if ((Subtarget->hardenSlsRet() && isSimpleReturn(MI: *I)) ||
504 (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(MI: *I))) {
505 MCInst TmpInst;
506 TmpInst.setOpcode(X86::INT3);
507 EmitToStreamer(S&: *OutStreamer, Inst: TmpInst);
508 }
509 }
510 }
511 if (SplitChainedAtEndOfBlock) {
512 OutStreamer->emitWinCFISplitChained();
513 // Splitting into a new unwind info implicitly starts a prolog. We have no
514 // instructions to add to the prolog, so immediately end it.
515 OutStreamer->emitWinCFIEndProlog();
516 SplitChainedAtEndOfBlock = false;
517 }
518 AsmPrinter::emitBasicBlockEnd(MBB);
519 SMShadowTracker.emitShadowPadding(OutStreamer&: *OutStreamer, STI: getSubtargetInfo());
520}
521
522void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
523 raw_ostream &O, StringRef Modifier) {
524 assert(isMem(*MI, OpNo) && "Invalid memory reference!");
525 const MachineOperand &Segment = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
526 if (Segment.getReg()) {
527 PrintModifiedOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O, Modifier);
528 O << ':';
529 }
530 PrintLeaMemReference(MI, OpNo, O, Modifier);
531}
532
533void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
534 unsigned OpNo, raw_ostream &O,
535 StringRef Modifier) {
536 const MachineOperand &BaseReg = MI->getOperand(i: OpNo + X86::AddrBaseReg);
537 unsigned ScaleVal = MI->getOperand(i: OpNo + X86::AddrScaleAmt).getImm();
538 const MachineOperand &IndexReg = MI->getOperand(i: OpNo + X86::AddrIndexReg);
539 const MachineOperand &DispSpec = MI->getOperand(i: OpNo + X86::AddrDisp);
540 const MachineOperand &SegReg = MI->getOperand(i: OpNo + X86::AddrSegmentReg);
541
542 // If we really don't want to print out (rip), don't.
543 bool HasBaseReg = BaseReg.getReg() != 0;
544 if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
545 HasBaseReg = false;
546
547 // If we really just want to print out displacement.
548 if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only") {
549 HasBaseReg = false;
550 }
551
552 // If this has a segment register, print it.
553 if (SegReg.getReg()) {
554 PrintOperand(MI, OpNo: OpNo + X86::AddrSegmentReg, O);
555 O << ':';
556 }
557
558 O << '[';
559
560 bool NeedPlus = false;
561 if (HasBaseReg) {
562 PrintOperand(MI, OpNo: OpNo + X86::AddrBaseReg, O);
563 NeedPlus = true;
564 }
565
566 if (IndexReg.getReg()) {
567 if (NeedPlus) O << " + ";
568 if (ScaleVal != 1)
569 O << ScaleVal << '*';
570 PrintOperand(MI, OpNo: OpNo + X86::AddrIndexReg, O);
571 NeedPlus = true;
572 }
573
574 if (!DispSpec.isImm()) {
575 if (NeedPlus) O << " + ";
576 // Do not add `offset` operator. Matches the behaviour of
577 // X86IntelInstPrinter::printMemReference.
578 PrintSymbolOperand(MO: DispSpec, O);
579 } else {
580 int64_t DispVal = DispSpec.getImm();
581 if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
582 if (NeedPlus) {
583 if (DispVal > 0)
584 O << " + ";
585 else {
586 O << " - ";
587 DispVal = -DispVal;
588 }
589 }
590 O << DispVal;
591 }
592 }
593 O << ']';
594}
595
596const MCSubtargetInfo *X86AsmPrinter::getIFuncMCSubtargetInfo() const {
597 assert(Subtarget);
598 return Subtarget;
599}
600
601void X86AsmPrinter::emitMachOIFuncStubBody(Module &M, const GlobalIFunc &GI,
602 MCSymbol *LazyPointer) {
603 // _ifunc:
604 // jmpq *lazy_pointer(%rip)
605
606 OutStreamer->emitInstruction(
607 Inst: MCInstBuilder(X86::JMP32m)
608 .addReg(Reg: X86::RIP)
609 .addImm(Val: 1)
610 .addReg(Reg: 0)
611 .addOperand(Op: MCOperand::createExpr(
612 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
613 .addReg(Reg: 0),
614 STI: *Subtarget);
615}
616
617void X86AsmPrinter::emitMachOIFuncStubHelperBody(Module &M,
618 const GlobalIFunc &GI,
619 MCSymbol *LazyPointer) {
620 // _ifunc.stub_helper:
621 // push %rax
622 // push %rdi
623 // push %rsi
624 // push %rdx
625 // push %rcx
626 // push %r8
627 // push %r9
628 // callq foo
629 // movq %rax,lazy_pointer(%rip)
630 // pop %r9
631 // pop %r8
632 // pop %rcx
633 // pop %rdx
634 // pop %rsi
635 // pop %rdi
636 // pop %rax
637 // jmpq *lazy_pointer(%rip)
638
639 for (int Reg :
640 {X86::RAX, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9})
641 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::PUSH64r).addReg(Reg),
642 STI: *Subtarget);
643
644 OutStreamer->emitInstruction(
645 Inst: MCInstBuilder(X86::CALL64pcrel32)
646 .addOperand(Op: MCOperand::createExpr(Val: lowerConstant(CV: GI.getResolver()))),
647 STI: *Subtarget);
648
649 OutStreamer->emitInstruction(
650 Inst: MCInstBuilder(X86::MOV64mr)
651 .addReg(Reg: X86::RIP)
652 .addImm(Val: 1)
653 .addReg(Reg: 0)
654 .addOperand(Op: MCOperand::createExpr(
655 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
656 .addReg(Reg: 0)
657 .addReg(Reg: X86::RAX),
658 STI: *Subtarget);
659
660 for (int Reg :
661 {X86::R9, X86::R8, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RAX})
662 OutStreamer->emitInstruction(Inst: MCInstBuilder(X86::POP64r).addReg(Reg),
663 STI: *Subtarget);
664
665 OutStreamer->emitInstruction(
666 Inst: MCInstBuilder(X86::JMP32m)
667 .addReg(Reg: X86::RIP)
668 .addImm(Val: 1)
669 .addReg(Reg: 0)
670 .addOperand(Op: MCOperand::createExpr(
671 Val: MCSymbolRefExpr::create(Symbol: LazyPointer, Ctx&: OutContext)))
672 .addReg(Reg: 0),
673 STI: *Subtarget);
674}
675
676static bool printAsmMRegister(const X86AsmPrinter &P, const MachineInstr &MI,
677 const MachineOperand &MO, char Mode,
678 raw_ostream &O) {
679 Register Reg = MO.getReg();
680 bool EmitPercent = MI.getInlineAsmDialect() == InlineAsm::AD_ATT;
681
682 if (!X86::GR8RegClass.contains(Reg) &&
683 !X86::GR16RegClass.contains(Reg) &&
684 !X86::GR32RegClass.contains(Reg) &&
685 !X86::GR64RegClass.contains(Reg))
686 return true;
687
688 switch (Mode) {
689 default: return true; // Unknown mode.
690 case 'b': // Print QImode register
691 Reg = getX86SubSuperRegister(Reg, Size: 8);
692 break;
693 case 'h': // Print QImode high register
694 Reg = getX86SubSuperRegister(Reg, Size: 8, High: true);
695 if (!Reg.isValid())
696 return true;
697 break;
698 case 'w': // Print HImode register
699 Reg = getX86SubSuperRegister(Reg, Size: 16);
700 break;
701 case 'k': // Print SImode register
702 Reg = getX86SubSuperRegister(Reg, Size: 32);
703 break;
704 case 'V':
705 EmitPercent = false;
706 [[fallthrough]];
707 case 'q':
708 // Print 64-bit register names if 64-bit integer registers are available.
709 // Otherwise, print 32-bit register names.
710 Reg = getX86SubSuperRegister(Reg, Size: P.getSubtarget().is64Bit() ? 64 : 32);
711 break;
712 }
713
714 if (EmitPercent)
715 O << '%';
716
717 O << X86ATTInstPrinter::getRegisterName(Reg);
718 return false;
719}
720
721static bool printAsmVRegister(const MachineInstr &MI, const MachineOperand &MO,
722 char Mode, raw_ostream &O) {
723 Register Reg = MO.getReg();
724 bool EmitPercent = MI.getInlineAsmDialect() == InlineAsm::AD_ATT;
725
726 unsigned Index;
727 if (X86::VR128XRegClass.contains(Reg))
728 Index = Reg - X86::XMM0;
729 else if (X86::VR256XRegClass.contains(Reg))
730 Index = Reg - X86::YMM0;
731 else if (X86::VR512RegClass.contains(Reg))
732 Index = Reg - X86::ZMM0;
733 else
734 return true;
735
736 switch (Mode) {
737 default: // Unknown mode.
738 return true;
739 case 'x': // Print V4SFmode register
740 Reg = X86::XMM0 + Index;
741 break;
742 case 't': // Print V8SFmode register
743 Reg = X86::YMM0 + Index;
744 break;
745 case 'g': // Print V16SFmode register
746 Reg = X86::ZMM0 + Index;
747 break;
748 }
749
750 if (EmitPercent)
751 O << '%';
752
753 O << X86ATTInstPrinter::getRegisterName(Reg);
754 return false;
755}
756
757/// PrintAsmOperand - Print out an operand for an inline asm expression.
758///
759bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
760 const char *ExtraCode, raw_ostream &O) {
761 // Does this asm operand have a single letter operand modifier?
762 if (ExtraCode && ExtraCode[0]) {
763 if (ExtraCode[1] != 0) return true; // Unknown modifier.
764
765 const MachineOperand &MO = MI->getOperand(i: OpNo);
766 const bool IsIntel = MI->getInlineAsmDialect() == InlineAsm::AD_Intel;
767
768 switch (ExtraCode[0]) {
769 default:
770 // See if this is a generic print operand
771 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS&: O);
772 case 'a': // This is an address. Currently only 'i' and 'r' are expected.
773 switch (MO.getType()) {
774 default:
775 return true;
776 case MachineOperand::MO_Immediate:
777 O << MO.getImm();
778 return false;
779 case MachineOperand::MO_ConstantPoolIndex:
780 case MachineOperand::MO_JumpTableIndex:
781 case MachineOperand::MO_ExternalSymbol:
782 llvm_unreachable("unexpected operand type!");
783 case MachineOperand::MO_GlobalAddress:
784 PrintSymbolOperand(MO, O);
785 if (Subtarget->is64Bit())
786 O << "(%rip)";
787 return false;
788 case MachineOperand::MO_Register:
789 O << (IsIntel ? '[' : '(');
790 PrintOperand(MI, OpNo, O);
791 O << (IsIntel ? ']' : ')');
792 return false;
793 }
794
795 case 'c': // Don't print "$" before a global var name or constant.
796 switch (MO.getType()) {
797 default:
798 PrintOperand(MI, OpNo, O);
799 break;
800 case MachineOperand::MO_Immediate:
801 O << MO.getImm();
802 break;
803 case MachineOperand::MO_ConstantPoolIndex:
804 case MachineOperand::MO_JumpTableIndex:
805 case MachineOperand::MO_ExternalSymbol:
806 llvm_unreachable("unexpected operand type!");
807 case MachineOperand::MO_GlobalAddress:
808 PrintSymbolOperand(MO, O);
809 break;
810 }
811 return false;
812
813 case 'A': // Print '*' before a register (it must be a register)
814 if (MO.isReg()) {
815 if (!IsIntel)
816 O << '*';
817 PrintOperand(MI, OpNo, O);
818 return false;
819 }
820 return true;
821
822 case 'b': // Print QImode register
823 case 'h': // Print QImode high register
824 case 'w': // Print HImode register
825 case 'k': // Print SImode register
826 case 'q': // Print DImode register
827 case 'V': // Print native register without '%'
828 if (MO.isReg())
829 return printAsmMRegister(P: *this, MI: *MI, MO, Mode: ExtraCode[0], O);
830 PrintOperand(MI, OpNo, O);
831 return false;
832
833 case 'x': // Print V4SFmode register
834 case 't': // Print V8SFmode register
835 case 'g': // Print V16SFmode register
836 if (MO.isReg())
837 return printAsmVRegister(MI: *MI, MO, Mode: ExtraCode[0], O);
838 PrintOperand(MI, OpNo, O);
839 return false;
840
841 case 'p': {
842 const MachineOperand &MO = MI->getOperand(i: OpNo);
843 if (MO.getType() != MachineOperand::MO_GlobalAddress)
844 return true;
845 PrintSymbolOperand(MO, O);
846 return false;
847 }
848
849 case 'P': // This is the operand of a call, treat specially.
850 PrintPCRelImm(MI, OpNo, O);
851 return false;
852
853 case 'n': // Negate the immediate or print a '-' before the operand.
854 // Note: this is a temporary solution. It should be handled target
855 // independently as part of the 'MC' work.
856 if (MO.isImm()) {
857 O << -MO.getImm();
858 return false;
859 }
860 O << '-';
861 }
862 }
863
864 PrintOperand(MI, OpNo, O);
865 return false;
866}
867
868bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
869 const char *ExtraCode,
870 raw_ostream &O) {
871 if (ExtraCode && ExtraCode[0]) {
872 if (ExtraCode[1] != 0) return true; // Unknown modifier.
873
874 switch (ExtraCode[0]) {
875 default: return true; // Unknown modifier.
876 case 'a': {
877 // Print as address — only valid with 'p' constraint.
878 const InlineAsm::Flag Flags(MI->getOperand(i: OpNo - 1).getImm());
879 if (Flags.getMemoryConstraintID() != InlineAsm::ConstraintCode::p)
880 return true;
881 break;
882 }
883 case 'b': // Print QImode register
884 case 'h': // Print QImode high register
885 case 'w': // Print HImode register
886 case 'k': // Print SImode register
887 case 'q': // Print SImode register
888 // These only apply to registers, ignore on mem.
889 break;
890 case 'H':
891 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
892 return true; // Unsupported modifier in Intel inline assembly.
893 } else {
894 PrintMemReference(MI, OpNo, O, Modifier: "H");
895 }
896 return false;
897 // Print memory only with displacement. The Modifer 'P' is used in inline
898 // asm to present a call symbol or a global symbol which can not use base
899 // reg or index reg.
900 case 'P':
901 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
902 PrintIntelMemReference(MI, OpNo, O, Modifier: "disp-only");
903 } else {
904 PrintMemReference(MI, OpNo, O, Modifier: "disp-only");
905 }
906 return false;
907 }
908 } else {
909 // Constraint 'p' requires modifier 'a'.
910 const InlineAsm::Flag Flags(MI->getOperand(i: OpNo - 1).getImm());
911 if (Flags.getMemoryConstraintID() == InlineAsm::ConstraintCode::p)
912 return true;
913 }
914 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
915 PrintIntelMemReference(MI, OpNo, O);
916 } else {
917 PrintMemReference(MI, OpNo, O);
918 }
919 return false;
920}
921
922void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
923 const Triple &TT = TM.getTargetTriple();
924
925 if (TT.isOSBinFormatELF()) {
926 // Assemble feature flags that may require creation of a note section.
927 unsigned FeatureFlagsAnd = 0;
928 if (M.getModuleFlag(Key: "cf-protection-branch"))
929 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
930 if (M.getModuleFlag(Key: "cf-protection-return"))
931 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
932
933 if (FeatureFlagsAnd) {
934 // Emit a .note.gnu.property section with the flags.
935 assert((TT.isX86_32() || TT.isX86_64()) &&
936 "CFProtection used on invalid architecture!");
937 MCSection *Cur = OutStreamer->getCurrentSectionOnly();
938 MCSection *Nt = MMI->getContext().getELFSection(
939 Section: ".note.gnu.property", Type: ELF::SHT_NOTE, Flags: ELF::SHF_ALLOC);
940 OutStreamer->switchSection(Section: Nt);
941
942 // Emitting note header.
943 const int WordSize = TT.isX86_64() && !TT.isX32() ? 8 : 4;
944 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8));
945 OutStreamer->emitIntValue(Value: 4, Size: 4 /*size*/); // data size for "GNU\0"
946 OutStreamer->emitIntValue(Value: 8 + WordSize, Size: 4 /*size*/); // Elf_Prop size
947 OutStreamer->emitIntValue(Value: ELF::NT_GNU_PROPERTY_TYPE_0, Size: 4 /*size*/);
948 OutStreamer->emitBytes(Data: StringRef("GNU", 4)); // note name
949
950 // Emitting an Elf_Prop for the CET properties.
951 OutStreamer->emitInt32(Value: ELF::GNU_PROPERTY_X86_FEATURE_1_AND);
952 OutStreamer->emitInt32(Value: 4); // data size
953 OutStreamer->emitInt32(Value: FeatureFlagsAnd); // data
954 emitAlignment(Alignment: WordSize == 4 ? Align(4) : Align(8)); // padding
955
956 OutStreamer->switchSection(Section: Cur);
957 }
958 }
959
960 if (TT.isOSBinFormatMachO())
961 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
962
963 if (TT.isOSBinFormatCOFF()) {
964 emitCOFFFeatureSymbol(M);
965 emitCOFFReplaceableFunctionData(M);
966
967 if (M.getModuleFlag(Key: "import-call-optimization"))
968 EnableImportCallOptimization = true;
969
970 // Unwind v3 is set for the entire module, not just individual functions.
971 if (M.getWinX64EHUnwindMode() == WinX64EHUnwindMode::V3)
972 OutStreamer->emitWinCFIUnwindVersion(Version: 3);
973 }
974
975 // TODO: Support prefixed registers for the Intel syntax.
976 const bool IntelSyntax =
977 MAI.getOutputAssemblerDialect() == InlineAsm::AD_Intel;
978 OutStreamer->emitSyntaxDirective(Syntax: IntelSyntax ? "intel" : "att",
979 Options: IntelSyntax ? "noprefix" : "");
980
981 // If this is not inline asm and we're in 16-bit
982 // mode prefix assembly with .code16.
983 bool is16 = TT.getEnvironment() == Triple::CODE16;
984 if (M.getModuleInlineAsm().empty() && is16) {
985 auto *XTS =
986 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
987 XTS->emitCode16();
988 }
989}
990
991static void
992emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
993 MachineModuleInfoImpl::StubValueTy &MCSym) {
994 // L_foo$stub:
995 OutStreamer.emitLabel(Symbol: StubLabel);
996 // .indirect_symbol _foo
997 OutStreamer.emitSymbolAttribute(Symbol: MCSym.getPointer(), Attribute: MCSA_IndirectSymbol);
998
999 if (MCSym.getInt())
1000 // External to current translation unit.
1001 OutStreamer.emitIntValue(Value: 0, Size: 4/*size*/);
1002 else
1003 // Internal to current translation unit.
1004 //
1005 // When we place the LSDA into the TEXT section, the type info
1006 // pointers need to be indirect and pc-rel. We accomplish this by
1007 // using NLPs; however, sometimes the types are local to the file.
1008 // We need to fill in the value for the NLP in those cases.
1009 OutStreamer.emitValue(
1010 Value: MCSymbolRefExpr::create(Symbol: MCSym.getPointer(), Ctx&: OutStreamer.getContext()),
1011 Size: 4 /*size*/);
1012}
1013
1014static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) {
1015
1016 MachineModuleInfoMachO &MMIMacho =
1017 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1018
1019 // Output stubs for dynamically-linked functions.
1020 MachineModuleInfoMachO::SymbolListTy Stubs;
1021
1022 // Output stubs for external and common global variables.
1023 Stubs = MMIMacho.GetGVStubList();
1024 if (!Stubs.empty()) {
1025 OutStreamer.switchSection(Section: MMI->getContext().getMachOSection(
1026 Segment: "__IMPORT", Section: "__pointers", TypeAndAttributes: MachO::S_NON_LAZY_SYMBOL_POINTERS,
1027 K: SectionKind::getMetadata()));
1028
1029 for (auto &Stub : Stubs)
1030 emitNonLazySymbolPointer(OutStreamer, StubLabel: Stub.first, MCSym&: Stub.second);
1031
1032 Stubs.clear();
1033 OutStreamer.addBlankLine();
1034 }
1035}
1036
1037/// True if this module is being built for windows/msvc, and uses floating
1038/// point. This is used to emit an undefined reference to _fltused. This is
1039/// needed in Windows kernel or driver contexts to find and prevent code from
1040/// modifying non-GPR registers.
1041///
1042/// TODO: It would be better if this was computed from MIR by looking for
1043/// selected floating-point instructions.
1044static bool usesMSVCFloatingPoint(const Triple &TT, const Module &M) {
1045 // Only needed for MSVC
1046 if (!TT.isWindowsMSVCEnvironment())
1047 return false;
1048
1049 for (const Function &F : M) {
1050 for (const Instruction &I : instructions(F)) {
1051 if (I.getType()->isFloatingPointTy())
1052 return true;
1053
1054 for (const auto &Op : I.operands()) {
1055 if (Op->getType()->isFloatingPointTy())
1056 return true;
1057 }
1058 }
1059 }
1060
1061 return false;
1062}
1063
1064void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
1065 const Triple &TT = TM.getTargetTriple();
1066
1067 if (TT.isOSBinFormatMachO()) {
1068 // Mach-O uses non-lazy symbol stubs to encode per-TU information into
1069 // global table for symbol lookup.
1070 emitNonLazyStubs(MMI, OutStreamer&: *OutStreamer);
1071
1072 // Emit fault map information.
1073 FM.serializeToFaultMapSection();
1074
1075 // This flag tells the linker that no global symbols contain code that fall
1076 // through to other global symbols (e.g. an implementation of multiple entry
1077 // points). If this doesn't occur, the linker can safely perform dead code
1078 // stripping. Since LLVM never generates code that does this, it is always
1079 // safe to set.
1080 OutStreamer->emitSubsectionsViaSymbols();
1081 } else if (TT.isOSBinFormatCOFF()) {
1082 // If import call optimization is enabled, emit the appropriate section.
1083 // We do this whether or not we recorded any items.
1084 if (EnableImportCallOptimization) {
1085 OutStreamer->switchSection(Section: getObjFileLowering().getImportCallSection());
1086
1087 // Section always starts with some magic.
1088 constexpr char ImpCallMagic[12] = "RetpolineV1";
1089 OutStreamer->emitBytes(Data: StringRef{ImpCallMagic, sizeof(ImpCallMagic)});
1090
1091 // Layout of this section is:
1092 // Per section that contains an item to record:
1093 // uint32_t SectionSize: Size in bytes for information in this section.
1094 // uint32_t Section Number
1095 // Per call to imported function in section:
1096 // uint32_t Kind: the kind of item.
1097 // uint32_t InstOffset: the offset of the instr in its parent section.
1098 for (auto &[Section, CallsToImportedFuncs] :
1099 SectionToImportedFunctionCalls) {
1100 unsigned SectionSize =
1101 sizeof(uint32_t) * (2 + 2 * CallsToImportedFuncs.size());
1102 OutStreamer->emitInt32(Value: SectionSize);
1103 OutStreamer->emitCOFFSecNumber(Symbol: Section->getBeginSymbol());
1104 for (auto &[CallsiteSymbol, Kind] : CallsToImportedFuncs) {
1105 OutStreamer->emitInt32(Value: Kind);
1106 OutStreamer->emitCOFFSecOffset(Symbol: CallsiteSymbol);
1107 }
1108 }
1109 }
1110
1111 if (usesMSVCFloatingPoint(TT, M)) {
1112 // In Windows' libcmt.lib, there is a file which is linked in only if the
1113 // symbol _fltused is referenced. Linking this in causes some
1114 // side-effects:
1115 //
1116 // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of
1117 // 64-bit mantissas at program start.
1118 //
1119 // 2. It links in support routines for floating-point in scanf and printf.
1120 //
1121 // MSVC emits an undefined reference to _fltused when there are any
1122 // floating point operations in the program (including calls). A program
1123 // that only has: `scanf("%f", &global_float);` may fail to trigger this,
1124 // but oh well...that's a documented issue.
1125 StringRef SymbolName =
1126 (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused";
1127 MCSymbol *S = MMI->getContext().getOrCreateSymbol(Name: SymbolName);
1128 OutStreamer->emitSymbolAttribute(Symbol: S, Attribute: MCSA_Global);
1129 return;
1130 }
1131 } else if (TT.isOSBinFormatELF()) {
1132 FM.serializeToFaultMapSection();
1133 }
1134
1135 // Emit __morestack address if needed for indirect calls.
1136 if (TT.isX86_64() && TM.getCodeModel() == CodeModel::Large) {
1137 if (MCSymbol *AddrSymbol = OutContext.lookupSymbol(Name: "__morestack_addr")) {
1138 Align Alignment(1);
1139 MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant(
1140 DL: getDataLayout(), Kind: SectionKind::getReadOnly(),
1141 /*C=*/nullptr, Alignment, /*F=*/nullptr);
1142 OutStreamer->switchSection(Section: ReadOnlySection);
1143 OutStreamer->emitLabel(Symbol: AddrSymbol);
1144
1145 unsigned PtrSize = MAI.getCodePointerSize();
1146 OutStreamer->emitSymbolValue(Sym: GetExternalSymbolSymbol(Sym: "__morestack"),
1147 Size: PtrSize);
1148 }
1149 }
1150}
1151
1152char X86AsmPrinter::ID = 0;
1153
1154INITIALIZE_PASS(X86AsmPrinter, "x86-asm-printer", "X86 Assembly Printer", false,
1155 false)
1156
1157//===----------------------------------------------------------------------===//
1158// Target Registry Stuff
1159//===----------------------------------------------------------------------===//
1160
1161// Force static initialization.
1162extern "C" LLVM_C_ABI void LLVMInitializeX86AsmPrinter() {
1163 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
1164 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
1165}
1166
1167PreservedAnalyses X86AsmPrinterBeginPass::run(Module &M,
1168 ModuleAnalysisManager &MAM) {
1169 // Force the computation of SDPI so that it is available for the
1170 // actual pass, where it cannot be explicitly requested.
1171 MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M);
1172 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1173 MAM.getResult<AsmPrinterAnalysis>(IR&: M).getPrinter());
1174 AsmPrinter.GetPSI = [&MAM](Module &M) {
1175 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1176 };
1177 AsmPrinter.GetSDPI = [&MAM](Module &M) {
1178 return &MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M)
1179 .getStaticDataProfileInfo();
1180 };
1181 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1182 AsmPrinter.doInitialization(M);
1183 return PreservedAnalyses::all();
1184}
1185
1186PreservedAnalyses X86AsmPrinterPass::run(MachineFunction &MF,
1187 MachineFunctionAnalysisManager &MFAM) {
1188 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1189 MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1190 .getCachedResult<AsmPrinterAnalysis>(IR&: *MF.getFunction().getParent())
1191 ->getPrinter());
1192 AsmPrinter.GetPSI = [&MFAM, &MF](Module &M) {
1193 return MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1194 .getCachedResult<ProfileSummaryAnalysis>(IR&: M);
1195 };
1196 AsmPrinter.GetSDPI = [&MFAM, &MF](Module &M) {
1197 return &MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
1198 .getCachedResult<StaticDataProfileInfoAnalysis>(
1199 IR&: *MF.getFunction().getParent())
1200 ->getStaticDataProfileInfo();
1201 };
1202 setupMachineFunctionAsmPrinter(MFAM, MF, AsmPrinter);
1203 AsmPrinter.runOnMachineFunction(MF);
1204 return PreservedAnalyses::all();
1205}
1206
1207PreservedAnalyses X86AsmPrinterEndPass::run(Module &M,
1208 ModuleAnalysisManager &MAM) {
1209 X86AsmPrinter &AsmPrinter = static_cast<X86AsmPrinter &>(
1210 MAM.getCachedResult<AsmPrinterAnalysis>(IR&: M)->getPrinter());
1211 AsmPrinter.GetPSI = [&MAM](Module &M) {
1212 return &MAM.getResult<ProfileSummaryAnalysis>(IR&: M);
1213 };
1214 AsmPrinter.GetSDPI = [&MAM](Module &M) {
1215 return &MAM.getResult<StaticDataProfileInfoAnalysis>(IR&: M)
1216 .getStaticDataProfileInfo();
1217 };
1218 setupModuleAsmPrinter(M, MAM, AsmPrinter);
1219 AsmPrinter.doFinalization(M);
1220 return PreservedAnalyses::all();
1221}
1222