1//===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// Implements the AMDGPU specific subclass of TargetSubtarget.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AMDGPUSubtarget.h"
15#include "AMDGPUCallLowering.h"
16#include "AMDGPUInstructionSelector.h"
17#include "AMDGPULegalizerInfo.h"
18#include "AMDGPURegisterBankInfo.h"
19#include "R600Subtarget.h"
20#include "SIMachineFunctionInfo.h"
21#include "Utils/AMDGPUBaseInfo.h"
22#include "llvm/CodeGen/GlobalISel/InlineAsmLowering.h"
23#include "llvm/CodeGen/MachineScheduler.h"
24#include "llvm/CodeGen/TargetFrameLowering.h"
25#include "llvm/IR/DiagnosticInfo.h"
26#include "llvm/IR/IntrinsicsAMDGPU.h"
27#include "llvm/IR/IntrinsicsR600.h"
28#include "llvm/IR/MDBuilder.h"
29#include <algorithm>
30
31using namespace llvm;
32
33#define DEBUG_TYPE "amdgpu-subtarget"
34
35// Returns the maximum per-workgroup LDS allocation size (in bytes) that still
36// allows the given function to achieve an occupancy of NWaves waves per
37// SIMD / EU, taking into account only the function's *maximum* workgroup size.
38unsigned
39AMDGPUSubtarget::getMaxLocalMemSizeWithWaveCount(unsigned NWaves,
40 const Function &F) const {
41 const unsigned WaveSize = getWavefrontSize();
42 const unsigned WorkGroupSize = getFlatWorkGroupSizes(F).second;
43 const unsigned WavesPerWorkgroup =
44 std::max(a: 1u, b: (WorkGroupSize + WaveSize - 1) / WaveSize);
45
46 const unsigned WorkGroupsPerCU =
47 std::max(a: 1u, b: (NWaves * getEUsPerCU()) / WavesPerWorkgroup);
48
49 return getLocalMemorySize() / WorkGroupsPerCU;
50}
51
52std::pair<unsigned, unsigned> AMDGPUSubtarget::getOccupancyWithWorkGroupSizes(
53 uint32_t LDSBytes, std::pair<unsigned, unsigned> FlatWorkGroupSizes) const {
54
55 // LDS granularity accounted for by aligning the queried LDS size to the
56 // allocation block size.
57 const unsigned Granularity = std::max(a: LDSAllocationGranularity, b: 1u);
58 LDSBytes = alignTo(Value: LDSBytes, Align: Granularity);
59 const unsigned MaxWGsLDS = getLocalMemorySize() / std::max(a: LDSBytes, b: 1u);
60
61 // Queried LDS size may be larger than available on a CU, in which case we
62 // consider the only achievable occupancy to be 1, in line with what we
63 // consider the occupancy to be when the number of requested registers in a
64 // particular bank is higher than the number of available ones in that bank.
65 if (!MaxWGsLDS)
66 return {1, 1};
67
68 const unsigned WaveSize = getWavefrontSize(), WavesPerEU = getMaxWavesPerEU();
69
70 auto PropsFromWGSize = [=](unsigned WGSize)
71 -> std::tuple<const unsigned, const unsigned, unsigned> {
72 unsigned WavesPerWG = divideCeil(Numerator: WGSize, Denominator: WaveSize);
73 unsigned WGsPerCU = std::min(a: getMaxWorkGroupsPerCU(FlatWorkGroupSize: WGSize), b: MaxWGsLDS);
74 return {WavesPerWG, WGsPerCU, WavesPerWG * WGsPerCU};
75 };
76
77 // The maximum group size will generally yield the minimum number of
78 // workgroups, maximum number of waves, and minimum occupancy. The opposite is
79 // generally true for the minimum group size. LDS or barrier ressource
80 // limitations can flip those minimums/maximums.
81 const auto [MinWGSize, MaxWGSize] = FlatWorkGroupSizes;
82 auto [MinWavesPerWG, MaxWGsPerCU, MaxWavesPerCU] = PropsFromWGSize(MinWGSize);
83 auto [MaxWavesPerWG, MinWGsPerCU, MinWavesPerCU] = PropsFromWGSize(MaxWGSize);
84
85 // It is possible that we end up with flipped minimum and maximum number of
86 // waves per CU when the number of minimum/maximum concurrent groups on the CU
87 // is limited by LDS usage or barrier resources.
88 if (MinWavesPerCU >= MaxWavesPerCU) {
89 std::swap(a&: MinWavesPerCU, b&: MaxWavesPerCU);
90 } else {
91 const unsigned WaveSlotsPerCU = WavesPerEU * getEUsPerCU();
92
93 // Look for a potential smaller group size than the maximum which decreases
94 // the concurrent number of waves on the CU for the same number of
95 // concurrent workgroups on the CU.
96 unsigned MinWavesPerCUForWGSize =
97 divideCeil(Numerator: WaveSlotsPerCU, Denominator: MinWGsPerCU + 1) * MinWGsPerCU;
98 if (MinWavesPerCU > MinWavesPerCUForWGSize) {
99 unsigned ExcessSlots = MinWavesPerCU - MinWavesPerCUForWGSize;
100 if (unsigned ExcessSlotsPerWG = ExcessSlots / MinWGsPerCU) {
101 // There may exist a smaller group size than the maximum that achieves
102 // the minimum number of waves per CU. This group size is the largest
103 // possible size that requires MaxWavesPerWG - E waves where E is
104 // maximized under the following constraints.
105 // 1. 0 <= E <= ExcessSlotsPerWG
106 // 2. (MaxWavesPerWG - E) * WaveSize >= MinWGSize
107 MinWavesPerCU -= MinWGsPerCU * std::min(a: ExcessSlotsPerWG,
108 b: MaxWavesPerWG - MinWavesPerWG);
109 }
110 }
111
112 // Look for a potential larger group size than the minimum which increases
113 // the concurrent number of waves on the CU for the same number of
114 // concurrent workgroups on the CU.
115 unsigned LeftoverSlots = WaveSlotsPerCU - MaxWGsPerCU * MinWavesPerWG;
116 if (unsigned LeftoverSlotsPerWG = LeftoverSlots / MaxWGsPerCU) {
117 // There may exist a larger group size than the minimum that achieves the
118 // maximum number of waves per CU. This group size is the smallest
119 // possible size that requires MinWavesPerWG + L waves where L is
120 // maximized under the following constraints.
121 // 1. 0 <= L <= LeftoverSlotsPerWG
122 // 2. (MinWavesPerWG + L - 1) * WaveSize <= MaxWGSize
123 MaxWavesPerCU += MaxWGsPerCU * std::min(a: LeftoverSlotsPerWG,
124 b: ((MaxWGSize - 1) / WaveSize) + 1 -
125 MinWavesPerWG);
126 }
127 }
128
129 // Return the minimum/maximum number of waves on any EU, assuming that all
130 // wavefronts are spread across all EUs as evenly as possible.
131 return {std::clamp(val: MinWavesPerCU / getEUsPerCU(), lo: 1U, hi: WavesPerEU),
132 std::clamp(val: divideCeil(Numerator: MaxWavesPerCU, Denominator: getEUsPerCU()), lo: 1U, hi: WavesPerEU)};
133}
134
135std::pair<unsigned, unsigned> AMDGPUSubtarget::getOccupancyWithWorkGroupSizes(
136 const MachineFunction &MF) const {
137 const auto *MFI = MF.getInfo<SIMachineFunctionInfo>();
138 return getOccupancyWithWorkGroupSizes(LDSBytes: MFI->getLDSSize(), F: MF.getFunction());
139}
140
141std::pair<unsigned, unsigned>
142AMDGPUSubtarget::getDefaultFlatWorkGroupSize(CallingConv::ID CC) const {
143 switch (CC) {
144 case CallingConv::AMDGPU_VS:
145 case CallingConv::AMDGPU_LS:
146 case CallingConv::AMDGPU_HS:
147 case CallingConv::AMDGPU_ES:
148 case CallingConv::AMDGPU_GS:
149 case CallingConv::AMDGPU_PS:
150 return std::pair(1, getWavefrontSize());
151 default:
152 return std::pair(1u, getMaxFlatWorkGroupSize());
153 }
154}
155
156std::pair<unsigned, unsigned> AMDGPUSubtarget::getFlatWorkGroupSizes(
157 const Function &F) const {
158 // Default minimum/maximum flat work group sizes.
159 std::pair<unsigned, unsigned> Default =
160 getDefaultFlatWorkGroupSize(CC: F.getCallingConv());
161
162 // Requested minimum/maximum flat work group sizes.
163 std::pair<unsigned, unsigned> Requested = AMDGPU::getIntegerPairAttribute(
164 F, Name: "amdgpu-flat-work-group-size", Default);
165
166 // Make sure requested minimum is less than requested maximum.
167 if (Requested.first > Requested.second)
168 return Default;
169
170 // Make sure requested values do not violate subtarget's specifications.
171 if (Requested.first < getMinFlatWorkGroupSize())
172 return Default;
173 if (Requested.second > getMaxFlatWorkGroupSize())
174 return Default;
175
176 return Requested;
177}
178
179std::pair<unsigned, unsigned> AMDGPUSubtarget::getEffectiveWavesPerEU(
180 std::pair<unsigned, unsigned> RequestedWavesPerEU,
181 std::pair<unsigned, unsigned> FlatWorkGroupSizes, unsigned LDSBytes) const {
182 // Default minimum/maximum number of waves per EU. The range of flat workgroup
183 // sizes limits the achievable maximum, and we aim to support enough waves per
184 // EU so that we can concurrently execute all waves of a single workgroup of
185 // maximum size on a CU.
186 std::pair<unsigned, unsigned> Default = {
187 getWavesPerEUForWorkGroup(FlatWorkGroupSize: FlatWorkGroupSizes.second),
188 getOccupancyWithWorkGroupSizes(LDSBytes, FlatWorkGroupSizes).second};
189 Default.first = std::min(a: Default.first, b: Default.second);
190
191 // Make sure requested minimum is within the default range and lower than the
192 // requested maximum. The latter must not violate target specification.
193 if (RequestedWavesPerEU.first < Default.first ||
194 RequestedWavesPerEU.first > Default.second ||
195 RequestedWavesPerEU.first > RequestedWavesPerEU.second ||
196 RequestedWavesPerEU.second > getMaxWavesPerEU())
197 return Default;
198
199 // We cannot exceed maximum occupancy implied by flat workgroup size and LDS.
200 RequestedWavesPerEU.second =
201 std::min(a: RequestedWavesPerEU.second, b: Default.second);
202 return RequestedWavesPerEU;
203}
204
205std::pair<unsigned, unsigned>
206AMDGPUSubtarget::getWavesPerEU(const Function &F) const {
207 // Default/requested minimum/maximum flat work group sizes.
208 std::pair<unsigned, unsigned> FlatWorkGroupSizes = getFlatWorkGroupSizes(F);
209 // Minimum number of bytes allocated in the LDS.
210 unsigned LDSBytes =
211 AMDGPU::getIntegerPairAttribute(F, Name: "amdgpu-lds-size", Default: {0, UINT32_MAX},
212 /*OnlyFirstRequired=*/true)
213 .first;
214 return getWavesPerEU(FlatWorkGroupSizes, LDSBytes, F);
215}
216
217std::pair<unsigned, unsigned>
218AMDGPUSubtarget::getWavesPerEU(std::pair<unsigned, unsigned> FlatWorkGroupSizes,
219 unsigned LDSBytes, const Function &F) const {
220 // Default minimum/maximum number of waves per execution unit.
221 std::pair<unsigned, unsigned> Default(1, getMaxWavesPerEU());
222
223 // Requested minimum/maximum number of waves per execution unit.
224 std::pair<unsigned, unsigned> Requested =
225 AMDGPU::getIntegerPairAttribute(F, Name: "amdgpu-waves-per-eu", Default, OnlyFirstRequired: true);
226 return getEffectiveWavesPerEU(RequestedWavesPerEU: Requested, FlatWorkGroupSizes, LDSBytes);
227}
228
229std::optional<unsigned>
230AMDGPUSubtarget::getReqdWorkGroupSize(const Function &Kernel,
231 unsigned Dim) const {
232 auto *Node = Kernel.getMetadata(Kind: "reqd_work_group_size");
233 if (Node && Node->getNumOperands() == 3)
234 return mdconst::extract<ConstantInt>(MD: Node->getOperand(I: Dim))->getZExtValue();
235 return std::nullopt;
236}
237
238bool AMDGPUSubtarget::hasWavefrontsEvenlySplittingXDim(
239 const Function &F, bool RequiresUniformYZ) const {
240 auto *Node = F.getMetadata(Kind: "reqd_work_group_size");
241 if (!Node || Node->getNumOperands() != 3)
242 return false;
243 unsigned XLen =
244 mdconst::extract<ConstantInt>(MD: Node->getOperand(I: 0))->getZExtValue();
245 unsigned YLen =
246 mdconst::extract<ConstantInt>(MD: Node->getOperand(I: 1))->getZExtValue();
247 unsigned ZLen =
248 mdconst::extract<ConstantInt>(MD: Node->getOperand(I: 2))->getZExtValue();
249
250 bool Is1D = YLen <= 1 && ZLen <= 1;
251 bool IsXLargeEnough =
252 isPowerOf2_32(Value: XLen) && (!RequiresUniformYZ || XLen >= getWavefrontSize());
253 return Is1D || IsXLargeEnough;
254}
255
256bool AMDGPUSubtarget::isMesaKernel(const Function &F) const {
257 return isMesa3DOS() && !AMDGPU::isShader(CC: F.getCallingConv());
258}
259
260unsigned AMDGPUSubtarget::getMaxWorkitemID(const Function &Kernel,
261 unsigned Dimension) const {
262 std::optional<unsigned> ReqdSize = getReqdWorkGroupSize(Kernel, Dim: Dimension);
263 if (ReqdSize)
264 return *ReqdSize - 1;
265 return getFlatWorkGroupSizes(F: Kernel).second - 1;
266}
267
268bool AMDGPUSubtarget::isSingleLaneExecution(const Function &Func) const {
269 for (int I = 0; I < 3; ++I) {
270 if (getMaxWorkitemID(Kernel: Func, Dimension: I) > 0)
271 return false;
272 }
273
274 // If the function may call the WWM intrinsic, just return false as
275 // all threads will be active at some point
276 if (!Func.hasFnAttribute(Kind: "amdgpu-no-wwm"))
277 return false;
278
279 return true;
280}
281
282bool AMDGPUSubtarget::makeLIDRangeMetadata(Instruction *I) const {
283 Function *Kernel = I->getFunction();
284 unsigned MinSize = 0;
285 unsigned MaxSize = getFlatWorkGroupSizes(F: *Kernel).second;
286 bool IdQuery = false;
287
288 // If reqd_work_group_size is present it narrows value down.
289 if (auto *CI = dyn_cast<CallInst>(Val: I)) {
290 const Function *F = CI->getCalledFunction();
291 if (F) {
292 unsigned Dim = UINT_MAX;
293 switch (F->getIntrinsicID()) {
294 case Intrinsic::amdgcn_workitem_id_x:
295 case Intrinsic::r600_read_tidig_x:
296 IdQuery = true;
297 [[fallthrough]];
298 case Intrinsic::r600_read_local_size_x:
299 Dim = 0;
300 break;
301 case Intrinsic::amdgcn_workitem_id_y:
302 case Intrinsic::r600_read_tidig_y:
303 IdQuery = true;
304 [[fallthrough]];
305 case Intrinsic::r600_read_local_size_y:
306 Dim = 1;
307 break;
308 case Intrinsic::amdgcn_workitem_id_z:
309 case Intrinsic::r600_read_tidig_z:
310 IdQuery = true;
311 [[fallthrough]];
312 case Intrinsic::r600_read_local_size_z:
313 Dim = 2;
314 break;
315 default:
316 break;
317 }
318
319 if (Dim <= 3) {
320 std::optional<unsigned> ReqdSize = getReqdWorkGroupSize(Kernel: *Kernel, Dim);
321 if (ReqdSize)
322 MinSize = MaxSize = *ReqdSize;
323 }
324 }
325 }
326
327 if (!MaxSize)
328 return false;
329
330 // Range metadata is [Lo, Hi). For ID query we need to pass max size
331 // as Hi. For size query we need to pass Hi + 1.
332 if (IdQuery)
333 MinSize = 0;
334 else
335 ++MaxSize;
336
337 APInt Lower{32, MinSize};
338 APInt Upper{32, MaxSize};
339 if (auto *CI = dyn_cast<CallBase>(Val: I)) {
340 ConstantRange Range(Lower, Upper);
341 CI->addRangeRetAttr(CR: Range);
342 } else {
343 MDBuilder MDB(I->getContext());
344 MDNode *MaxWorkGroupSizeRange = MDB.createRange(Lo: Lower, Hi: Upper);
345 I->setMetadata(KindID: LLVMContext::MD_range, Node: MaxWorkGroupSizeRange);
346 }
347 return true;
348}
349
350unsigned AMDGPUSubtarget::getImplicitArgNumBytes(const Function &F) const {
351
352 // We don't allocate the segment if we know the implicit arguments weren't
353 // used, even if the ABI implies we need them.
354 if (F.hasFnAttribute(Kind: "amdgpu-no-implicitarg-ptr"))
355 return 0;
356
357 if (isMesaKernel(F))
358 return 16;
359
360 // Assume all implicit inputs are used by default
361 const Module *M = F.getParent();
362 unsigned NBytes =
363 AMDGPU::getAMDHSACodeObjectVersion(M: *M) >= AMDGPU::AMDHSA_COV5 ? 256 : 56;
364 return F.getFnAttributeAsParsedInteger(Kind: "amdgpu-implicitarg-num-bytes",
365 Default: NBytes);
366}
367
368uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F,
369 Align &MaxAlign) const {
370 assert(F.getCallingConv() == CallingConv::AMDGPU_KERNEL ||
371 F.getCallingConv() == CallingConv::SPIR_KERNEL);
372
373 const DataLayout &DL = F.getDataLayout();
374 uint64_t ExplicitArgBytes = 0;
375 MaxAlign = Align(1);
376
377 for (const Argument &Arg : F.args()) {
378 if (Arg.hasAttribute(Kind: "amdgpu-hidden-argument"))
379 continue;
380
381 const bool IsByRef = Arg.hasByRefAttr();
382 Type *ArgTy = IsByRef ? Arg.getParamByRefType() : Arg.getType();
383 Align Alignment = DL.getValueOrABITypeAlignment(
384 Alignment: IsByRef ? Arg.getParamAlign() : std::nullopt, Ty: ArgTy);
385 uint64_t AllocSize = DL.getTypeAllocSize(Ty: ArgTy);
386 ExplicitArgBytes = alignTo(Size: ExplicitArgBytes, A: Alignment) + AllocSize;
387 MaxAlign = std::max(a: MaxAlign, b: Alignment);
388 }
389
390 return ExplicitArgBytes;
391}
392
393unsigned AMDGPUSubtarget::getKernArgSegmentSize(const Function &F,
394 Align &MaxAlign) const {
395 if (F.getCallingConv() != CallingConv::AMDGPU_KERNEL &&
396 F.getCallingConv() != CallingConv::SPIR_KERNEL)
397 return 0;
398
399 uint64_t ExplicitArgBytes = getExplicitKernArgSize(F, MaxAlign);
400
401 unsigned ExplicitOffset = getExplicitKernelArgOffset();
402
403 uint64_t TotalSize = ExplicitOffset + ExplicitArgBytes;
404 unsigned ImplicitBytes = getImplicitArgNumBytes(F);
405 if (ImplicitBytes != 0) {
406 const Align Alignment = getAlignmentForImplicitArgPtr();
407 TotalSize = alignTo(Size: ExplicitArgBytes, A: Alignment) + ImplicitBytes;
408 MaxAlign = std::max(a: MaxAlign, b: Alignment);
409 }
410
411 // Being able to dereference past the end is useful for emitting scalar loads.
412 return alignTo(Value: TotalSize, Align: 4);
413}
414
415AMDGPUDwarfFlavour AMDGPUSubtarget::getAMDGPUDwarfFlavour() const {
416 return getWavefrontSize() == 32 ? AMDGPUDwarfFlavour::Wave32
417 : AMDGPUDwarfFlavour::Wave64;
418}
419
420const AMDGPUSubtarget &AMDGPUSubtarget::get(const MachineFunction &MF) {
421 if (MF.getTarget().getTargetTriple().isAMDGCN())
422 return static_cast<const AMDGPUSubtarget&>(MF.getSubtarget<GCNSubtarget>());
423 return static_cast<const AMDGPUSubtarget &>(MF.getSubtarget<R600Subtarget>());
424}
425
426const AMDGPUSubtarget &AMDGPUSubtarget::get(const TargetMachine &TM, const Function &F) {
427 if (TM.getTargetTriple().isAMDGCN())
428 return static_cast<const AMDGPUSubtarget&>(TM.getSubtarget<GCNSubtarget>(F));
429 return static_cast<const AMDGPUSubtarget &>(
430 TM.getSubtarget<R600Subtarget>(F));
431}
432