1//===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips16 implementation of TargetFrameLowering class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "Mips16FrameLowering.h"
14#include "Mips16InstrInfo.h"
15#include "MipsInstrInfo.h"
16#include "MipsRegisterInfo.h"
17#include "MipsSubtarget.h"
18#include "llvm/ADT/BitVector.h"
19#include "llvm/CodeGen/CFIInstBuilder.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/MachineFrameInfo.h"
22#include "llvm/CodeGen/MachineFunction.h"
23#include "llvm/CodeGen/MachineInstr.h"
24#include "llvm/CodeGen/MachineInstrBuilder.h"
25#include "llvm/CodeGen/MachineModuleInfo.h"
26#include "llvm/CodeGen/TargetFrameLowering.h"
27#include "llvm/IR/DebugLoc.h"
28#include "llvm/Support/MathExtras.h"
29#include <cstdint>
30#include <vector>
31
32using namespace llvm;
33
34Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
35 : MipsFrameLowering(STI, STI.getStackAlignment()) {}
36
37void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
38 MachineBasicBlock &MBB) const {
39 MachineFrameInfo &MFI = MF.getFrameInfo();
40 const Mips16InstrInfo &TII =
41 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
42 MachineBasicBlock::iterator MBBI = MBB.begin();
43
44 // Debug location must be unknown since the first debug location is used
45 // to determine the end of the prologue.
46 DebugLoc dl;
47
48 uint64_t StackSize = MFI.getStackSize();
49
50 // No need to allocate space on the stack.
51 if (StackSize == 0 && !MFI.adjustsStack()) return;
52
53 // Adjust stack.
54 TII.makeFrame(SP: Mips::SP, FrameSize: StackSize, MBB, I: MBBI);
55
56 CFIInstBuilder CFIBuilder(MBB, MBBI, MachineInstr::NoFlags);
57 CFIBuilder.buildDefCFAOffset(Offset: StackSize);
58
59 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
60
61 if (!CSI.empty()) {
62 for (const CalleeSavedInfo &I : CSI)
63 CFIBuilder.buildOffset(Reg: I.getReg(), Offset: MFI.getObjectOffset(ObjectIdx: I.getFrameIdx()));
64 }
65
66 if (hasFP(MF))
67 BuildMI(BB&: MBB, I: MBBI, MIMD: dl, MCID: TII.get(Opcode: Mips::MoveR3216), DestReg: Mips::R16)
68 .addReg(RegNo: Mips::SP)
69 .setMIFlag(MachineInstr::FrameSetup);
70}
71
72void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
73 MachineBasicBlock &MBB) const {
74 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
75 MachineFrameInfo &MFI = MF.getFrameInfo();
76 const Mips16InstrInfo &TII =
77 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
78 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
79 uint64_t StackSize = MFI.getStackSize();
80
81 if (!StackSize)
82 return;
83
84 if (hasFP(MF))
85 BuildMI(BB&: MBB, I: MBBI, MIMD: dl, MCID: TII.get(Opcode: Mips::Move32R16), DestReg: Mips::SP)
86 .addReg(RegNo: Mips::R16);
87
88 // Adjust stack.
89 // assumes stacksize multiple of 8
90 TII.restoreFrame(SP: Mips::SP, FrameSize: StackSize, MBB, I: MBBI);
91}
92
93bool Mips16FrameLowering::spillCalleeSavedRegisters(
94 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
95 ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
96 MachineFunction *MF = MBB.getParent();
97
98 //
99 // Registers RA, S0,S1 are the callee saved registers and they
100 // will be saved with the "save" instruction
101 // during emitPrologue
102 //
103 for (const CalleeSavedInfo &I : CSI) {
104 // Add the callee-saved register as live-in. Do not add if the register is
105 // RA and return address is taken, because it has already been added in
106 // method MipsTargetLowering::lowerRETURNADDR.
107 // It's killed at the spill, unless the register is RA and return address
108 // is taken.
109 MCRegister Reg = I.getReg();
110 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
111 && MF->getFrameInfo().isReturnAddressTaken();
112 if (!IsRAAndRetAddrIsTaken)
113 MBB.addLiveIn(PhysReg: Reg);
114 }
115
116 return true;
117}
118
119bool Mips16FrameLowering::restoreCalleeSavedRegisters(
120 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
121 MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
122 //
123 // Registers RA,S0,S1 are the callee saved registers and they will be restored
124 // with the restore instruction during emitEpilogue.
125 // We need to override this virtual function, otherwise llvm will try and
126 // restore the registers on it's on from the stack.
127 //
128
129 return true;
130}
131
132bool
133Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
134 const MachineFrameInfo &MFI = MF.getFrameInfo();
135 // Reserve call frame if the size of the maximum call frame fits into 15-bit
136 // immediate field and there are no variable sized objects on the stack.
137 return isInt<15>(x: MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
138}
139
140void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF,
141 BitVector &SavedRegs,
142 RegScavenger *RS) const {
143 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
144 const Mips16InstrInfo &TII =
145 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
146 const MipsRegisterInfo &RI = TII.getRegisterInfo();
147 const BitVector Reserved = RI.getReservedRegs(MF);
148 bool SaveS2 = Reserved[Mips::R18];
149 if (SaveS2)
150 SavedRegs.set(Mips::R18);
151 if (hasFP(MF))
152 SavedRegs.set(Mips::R16);
153}
154
155const MipsFrameLowering *
156llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
157 return new Mips16FrameLowering(ST);
158}
159